CPRE 583 Reconfigurable Computing Lecture 3: Wed 9/1/2010 (Reconfigurable Computing Hardware)
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Transcript of 1 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames) CPRE 583...
1 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
CPRE 583Reconfigurable Computing
Lecture 13: Fri 10/8/2010(System Architectures)
Instructor: Dr. Phillip Jones([email protected])
Reconfigurable Computing LaboratoryIowa State University
Ames, Iowa, USA
http://class.ee.iastate.edu/cpre583/
2 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• Midterm:– Take home portion (40%) given Friday 10/15, due Tue 10/20
(midnight)– In class portion (60%) Wed 10/20
• Distance students will have in class portion given via a timed WebCT (2 hour) session (take on Wed, Thur or Friday).
• Start thinking of class projects and forming teams– Submit teams and project ideas: Mon 10/11 midnight– Project proposal presentations: Fri 10/22
• MP3: PowerPC Coprocessor offload (release by Sat noon)• Problem 2 of HW 2 (released by Sat noon)
Announcements/Reminders
3 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Initial Project Proposal Slides (5-10 slides)
• Project team list: Name, Responsibility (who is project leader)– Team size: 3-4 (5 case-by-case)
• Project idea• Motivation (why is this interesting, useful)• What will be the end result• High-level picture of final product
• High-level Plan– Break project into mile stones
• Provide initial schedule: I would initially schedule aggressively to have project complete by Thanksgiving. Issues will pop up to cause the schedule to slip.
– System block diagrams– High-level algorithms (if any)– Concerns
• Implementation• Conceptual
• Research papers related to you project idea
4 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• FPL• FPT• FCCM• FPGA• DAC• ICCAD• Reconfig• RTSS• RTAS• ISCA
Projects Ideas: Relevant conferences
• Micro• Super Computing• HPCA• IPDPS
5 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Initial Project Proposal Slides (5-10 slides)
• Project team list: Name, Responsibility (who is project leader)• Project idea
• Motivation (why is this interesting, useful)• What will be the end result• High-level picture of final product
• High-level Plan– Break project into mile stones
• Provide initial schedule: I would initially schedule aggressively to have project complete by Thanksgiving. Issues will pop up to cause the schedule to slip.
– System block diagrams– High-level algorithms (if any)– Concerns
• Implementation• Conceptual
• Research papers related to you project idea
6 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Weekly Project Updates
• The current state of your project write up– Even in the early stages of the project you
should be able to write a rough draft of the Introduction and Motivation section
• The current state of your Final Presentation– Your Initial Project proposal presentation
(Due Fri 10/22). Should make for a starting point for you Final presentation
• What things are work & not working• What roadblocks are you running into
7 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• Teams Formed and Idea: Mon 10/11– Project idea in Power Point 3-5 slides
• Motivation (why is this interesting, useful)• What will be the end result• High-level picture of final product
– Project team list: Name, Responsibility• High-level Plan/Proposal: Fri 10/22
– Power Point 5-10 slides• System block diagrams• High-level algorithms (if any)• Concerns
– Implementation– Conceptual
• Related research papers (if any)
Projects: Target Timeline
8 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• Work on projects: 10/22 - 12/8– Weekly update reports
• More information on updates will be given• Presentations: Last Wed/Fri of class
– Present / Demo what is done at this point– 15-20 minutes (depends on number of projects)
• Final write up and Software/Hardware turned in: Day of final (TBD)
Projects: Target Timeline
9 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Project Grading Breakdown
• 50% Final Project Demo• 30% Final Project Report
– 30% of your project report grade will come from your 5-6 project updates. Friday’s midnight
• 20% Final Project Presentation
10 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Common Questions
11 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Common Questions
12 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Common Questions
13 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• Common System Architectures• Plus/Delta mid-semester feedback
Overview
14 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• Introduction to common System Architectures
What you should learn
15 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• Design patterns (previous lecture)– Why are they useful?– Examples
• Compute models (Abstraction)– Why are they useful?– Examples
• System Architectures (Implementation)– Why are they useful?– Examples
Outline
16 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• Design patterns (previous lecture)– Why are they useful?– Examples
• Compute models (Abstraction)– Why are they useful?– Examples
• System Architectures (Implementation)– Why are they useful?– Examples
Outline
17 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
References
• Reconfigurable Computing (2008) [1]– Chapter 5: Compute Models and System
Architectures• Scott Hauck, Andre DeHon
18 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• Compute Models: Help express the parallelism of an application
• System Architecture: How to organize application implementation
System Architectures
19 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• Compute model and system architecture should work together
• Both are a function of– The nature of the application
• Required resources• Required performance
– The nature of the target platform• Resources available
Efficient Application Implementation
20 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Efficient Application Implementation
Application(Image Processing)
Platform 1(Vector Processor)
Platform 2(FPGA)
21 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Efficient Application Implementation
Application(Image Processing)
Platform 1(Vector Processor)
Platform 2(FPGA)
Compute Model
System Architecture
22 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Efficient Application Implementation
Application(Image Processing)
Platform 1(Vector Processor)
Platform 2(FPGA)
Compute Model
System Architecture
23 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Efficient Application Implementation
Application(Image Processing)
Platform 1(Vector Processor)
Platform 2(FPGA)
Data FlowCompute Model
System ArchitectureStreaming Data Flow
24 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Efficient Application Implementation
Application(Image Processing)
Platform 1(Vector Processor)
Platform 2(FPGA)
Data FlowCompute Model
System ArchitectureStreaming Data Flow
25 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Efficient Application Implementation
Application(Image Processing)
Platform 1(Vector Processor)
Platform 2(FPGA)
Compute Model
System Architecture
26 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Efficient Application Implementation
Application(Image Processing)
Platform 1(Vector Processor)
Platform 2(FPGA)
Compute Model
System Architecture
Data Parallel
Vector
27 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Efficient Application Implementation
Application(Image Processing)
Platform 1(Vector Processor)
Platform 2(FPGA)
Data FlowCompute Model
System ArchitectureStreaming Data Flow
28 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Efficient Application Implementation
Application(Image Processing)
Platform 1(Vector Processor)
Platform 2(FPGA)
Data FlowCompute Model
System ArchitectureStreaming Data Flow
29 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Efficient Application Implementation
Application(Image Processing)
Platform 1(Vector Processor)
Platform 2(FPGA)
Data FlowCompute Model
System ArchitectureStreaming Data Flow
X X
+
30 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• Data presence– variable length connections between operators– data rates vary between operator implementations– data rates varying between operators
• Datapath sharing– not enough spatial resources to host entire graph– balanced use of resources (e.g. operators)– cyclic dependencies impacting efficiency
• Interconnect sharing– Interconnects are becoming difficult to route– Links between operators infrequently used– High variability in operator data rates
• Streaming coprocessor– Extreme resource constraints
Implementing Streaming Dataflow
31 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Data Presence
X X
+
32 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Data Presence
X X
+
data_readydata_ready
data_ready
33 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Data Presence
X X
+
data_readydata_readyFIFO FIFO
FIFO data_ready
34 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Data Presence
X X
+
data_readydata_readyFIFO FIFO
FIFO data_readystall
stall stall
35 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Data Presence
X X
+
data_readydata_readyFIFO FIFO
FIFO data_readystall
stall stall
Flow control: Term typical used in networking
36 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Data Presence
X X
+
data_readydata_readyFIFO FIFO
FIFO data_readystall
stall stall
Flow control: Term typical used in networking
Increase flexibility of how application can be implemented
37 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• Data presence– variable length connections between operators– data rates vary between operator implementations– data rates varying between operators
• Datapath sharing– not enough spatial resources to host entire graph– balanced use of resources (e.g. operators)– cyclic dependencies impacting efficiency
• Interconnect sharing– Interconnects are becoming difficult to route– Links between operators infrequently used– High variability in operator data rates
• Streaming coprocessor– Extreme resource constraints
Implementing Streaming Dataflow
38 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Datapath Sharing
X X
+
39 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Datapath Sharing
X X
+
Platform may only have one multiplier
40 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Datapath Sharing
X
+
Platform may only have one multiplier
41 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Datapath Sharing
X
+
Platform may only have one multiplier
REG
REG
42 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Datapath Sharing
X
+
Platform may only have one multiplier
REG
REG
FSM
43 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Datapath Sharing
X
+
Platform may only have one multiplier
REG
REG
FSM
Important to keep track of were data is coming!!
44 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• Data presence– variable length connections between operators– data rates vary between operator implementations– data rates varying between operators
• Datapath sharing– not enough spatial resources to host entire graph– balanced use of resources (e.g. operators)– cyclic dependencies impacting efficiency
• Interconnect sharing– Interconnects are becoming difficult to route– Links between operators infrequently used– High variability in operator data rates
• Streaming coprocessor– Extreme resource constraints
Implementing Streaming Dataflow
45 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Interconnect sharing
X X
+
46 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Interconnect sharing
X X
+
Need more efficient use of interconnect
47 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Interconnect sharing
X X
+
Need more efficient use of interconnect
48 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Interconnect sharing
X X
+
Need more efficient use of interconnect
FSM
49 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• Data presence– variable length connections between operators– data rates vary between operator implementations– data rates varying between operators
• Datapath sharing– not enough spatial resources to host entire graph– balanced use of resources (e.g. operators)– cyclic dependencies impacting efficiency
• Interconnect sharing– Interconnects are becoming difficult to route– Links between operators infrequently used– High variability in operator data rates
• Streaming coprocessor– Extreme resource constraints
Implementing Streaming Dataflow
50 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• See SCORE chapter 9 of text for an example.
Streaming coprocessor
51 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• Typically thought of in the context of sequential programming on a processor (e.g. C, Java programming)
• Key to organizing synchronizing and control over highly parallel operations– Time multiplexing resources: when task to too large for
computing fabric– Increasing data path utilization
Sequential Control
52 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Sequential Control
X
X X
++
A X B C
53 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Sequential Control
X
X X
++
A X B C
A*x2 + B*x + C
54 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Sequential Control
X
X X
++
A X B C
A*x2 + B*x + C
X
+
A XBC
A*x2 + B*x + C
55 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Finite State Machine with Datapath (FSMD)
A*x2 + B*x + C
X
+
A XBC
56 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Finite State Machine with Datapath (FSMD)
A*x2 + B*x + C
X
+
A XBC
FSM
57 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• Finite State Machine with Datapath (FSMD)
• Very Long Instruction Word (VLIW) data path control
• Processor
• Instruction augmentation
• Phased reconfiguration manager
• Worker farm
Sequential Control: Types
58 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• See 5.2 of text for this architecture
Very Long Instruction Word (VLIW) Datapath Control
59 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Processor
60 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Instruction Augmentation
61 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• Will see more detail with SCORE architecture from chapter 9 of text.
Phased Configuration Manager
62 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• Chapter 5.2 of text
Worker Farm
63 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• See chapter 5.2 for more detail
Bulk Synchronous Parallelism
64 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
• Single Program Multiple Data
• Single Instruction Multiple Data (SIMD)
• Vector
• Vector Coprocessor
Data Parallel
65 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Data Parallel
66 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Data Parallel
67 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Data Parallel
68 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Data Parallel
69 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Cellular Automata
70 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Multi-threaded
71 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Next Lecture
72 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Questions/Comments/Concerns
• Write down– Main point of lecture
– One thing that’s still not quite clear
– If everything is clear, then give an example of how to apply something from lecture
OR
73 - CPRE 583 (Reconfigurable Computing): System Architectures Iowa State University (Ames)
Lecture Notes• Add CSP/Mulithread as root of a simple tree• 15+5(late start) minutes of time left• Think of one to two in class exercise (10 min)
– Data Flow graph optimization algorithm?– Dead lock detection on a small model?
• Give some examples of where a given compute model would map to a given application.– Systolic array (implement) or Dataflow compute
model)– String matching (FSM) (MISD)
• New image for MP3, too dark of a color