113DATA MANIPULATION

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Data ManipulationComputer System

consists of the following parts:

• Central Processing Unit (CPU)

• Memory• Input Units(I/P)• Output Units(O/P)

I/PCPU

O/P

Memory

Computer System

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Generalized Microcomputer

Structure

I/O

Memory

MAR

PC

AddressingRegisters

Control

I R

Arithmetic

A Reg ALU

Input Bus

Output Bus

To MAR

To Mem

To I/O

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Central Processing Unit (CPU) :CPU Consists of :• Control Unit• Arithmetic Logic

Unit (ALU)• Registers

Control Unit:• Transfer data from main

memory into registers• Inform ALU which

registers hold the data• Activate the appropriate

circuitry within ALU• Tell ALU which register

should receive the result• Control the timing

activities of computer system

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CPU :Arithmetic Logic Unit

(ALU) :• Contains the circuitry

that performs data manipulation

• The source of data to ALU either the registers inside CPU , the memory , or input from input units

Registers :• Registers are small

and fast storage units• Registers are used

for temporary storage of information

• Registers are divided into:

» General -Purpose Registers

» Special -Purpose Registers

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Memory:Memory is 4 levels

from the point of Speed and Price :

• Cache Memory• Registers• Main Memory• Mass Storage

(secondary Memory)

CPURegisters

Cache Memory

Main Memory

Mass Storage

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Cache Memory :• Cache Memory is a high-speed

memory with response times similar to that of CPU registers

• It is often located inside the CPU itself• The computer keeps in it a copy of

the portion of the main memory that is needed frequently

• Thus, data transfer that normally made between registers and main memory are made between registers and cache memory

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CPU / Memory Interface:• For the purpose of transferring bit

patterns between a machine’s CPU and main memory , these units are connected by a collection of wires called a bus

• Computer system contains 3 types of buses:

• Data Bus• Address Bus• Control Bus

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Machine Instructions :• They are quite short

bit pattern instructions, a typical CPU must be able to follow to perform certain tasks

• The machine instructions are classified into three categories:

• Data Transfer Instructions

• Arithmetic/Logic Instructions

• Control Instructions

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Program Execution :• Computer follows a program stored

in its memory by copying the instructions from memory into the the control unit as needed

• The instruction execution passes through three phases:

» Fetch Cycle» Decode Cycle» Execution Cycle

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I/O

Memory

MAR

PC

AddressingRegisters

Control

I R

Arithmetic

A Reg ALU

Input Bus

Output Bus

To MAR

To Mem

To I/O

2A

2A

2A 156C

1 56C

2A

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I/O

Memory

MAR

PC=PC+1

AddressingRegisters

Control

I R

Arithmetic

A Reg ALU

Input Bus

Output Bus

To MAR

To Mem

To I/O

2B=2A+1

2A

2A 156C

1 56C

2A

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I/O

Memory

MAR

PC

AddressingRegisters

Control

I R

Arithmetic

A Reg ALU

Input Bus

Output Bus

To MAR

To Mem

To I/O

2B

6C 96

1 56C

2A

Op CodeOperand

2A 156C

Reg 5

Load into Reg 5 from RAM

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I/O

Memory

MAR

PC

AddressingRegisters

Control

I R

Arithmetic

A Reg ALU

Input Bus

Output Bus

To MAR

To Mem

To I/O

2B

6C 96

1 5 6C

2A

Op CodeOperand 6C

2A 156C

Reg 5

Load into Reg 5 from RAM address 6C

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I/O

Memory

MAR

PC

AddressingRegisters

Control

I R

Arithmetic

A Reg ALU

Input Bus

Output Bus

To MAR

To Mem

To I/O

2B

6C 96

1 56C

6C

Op CodeOperand 6C

2A 156C

Reg 596

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Other Architectures:• Complex Instruction Set

Computers(CICS) versus Reduced Instruction Set Computers(RISC)

• Pipeline Architecture• Multiprocessor Architecture

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CISC versus RISC :• The complex

machines is harder and more costly to build

• Perhaps costs more to operate

• Many of complex insts. Can find limited applications

• CISC machine contains a block of special memory cells known as micromemory

• A micromemory contains a program stored in it called microprogram

• The microprogram directs the fetch-decode-execute cycle of the CPU

• Example of CISC are Pentium microprocessors

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CISC versus RISC• The design of simple

machine with small, well-designed instruction set

• Removes the complexity involved with micromemory

• Results in a simpler CPU design

• Programs represented in machine language must be longer than

those in a CISC arch. because: several instructions are required to perform the complex operations represented by single instruction in CISC

• Example of RISC PowerPC series developed by IBM,Apple

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Pipeline Architecture :• Several Instructions are processed at

the same time• Since the execution speed of the

instruction is constant. Scientists turned to the concept of Throughput

• Throughput refers to the total amount of work the machine can accomplish in a given amount of time rather than to how long it takes to do one task

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Multiprocessor Machines:• Another approach to increase the throughput

fall under Parallel Processing classification• To implement the parallel concept there are

several approaches: Attach several processing units, each

resembling the CPU in a single processor machine. This results in three types:

» SISD(Single Instruction Single Data)» SIMD(Single Instruction Multiple data)» MIMD(Multiple Instruction Multiple Data) To have a large machine with several

machines , each has its own memory and CPU.

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Arithmetic Logic Instructions :

• They are arithmetic, logic, and shift operations• Examples of logic: AND, OR, XOR• The use of AND operation is an example of the

process called Masking, determining which part of other operand will affect the result

• To mask all the bits of certain byte except the third bit from right :

1101 0111 Original Byte 0000 0100 Masking Byte ------------------- 00000100 Original Byte after

Masking

Unmasked Bit

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Arithmetic Logic Instructions :

• The use of OR operation is also an example of the process called Masking, determining which part of other operand will affect the result

• To mask all the bits of certain byte except the third bit from right :

1101 0111 Original Byte 1111 1011 Masking Byte ------------------- 1111 1111

Unmasked Bit

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Arithmetic Logic Instructions :• The use of XOR operation is finding the 1’s- complement

• To obtain the 1’s-complement of a byte, XOR it with a byte containing 1’s:

1101 0111 Original Byte 1111 1111 XOR ------------------- 0010 1000 1’s-complement of

the original Byte

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Shift and Rotate :• The shift and rotate are necessary

operations for alignment • Alignment means preparing a byte for

future use in masking operations or manipulating the mantissa or floating-point representations

• Shift: Classified into Logical and Arithmetic Shift

• Logical Shift: Always fills zero when shifting is performed. To perform 2-bit Shift left on the byte(101101110):1 0110 1110 Original Byte0 1101 1100 1-bit shift left1 1011 1000 2-bit shift left

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Shift and Rotate• Arithmetic Shift: Leaves the sign Bit

Unchanged, handled through an intermediary device known as controller

• Rotate: Is a circular shift, to perform 2-bit rotate left for the byte(101101110) :1 0110 1110 0 1101 1101 1-bit rotate left1 1011 1010 2-bit rotate left

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Computer-Peripheral Communications:• The word peripheral is

referred to the input/output units attached to the computer

• The communication between the CPU and the peripheral devices is handled through an intermediary device known as the controller

• Each controller handles communication for a particular type of peripheral device

CPU Main Memory

Controller

Peripheral Device

Controller

Peripheral Device

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Computer-Peripheral Comm.• The controllers are often

small computers within themselves, each with its own memory circuitry and CPU performs a program directing the activities of the controller

• The ability of the controller to access the main memory is called Direct Memory Access (DMA)

• If a controller has DMA then the CPU ask the controller to write data to the main memory instead of it, and also can ask the controller to read data from the CPU.

CPU

DMA

Controller

Peripheral Device

Main Memory

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CPU-Controller Communication :• Communication

between a CPU and a controller is handled in much the same way as that between the CPU and main memory

• In many machines, the controller is disguised as a block of main memory cells. When CPU writes a bit pattern to a memory cell within that block, it is really transferred to the controller rather than memory. This is termed Memory-Mapped I/O

CPU

Main Memory

Controller

Peripheral Device

Memory-Mapped I/O

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Parallel and Serial Communication

Communication between portions of a computer system or between two computers takes one of two basic forms: parallel or serial

• Parallel Communication : all the bits in the bit pattern are transferred at the same time, each on a separate line

• Such a technique is capable of transferring data rapidly but requires a relatively complex communication path which results in the use of multiwire cables

• Used for short distances communication

• Serial Communication: is based on transmitting only one bit at a time

• This technique tends to be slower but requires a simpler data path because all the bits are transferred over the same line, one after the other

• Used for large distances communication