M AN884

INTRODUCTIONOperational amplifiers (op amps) that drive largecapacitive loads tend to have peaking and oscillationproblems when they are not properly compensated.Other problems include: reduced bandwidth, loweroutput slew rate, and higher power consumption.This application note explains why these problemsoccur, how to modify the op amp circuit for betterperformance, and how to quickly compute circuitvalues.

SIMPLIFIED OP AMP MODELIn order to understand how capacitive loads affect opamps, we must look at the op amp output impedanceand bandwidth. Figure 1 shows a simplified AC modelof an op amp configured for a non-inverting gain of GN.The open-loop gain is represented by the dependentsource with gain AOL(s), where s = j = j2f. The outputstage is represented by the resistor RO (open-loop out-put resistance).

FIGURE 1: Op amp model.We will include gain bandwidth product (fGBP), the

f2P models the open-loop gains reduced phase margin(PM < 90) at high frequencies due to internalparasitics. Both f2P and the capacitive load (CL) reducethe feedback loops phase margin.

The op amp feedback loop (RF and RG) causes itsclosed-loop behavior to be different from its open-loopbehavior. Gain bandwidth product (fGBP) and open-loop output impedance (RO) are modified to giveclosed-loop bandwidth (f3dBA) and output impedance(ZOUT). We can analyze the circuit in Figure 1 togive:

Figure 2 shows ZOUTs behavior. At low frequencies, itis constant because the open-loop gain is constant. Asthe open-loop gain decreases with frequency, ZOUTincreases. Past f3dB, the feedback loop has no moreeffect and ZOUT stays at RO. The peaking at GN = +1 iscaused by the reduced phase margin due to f2P.

FIGURE 2: MCP6271s Closed-Loop Output Impedance vs. Frequency.

Author: Kumen BlakeMicrochip Technology Inc.

VE

VIN

VOUTROVEAOL(s)

RFRG

ZOUT

GN 1RFRG-------+=

f3dBAfGBPGN-----------

ZOUT RO 1AOL s( )

GN-----------------+ = , RF R+ G RO

0.001

0.01

0.1

1

10

100

1000

1.E-01 1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07

Frequency (Hz)

Out

put I

mpe

danc

e ( :

)

0.1 10k 100k 1M 10M

GN = +1GN = +10GN = +100

1k100101

Driving Capacitive Loads With Op Amps 2003 Microchip Technology Inc. DS00884A-page 1

open-loop gains second pole (f2P) and the non-inverting gain (GN) in our open-loop gain (AOL(s))model. Low frequency effects are left out for simplicity.

Figure 3 shows a simple AC model that approximatesthis behavior. The amplifier models the no-load gainand bandwidth, while the inductor and resistor modelthe output impedance vs. frequency.AOL s( ) 1

s GNGBP-------------- 1 s

2P---------+

AN884FIGURE 3: Simplified AC model.The equations for LOUT and ROUT are:

Note that ROUT is larger than RO in order to includef2Ps phase shift effects, especially at low gain (GN).

CAPACITIVE LOAD COMPENSATIONOur discussion on compensating capacitive loads isdivided into three topics. First, we will show the effectof capacitive loads when there is no compensation.Second, we will show a simple compensation method,and how it improves circuit behavior. Last, we will showhow to deal with inverting circuits.

Capacitive LoadFigure 4 shows a non-inverting gain circuit with anuncompensated capacitive load. For small capacitiveloads and high gains (typically CL/GN < 100 pF), thiscircuit works quite well.

FIGURE 4: Uncompensated capacitive load.Replacing the op amp in Figure 4 with the simplified opamp AC model gives a LC resonant circuit (LOUT andCL). When CL becomes large enough, ROUT does apoor job of dampening the LC resonance, whichcauses peaking and step response overshoot. Also,the overall closed-loop bandwidth (f3dB) is reduced.

We recommend setting RF + RG >> ROUT for bettercircuit performance. A simplified transfer function is:

Now that we have estimates of fP and QP, we can usethe equations in Appendix A to estimate bandwidth(f3dB), frequency response peaking (HPK/GN) and stepresponse overshoot (%ovrsht). Note that f3dB is not thesame as the op amps no load -3dB bandwidth (f3dBA).

MCP6271 Example (Uncompensated)The equations above were used to generate the curvesin Figure 5 and Figure 6 for Microchips MCP6271 opamp. The parameters used are (see Appendix B):fGBP = 2.0 MHz, f2P = 4.5 MHz and RO = 360. As canbe seen at GN = =+1 V/V and CL = 100 pF, theresponse peaks enough to be a concern.

FIGURE 5: Estimate of MCP6271s AC response with GN = +1.

FIGURE 6: Estimate of MCP6271s AC response with GN = +10.

VINGN

RF+RG

ROUT

LOUT

1 + s/3dBA

LOUT GNRO 2fGBP( )=

ROUT RO 1fGBP

GN f2P----------------- ,

fGBPGN

----------- f2P

2---------

VIN

RG

CL

VOUT

RF

MCP6xxx

VOUTVIN

------------- GN 1s

PQP-------------- s

2

P2

-------+ +

where:P 2fP 1 LOUTCL= =

QP ROUT CL LOUT= , RF R+ G ROUT

-20

-15

-10

-5

0

5

10

15

1.E+04 1.E+05 1.E+06 1.E+07 1.E+08

Frequency (Hz)

Gai

n (d

B)

10k 1M 100M

GN = +1

CL = 10 pFCL = 100 pF

CL = 1 nF

10M100k

0

5

10

15

20

25

30

35

1.E+04 1.E+05 1.E+06 1.E+07 1.E+08

Frequency (Hz)

Gai

n (d

B)

10k 1M 100M

GN = +10

CL = 100 pFCL = 1 nF

CL = 10 nF

10M100kDS00884A-page 2 2003 Microchip Technology Inc.

AN884

The peaking (HPK/GN) should be near 0 dB for the bestoverall performance. Keeping the peaking below 3 dBusually gives enough design margin for changes in opamp, resistor and capacitor parameters overtemperature and process. However, the performance isdegraded.

For this example, our formulas give the estimatedresults shown in Table 1. As CL increases and gaindecreases, there is more peaking.

TABLE 1: RESPONSE ESTIMATES

Compensated Capacitive LoadThe simplest compensation method for capacitiveloads is shown in Figure 7. The resistor RISO is used toload down the LC resonant circuit, which reducesfrequency response peaking. As can be seen, RISOdoes not change the DC response or power and onlycosts one additional resistor.

FIGURE 7: Compensated capacitive load.The simplified op amp AC model produces thefollowing transfer function, where, again, we requireRF + RG >> ROUT.

With these equations, we can now find a reasonableRISO value. When QP = 1/2, the response has thehighest possible bandwidth without peaking, and theequations are in their simplest form.

MCP6271 Example (Compensated)These equations were used to compensate theMCP6271 circuits represented in Figure 5 andFigure 6. The same parameters were assumed, withthe only change being the addition of RISO. Theimproved results are shown in Figure 8 and Figure 9.Table 2 shows much better results than Table 1.

FIGURE 8: Estimate of MCP6271s compensated AC response with G = +1.

FIGURE 9: Estimate of MCP6271s compensated AC response with G = +10.

Circuit Response

GN(V/V)

CL(F)

fP(Hz)

QP( )

f3dB(Hz)

HPK/GN(dB)

%vrsht(%)

1.0 10p 9.4M 0.31 3.2M 0 0100p 3.0M 0.98 3.7M 1.1 15

1n 940k 3.1 1.4M 9.9 6010.0 100p 940k 0.22 220k 0 0

1n 300k 0.71 295k 0 410n 94k 2.2 140k 7.2 49

RISOVIN

RG

CL

VOUT

RF

MCP6XXX

VOUTVIN

------------- GN 1s

PQP-------------- s

2

P2

-------+ +

where:

P 2fP 1 LOUTCL 1RISOROUT-------------+ = =

QP 1 PLOUTROUT------------- RISOCL+ = , RF R+ G ROUT

QP 1 2 0.707=

RISO 0= , CL LOUT 2ROUT2( )

RISOLOUT

ROUTCL---------------------

2ROUT2 CL

LOUT------------------------ 1= , CL

LOUT2ROUT

2----------------->

-20

-15

-10

-5

0

5

10

15

20

1.E+04 1.E+05 1.E+06 1.E+07 1.E+08

Frequency (Hz)

Gai

n (d

B)

10k 1M 100M

GN = +1

CL = 10 pFRISO = 0

CL = 100 pFRISO = 523

CL = 1 nFRISO = 232

100k 10M

0

5

10

15

20

25

30

35

1.E+04 1.E+05 1.E+06 1.E+07 1.E+08

Frequency (Hz)

Gai

n (d

B)

10k 1M 100M

GN = +10

CL = 100 pFRISO = 0

CL = 1 nFRISO = 0

CL = 10 nFRISO = 226

100k 10M 2003 Microchip Technology Inc. DS00884A-page 3

AN884

TABLE 2: RESPONSE ESTIMATES.

Figure 10 shows the RISO values for the MCP6271estimated by the above equations. It is shown versusnormalized load capacitance (CL/GN) for ease ofinterpretation. Measured data for one representativepart is shown in Figure 11.

FIGURE 10: Estimated RISO for the MCP6271.

FIGURE 11: Recommended RISO for the MCP6271.The main difference between Figure 10 and Figure 11is at GN = +1. The reduced phase margin at low GN(caused by f2P) requires additional compensation atlow CL. The simplified equations in this application notegive reasonable estimates in this condition, but are notexact.

When large capacitive loads give lower op amp band-width than desired, refer to Microchips line of PowerMOSFET Drivers at www.microchip.com.

Inverting GainsInverting gain circuits (see Figure 12) arecompensated in the same way as non-inverting gaincircuits. Since the inverting input of the op amp is atvirtual ground, the load presented to the output by thefeedback network is now RF instead of RF + RG. Thus,we need to set RF >> ROUT. Use the noise gain:

in the previous equations, even though the invertinggain is -RF/RG. For example, an inverting gain of-1 V/V gives GN = +2. The reasons for this behaviorcome from op amp feedback theory [1, 3].

FIGURE 12: Compensated inverting gain circuit.

SLEW RATEIn Figure 7 and Figure 12, the op amp will produce anoutput current (IOUT) that goes into CL. This currentcannot exceed the op amps output short circuit current(ISC). This current limit causes the output slew rate tobe limited (SRCL). Note that SRCL is independent of theop amps internally-set slew rate (SR). We can deriveSRCL as follows.

Slew Rate and Sine WavesSine waves with edge rates faster than SRCL or SR willcause signal distortion problems. The sine wave

Circuit Response

GN(V/V)

CL(F)

RISO()

fP(Hz)

QP( )

f3dB(Hz)

HPK/GN(dB)

%vrsht(%)

1.0 10p 0 9.4M 0.31 3.2M 0 0100p 523 2.1M 0.71 2.1M 0 41n 232 780k 0.71 780k 0 4

10.0 100p 0 940k 0.22 220k 0 01n 0 300k 0.71 300k 0 410n 226 74k 0.71 74k 0 4

10

100

1,000

1.E-11 1.E-10 1.E-09 1.E-08

Normalized Load Capacitance; CL/GN (F)

Estim

ated

RIS

O ( :

)

10p 1n 10n

1k

100p10

GN = +1GN = +2GN t +5

100

10

100

1,000

10 100 1,000 10,000

Normalized Load Capacitance; CL / GN (F)

Rec

omm

ende

d R I

SO (

)

GN = +1GN = +2GN +5

10p 100p 1n 10n

One representative part

GN 1RFRG-------+=

VIN

RISO

CL

VOUT

RF

MCP6XXX

RG

dVOUT t( )dt

------------------------IOUT t( )

CL-------------------=

SRCL maxdVOUT t( )

dt------------------------

ISCCL--------= =

where:SRCL is in units of V/s

VOUT t( ) VM 2ft( )sin=DS00884A-page 4 2003 Microchip Technology Inc.

AN884

has a maximum edge rate of

Thus, we need to keep

One solution is to low-pass filter the signal before itreaches CL. The filter bandwidth needs to satisfy

Another solution is to add RISO, as shown in Figure 7and Figure 12. The maximum current occurs whenVOUT(t) = 0; at this point the voltage across RISO is VM.Thus, we need

This choice will also reduce the signal bandwidth tomeet the limit given above. The equations in theCompensated Capacitive Load section andAppendix A can be used to find the resultingperformance as long as the signals slew rate does notexceed SR or SRCL.When large capacitive loads cause a lower slew ratethan desired, refer to Microchips line of PowerMOSFET Drivers at www.microchip.com.

Sine Wave ExampleLets look at the MCP6271 with G = +1 V/V andCL = 1.0 F. In Appendix B, we find SR = 0.9 V/s andISC = 25 mA. This gives:

which is much lower than SR. With a maximum peakvoltage of 2.5VPK, we need an input signal with abandwidth less than 1.8 kHz.If we use RISO to limit the output current, we need it tobe > 100. Setting RISO = 130 gives:

Note that if we used the RISO value for responsepeaking elimination (7.6), we would achieve a widerbandwidth (29 kHz), but would need to keepVM < 0.15 VPK to avoid output current limiting andsevere signal distortion.

Slew Rate and Square WavesSquare waves with fast edges can also cause prob-lems with capacitive loads. The maximum edge rate ofa square wave with a (10% to 90%) rise time of tr anda peak-to-peak voltage of VPP, can be approximatedas:

Thus, we need to keep

One solution to this problem is to use square waveswith lower edge rates (higher tr). Filtering the squarewaves (lowpass filter bandwidth < 0.35/tr) is anotherapproach. Using slower logic gates may be a solutionin some cases. It is also possible to add RISO, as shownin Figure 7 and Figure 12. The maximum currentoccurs when the ideal output just reaches the new leveland VOUT(t) is still slew rate limited. To keep IOUT < ISC,we need:

Using RISO will both slow the edges down and changethe shape of the transitions.

When large capacitive loads cause a lower slew ratethan desired, refer to Microchips line of PowerMOSFET Drivers at www.microchip.com.

Square Wave ExampleLets use the MCP6271 with G = +1 V/V andCL = 100 nF. In Appendix B, we find SR = 0.9 V/s andISC = 25 mA. We can then calculate:

which is significantly slower than SR. With a maximumvoltage swing of 5.0VPP, we need an input signal with arise time > 16 s.Filtering the input square wave at the input of the opamp would require a bandwidth less than 22 kHz.If we use RISO to limit the output current, (with amaximum voltage swing of 5.0VPP and an input risetime of 10 s), we need RISO > 75. SettingRISO = 100 gives:

QP = 0.046f3dB = 1.2 kHz

maxdVOUT t( )

dt------------------------ 2fVM=

where:VM is the peak output voltage

2fVM min SRCL SR,( )

SRCL 0.028V/s=

QP = 0.18f3dB = 16 kHz

maxdVOUT t( )

dt------------------------

0.8VPPtr

-----------------

0.8VPP tr min SRCL SR,( )

SRCL 0.25V/s= 2003 Microchip Technology Inc. DS00884A-page 5

AN884

Note that if we used the RISO value for responsepeaking elimination (24.0), we would achieve a widersmall signal bandwidth (92 kHz), but would need tokeep VPP < 3.7VPP to avoid output current limiting andreduced rise and fall times.

POWER DISSIPATIONIt is well known that reactive elements (ideal capacitorsand inductors) do not dissipate power. However, an opamp driving a reactive load will dissipate power. Thishappens because load current in the output stagealways flows in a direction that dissipates power. Theoutput transistors rectify the load current.Figure 7 and Figure 12 show the circuits underdiscussion. There will be no DC load current becauseCL blocks DC. At low frequencies, IQ (op ampsquiescent current) and CL will dominate the outputcurrent behavior. At high frequencies, RISO willdominate.Given an output voltage of

it can be shown that the average power dissipated bythe op amp at low frequencies is:

The power dissipation increases with frequencybecause CL dominates the load.At high frequencies, the average power dissipated bythe op amp becomes constant because RISOdominates:

In the frequency range where neither CL or RISOdominates the load (f 1/(2RISOCL)), a somewhatconservative estimate of POA is the minimum valuefrom the two formulas above.

DESIGN VERIFICATIONWe recommend that you always verify the performanceof your circuit design with SPICE simulations and bybreadboarding it on the bench. SPICE macro models ofMicrochips op amps are available on the Microchipweb site at www.microchip.com for your convenience.

SUMMARYWe have seen that op amps that drive large capacitiveloads tend to show peaking and oscillation, reducedbandwidth, lower output slew rate, and higher powerconsumption. Adding one resistor to the circuit cangreatly improve the performance. The resulting band-width is a little under the no load bandwidth.

Simple formulas were given that allow a circuitdesigner to quickly evaluate the impact of capacitiveloads. The fix is easy to implement and understand.

Designs that need to drive large capacitors at highbandwidth or rise time may benefit from usingMicrochips line of Power MOSFET Drivers.

VOUT t( ) VM 2ft( )sin=

POA VDD VSS( ) IQ 2VMfCL+( )= , f1

2RISOCL--------------------------

POA VDD VSS( ) IQVM

RISO---------------+

VM2

RISO-----------= ,

f 12RISOCL--------------------------DS00884A-page 6 2003 Microchip Technology Inc.

AN884

APPENDIX A: RESPONSE MODELIn this application note, we have seen transfer func-tions of the form:

This is a 2nd order, low-pass response, which modelsthe op amp circuits in this application note reasonablywell. We will show some simple formulas for sine waveand step responses which help evaluate the perfor-mance of the circuits in this application note [2,4].Given fP (P = 2fP) and QP, we can calculate the band-width (f3dB), peak response frequency (fPK) and gainpeaking (HPK/GN) for a sine wave as follows:

The step response overshoot (%ovrsht) and rise time (tr)are calculated, as follows:

It is relatively simple to extract K, fP and QP from fre-quency response simulations or measurements.

K is the gain at low frequencies (f

HPKK---------- 1= , QP 1 2

HPKK---------- QP 1

14QP

2----------= , QP 1 2>

%ovrsht 0%= , QP 1 2

%ovrsht 100%( )e 4QP

2 1( )= , QP 1 2>

tr 0.35 f3dB

Part fGBP(Hz)f2P(Hz)

SR(V/s)

RO()

ISC(mA)

MCP6041 14k 45k 0.0030 37k 21TC1034 (Note 1)

60k 1.1M 0.035 15k 8

MCP6141 100k 55k 0.024 28k 21MCP606 155k 620k 0.080 4.2k 17MCP616 190k 1.1M 0.080 5.0k 17MCP6001 1.0M 45M 0.6 780 23MCP6271 2.0M 4.5M 0.9 360 25MCP601 2.8M 20M 2.3 680 20MCP6281 5.0M 14M 2.5 170 25MCP6291 10M 27M 7.0 105 25MCP6021 10M 124M 7.0 110 30

Note 1: These parameters also apply to theTC1026, TC1029, TC1030 and TC1035.

2: f2P can be estimated from the Open-LoopGain plots in the data sheet. Estimate thefrequency (f-135) where the Open-LoopPhase is -135 (i.e., the phase margin is45). Adjust for the typical capacitive loadused in the measurements (CLtyp):

CLtyp 2f 135 ROCLtyp( )atan

f2P f 135 45 CLtyp( )tan , CLtyp 40

f2P 12f 135 , CLtyp 40> 2003 Microchip Technology Inc. DS00884A-page 7

AN884

APPENDIX C: REFERENCES[1] Bonnie Baker, Operational Amplifier AC

Specifications and Applications, Microchip Application Note 723 (DS00723).

[2] Charles Phillips and H. Troy Nagle, Digital Control System Analysis and Design, 2nd ed., Prentice Hall, 1990, pp 192-3.

[3] Adel Sedra and Kenneth Smith, Microelectronic Circuits, 3rd ed., Saunders College Publishing, 1991, Chapter 8.

[4] Benjamin Kuo, Automatic Control Systems, 5th ed., Prentice Hall, 1987.DS00884A-page 8 2003 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices: Microchip products meet the specification contained in their particular Microchip Data Sheet.

Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions.

There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our er ou of in

rned

er cae.

mittemay b workInformation contained in this publication regarding deviceapplications and the like is intended through suggestion onlyand may be superseded by updates. It is your responsibility toensure that your application meets with your specifications.No representation or warranty is given and no liability isassumed by Microchip Technology Incorporated with respectto the accuracy or use of such information, or infringement ofpatents or other intellectual property rights arising from suchuse or otherwise. Use of Microchips products as criticalcomponents in life support systems is not authorized exceptwith express written approval by Microchip. No licenses areconveyed, implicitly or otherwise, under any intellectualproperty rights.

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Microchip is willing to work with the customer who is conce

Neither Microchip nor any other semiconductor manufacturmean that we are guaranteeing the product as unbreakabl

Code protection is constantly evolving. We at Microchip are comproducts. Attempts to break microchips code protection feature allow unauthorized access to your software or other copyrighted 2003 Microchip Technology Inc.TrademarksThe Microchip name and logo, the Microchip logo, Accuron,dsPIC, KEELOQ, MPLAB, PIC, PICmicro, PICSTART, PRO MATE and PowerSmart are registered trademarks ofMicrochip Technology Incorporated in the U.S.A. and othercountries.

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Application Maestro, dsPICDEM, dsPICDEM.net, ECAN,ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort,

tside the operating specifications contained in Microchip's Data tellectual property.

about the integrity of their code.

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d to continuously improving the code protection features of oure a violation of the Digital Millennium Copyright Act. If such acts, you may have a right to sue for relief under that Act.DS00884A-page 9

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Serialized Quick Turn Programming (SQTP) is a service markof Microchip Technology Incorporated in the U.S.A.

All other trademarks mentioned herein are property of theirrespective companies.

2003, Microchip Technology Incorporated, Printed in theU.S.A., All Rights Reserved.

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Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Companys quality system processes and procedures are QS-9000 compliant for its PICmicro 8-bit MCUs, KEELOQ code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchips quality system for the design and manufacture of development systems is ISO 9001 certified.

DS00884A-page 10 2003 Microchip Technology Inc.

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ASIA/PACIFICAustraliaSuite 22, 41 Rawson StreetEpping 2121, NSWAustraliaTel: 61-2-9868-6733 Fax: 61-2-9868-6755China - BeijingUnit 915Bei Hai Wan Tai Bldg.No. 6 Chaoyangmen Beidajie Beijing, 100027, No. ChinaTel: 86-10-85282100 Fax: 86-10-85282104China - ChengduRm. 2401-2402, 24th Floor, Ming Xing Financial TowerNo. 88 TIDU StreetChengdu 610016, ChinaTel: 86-28-86766200 Fax: 86-28-86766599China - FuzhouUnit 28F, World Trade PlazaNo. 71 Wusi RoadFuzhou 350001, ChinaTel: 86-591-7503506 Fax: 86-591-7503521China - Hong Kong SARUnit 901-6, Tower 2, Metroplaza223 Hing Fong RoadKwai Fong, N.T., Hong KongTel: 852-2401-1200 Fax: 852-2401-3431China - ShanghaiRoom 701, Bldg. BFar East International PlazaNo. 317 Xian Xia RoadShanghai, 200051Tel: 86-21-6275-5700 Fax: 86-21-6275-5060China - ShenzhenRm. 1812, 18/F, Building A, United PlazaNo. 5022 Binhe Road, Futian DistrictShenzhen 518033, ChinaTel: 86-755-82901380 Fax: 86-755-8295-1393China - ShundeRoom 401, Hongjian BuildingNo. 2 Fengxiangnan Road, Ronggui TownShunde City, Guangdong 528303, ChinaTel: 86-765-8395507 Fax: 86-765-8395571China - QingdaoRm. B505A, Fullhope Plaza,No. 12 Hong Kong Central Rd.Qingdao 266071, ChinaTel: 86-532-5027355 Fax: 86-532-5027205IndiaDivyasree Chambers1 Floor, Wing A (A3/A4)No. 11, OShaugnessey RoadBangalore, 560 025, IndiaTel: 91-80-2290061 Fax: 91-80-2290062JapanBenex S-1 6F3-18-20, ShinyokohamaKohoku-Ku, Yokohama-shiKanagawa, 222-0033, JapanTel: 81-45-471- 6166 Fax: 81-45-471-6122

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EUROPEAustriaDurisolstrasse 2A-4600 WelsAustriaTel: 43-7242-2244-399Fax: 43-7242-2244-393DenmarkRegus Business CentreLautrup hoj 1-3Ballerup DK-2750 DenmarkTel: 45-4420-9895 Fax: 45-4420-9910FranceParc dActivite du Moulin de Massy43 Rue du Saule TrapuBatiment A - ler Etage91300 Massy, FranceTel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79GermanySteinheilstrasse 10D-85737 Ismaning, GermanyTel: 49-89-627-144-0 Fax: 49-89-627-144-44ItalyVia Quasimodo, 1220025 Legnano (MI)Milan, Italy Tel: 39-0331-742611 Fax: 39-0331-466781NetherlandsP. A. De Biesbosch 14NL-5152 SC Drunen, NetherlandsTel: 31-416-690399 Fax: 31-416-690340United Kingdom505 Eskdale RoadWinnersh TriangleWokingham Berkshire, England RG41 5TUTel: 44-118-921-5869Fax: 44-118-921-5820

07/28/03

WORLDWIDE SALES AND SERVICE