M. Kreider,T. Fleck

WhiteRabbit

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WhiteRabbitTiming System

M. Kreider,T. Fleck

WhiteRabbit

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WhiteRabbit is designed to do...

• Time Synchronisation

• Timestamping

• Deterministic Switching

• Machine Control

Goals

M. Kreider,T. Fleck

WhiteRabbit

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WhiteRabbit offers...

• Timing Accuracy: < 1ns, low ps jitter

• Robustness: event loss < 10-12

• Scalability: 2000 timing receivers

• Link length: up to 10 km

Features

M. Kreider,T. Fleck

WhiteRabbit

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WhiteRabbit employs ...

• SyncE – Synchronous Ethernet

• PTP – Precision Timing Protocol

• QoS – Quality of Service

• FEC – Forward Error Correction

Technology

M. Kreider,T. Fleck

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SyncE: One clock is enough

• Nodes adjust to same physical clock

• Clock encoded in Ethernet carrier

• Clock recovered by PLL

SyncE – Synchronous Ethernet

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SyncE – Synchronous Ethernet

System TimingMaster

multi-layeredWR Switches

WRNodesGPS

The way of the Rabbit: WR Clock propagation

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PTP – Precision Time Protocol

Precise phase measurement – Aiming for accuracy

• Undersample Clocks

• Feed resulting alias frequencies to PLL

• Determine phase difference

M. Kreider,T. Fleck

WhiteRabbit

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PTP – Precision Time Protocol

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PTP – Precision Time Protocol

PTP – Time Sync at a handshake

• Exchange messages between nodes

• Timestamp Msg arrivals and departures

• Calculate link delay and time difference

• Share results, adjust client clock

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PTP – A Simplified Example

M. Kreider,T. Fleck

WhiteRabbit

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PTP – A Simplified Example

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PTP – A Simplified Example

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PTP – A Simplified Example

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PTP – A Simplified Example

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PTP – A Simplified Example

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PTP – A Simplified Example

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PTP – A Simplified Example

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PTP – A Simplified Example

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PTP – A Simplified Example

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QoS – Not all packets were created equal

• Ethernet traffic split into:High Priority (HP) packetsStandard Priority (SP) packets

• HP packets can preempt other packets „on-the-fly”

QoS - Preemption & Determinism

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Port 1

Port 2

Port 3

WR Switch

SP Packet

HP Packet

SP… HP Packet Packet

QoS - Preemption & Determinism

QoS – Allowing to cut the line

M. Kreider,T. Fleck

WhiteRabbit

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Timing Data Master – Telling everyone what to do

• Generate Event Sequences

• Control Accelerator Production Chains

• Real Time Parallel Scheduling in FPGA

• Granularity Window for Load Balancing

FAIR Timing Master

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TODO: WR Switch Slide

WhiteRabbit Hardware

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SPEC - Simple PCIe FPGA-Mezzanine-Card Carrier Board

WhiteRabbit Hardware

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Where WhiteRabbit is now:

• High precision Time Sync functionality since 2009

• Switch, master and receiver specs in progress

• WR switch prototype since 2010

• WR protocol implementation under development

Status

M. Kreider,T. Fleck

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Where WhiteRabbit will be:

• Timing receiver board prototype late 2011

• WR capable ‚Simple PCIe FMC carrier‘ board early 2011

• WR Switch board manufacture in 2011

• FAIR Timing Data Master prototype in 2011

Perspective

M. Kreider,T. Fleck

WhiteRabbit

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Thank you for your attention

M. Kreider,T. Fleck

WhiteRabbit

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Time for your Questions? ??

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