Post on 26-Mar-2018
Predictable Success
What can ATPG do for Switching ActivityRohit KapurApril, 2009
© 2007 Synopsys, Inc. (2)
Predictable Success
Outline
• Who Cares About Power• Power-Aware ATPG Goals• Calculating Power During Test• Power-Aware ATPG• Interesting Research Work
© 2007 Synopsys, Inc. (3)
Predictable Success
Scan Yields – Funny Things Happen- SNUG09 San Jose, Anup Nayak Cypress
Passing Die Count
-100
0
100
200
300
400
500
600
700
800
900
1.00 1.10 1.20 1.30 1.40 1.50 1.60 1.70 1.80 1.90 2.00
Vcc (V)
4644505 20 ROOM 4644505 20 COLD 4644505 20 HOT
© 2007 Synopsys, Inc. (4)
Predictable Success
Why? - Cypress Data Cont. VCC Room Hot shift capture shift capture 2.10 2.05 2.00 1.95 1.90 1.85 1.80 1.75 1.70 1.65 1.60 1.55 1.50 1.45 1.40 1.35 1.30 1.25 1.20 1.15 1.10 1.05 1.00
© 2007 Synopsys, Inc. (5)
Predictable Success
0%
10%
20%
30%
40%
50%
60%
70%
0 50 100 150 200 250
Pattern Number
Switching Activity
FunctionalTest
Scan Testing is Power-HungryUp to 10X Peak Levels of Normal Operating Mode
© 2007 Synopsys, Inc. (6)
Predictable Success
Managing Power During Test Is Critical
• Power rails are not designed for peak power consumption during scan test
• Millions of flip-flops can switch simultaneously during scan test
• At-speed test requires minimizing IR-drop
© 2007 Synopsys, Inc. (7)
Predictable Success
Power-Aware ATPG Goal
Pattern Switching Activity
Num
ber o
f Pat
tern
s
Budget
Standard ATPG Distribution
Low-Power ATPG Distribution
20% 25% 30% 35% 40% 45% 50% 55%
Peak
© 2007 Synopsys, Inc. (8)
Predictable Success
Calculating Power During ATPG
• Need a computationally inexpensive way for calculating power during test
Use percentage cell toggles as a proxy for actual power consumptionCorrelates well against PTPX
© 2007 Synopsys, Inc. (9)
Predictable Success
Circuit for Switching Report Example
Q
clk
D
rstn
SI
Q
clk
D
rstn
SI
Q
clk
D
rstn
SI
Q
clk
D
rstn
SI
Q
clk
D
rstn
SI
Q
clk
D
rstn
SI
SI1
PI3
PI1
PI2
SI2
SO1 SO2CLK, RSTN, SE(NOT SHOWN IN PICTURE)
© 2007 Synopsys, Inc. (10)
Predictable Success
Pattern Example
0 00 00 0
SI1 SI2
SO1 SO2
RSTN = 0
0 00 00 0
SI1 SI2
SO1 SO2
RSTN = 1
PI1 = PI2 = PI3 = 0
SE = 1
Load scan chain 1 with 101
Load scan chain 2 with 101
Value Change
No Change
© 2007 Synopsys, Inc. (11)
Predictable Success
Pattern Example - Shift
1 10 00 0
SI1 SI2
SO1 SO2
After 1 shift
# of scan cell value changes = 2
0 01 10 0
SI1 SI2
SO1 SO2
After 2 shifts
# of scan cell value changes = 4
© 2007 Synopsys, Inc. (12)
Predictable Success
Pattern Example - Shift
1 10 01 1
SI1 SI2
SO1 SO2
After 3 shifts
# of scan cell value changes = 6
Total scan cell switching activity during shift = 2 + 4 + 6 = 12
Peak scan cell switching activity per shift = 6 @ shift position 3
© 2007 Synopsys, Inc. (13)
Predictable Success
Pattern Example - Capture Cycle
CLK, RSTN, SE(NOT SHOWN IN PICTURE)
Q
clk
D
rstn
SI
Q
clk
D
rstn
SI
Q
clk
D
rstn
SI
Q
clk
D
rstn
SI
Q
clk
D
rstn
SI
Q
clk
D
rstn
SI
SI1
PI3
PI1
PI2
SI2
SO1 SO2
1-> 0
0
1->0
1->00
1
0
0
0
0 0
1
10
1
0
1
0
© 2007 Synopsys, Inc. (14)
Predictable Success
Pattern Example - Capture
0 00 00 1
SI1 SI2
SO1 SO2
SE = 0
Pulse CLK
After Capture
# of scan cell value changes = 3
Total scan cell switching activity during capture = 3
Clock used for capture: CLK
© 2007 Synopsys, Inc. (15)
Predictable Success
Example – Power ReportPattern # Total Shift Peak Shift Shift
PosCapture
1 12 6 3 3
2 8 4 2 4
3 10 4 3 5
…
Pattern # Shift Pos Switching ActivityMax Total Shift 1 12Max Peak Shift 1 3 6Max Capture 3 5
© 2007 Synopsys, Inc. (16)
Predictable Success
Power-Aware ATPG
• Components of ATPG PowerShift PowerCapture Power
• Reducing Shift Power• Reducing Capture Power
© 2007 Synopsys, Inc. (17)
Predictable Success
Low-Power FillReduces Switching During Shift
0 · · 0 1 ·CARE BITS
RANDOM-FILL 0 1 0 0 1 0 4 transitions
1 transition
CLKSCAN_IN
0 0 0 0 1 1LOW-POWER FILL
© 2007 Synopsys, Inc. (18)
Predictable Success
Scan Compression and Power
Average power characteristics of compressed patterns compared to scan Average power characteristics of compressed patterns compared to scan
© 2007 Synopsys, Inc. (19)
Predictable Success
Reducing Capture Power
• Utilizing Clock-Gating Cells during ATPG
© 2007 Synopsys, Inc. (20)
Predictable Success
ATPG and Clock Domains
• ATPG operates in zero delay environment
• Strict DRC rules followed to ensure predicted capture values match actual values
• One DRC rule is to clock one clock at time. If no paths exist between two clocks, both clocks can be pulsed simultaneously.
(a) Independent clock domains where no FFs from one domain are connected to the other domain.
Clk 1 Clk 2
Clk 1 Clk 2X
X
(b) Clock domains when FFs from one domain are connected to the other domain.
© 2007 Synopsys, Inc. (21)
Predictable Success
Example
Clocked by CLK1 Clocked by CLK2
set atpg -POWER_Clocking_limit 80
(No more than 80% of scan cells should switch during capture)
Clock # scan cells
CLK1 6CLK2 4
Information from DRC
F1
F2Target Fault
Clock Scan Cells
Total Scan Cells
F1 CLK1 6 6
F2 CLK2 4 10
ATPG – Pattern 1
ATPG will not pulse CLK2 because scan cell switching may exceed max number
Total scan cells 10Allowed to switch 8
Primary fault
Secondary fault
© 2007 Synopsys, Inc. (22)
Predictable Success
Example 2
Clocked by CLK1 Clocked by CLK2
set atpg -POWER_Clocking_limit 50
(No more than 50% of scan cells should switch during capture)
Clock # scan cells
CLK1 6CLK2 4
Information from DRC
F1
F2Target Fault
Clock Scan Cells
Total Scan Cells
F1 CLK1 6 6
ATPG – Pattern 1
ATPG will pulse CLK1 because it is the only way to detect F1
Total scan cells 10Allowed to switch 5
Primary fault
Secondary fault
© 2007 Synopsys, Inc. (23)
Predictable Success
Identifying Clock-Gating Cells• Determine which cells are controlled by gated clocks
Simulate clocks to off-state • Cell clock value should be off
Simulate clocks to on-state• Cell clock value should be at X
Add cell to a list of cells potentially controlled by gated clocks
• Determine clock-gating cells• For each cell in list
• Set value of input cone sequential element to a known value• Check if X is resolved
• Generate list of clock-gating cells with associated weights
© 2007 Synopsys, Inc. (24)
Predictable Success
Identifying Clock-Gating Cells Example
CLK_2
2 CLOCKS: CLK_1, CLK_2
Active high
U4
EN
CLK
TEST_EN
EN_CLKCLK_1
U1 U2
U3SE
© 2007 Synopsys, Inc. (25)
Predictable Success
Example – Step 1 – Turn Off Clocks
CLK_2 = 0
2 CLOCKS: CLK_1, CLK_2
Active high
U4
EN
CLK
TEST_EN
EN_CLKCLK_1 = 0
U1 U2
U3SE
0
0
0
© 2007 Synopsys, Inc. (26)
Predictable Success
Example – Step 2 – Turn On Clocks
CLK_2 = 1
2 CLOCKS: CLK_1, CLK_2
Active high
U4
EN
CLK
TEST_EN
EN_CLKCLK_1 = 1
U1 U2
U3SE
1
0->X
0->X
U2 and U3 are possibly controlled by gated clocks
© 2007 Synopsys, Inc. (27)
Predictable Success
Example – Step 3 – Set Scan Cells
CLK_2 = 1
2 CLOCKS: CLK_1, CLK_2
Active high
U4
EN
CLK
TEST_EN
EN_CLKCLK_1 = 1
U1 U2
U3SE
1
X->1
X->1
U1 is a “clock-gating cell”that controls 2 scan cells
1
© 2007 Synopsys, Inc. (28)
Predictable Success
Identifying Clock-Gating Cells (2)
• Each clock domain is divided into sub-clock domains driven by clock-gating cells
• Minimum recommended power budget • computed based on the largest sub-clock domain
© 2007 Synopsys, Inc. (29)
Predictable Success
Utilizing Clock-Gating Cells During ATPG
• During ATPG monitor how many clock-gating cells are currently turned on
• Turn off any clock-gating cells that would cause budget to be exceeded
• Before fill perform low-power fill• Greedy algorithm
• Turn on a set of clock-gating cells that gets us close to the budget without exceeding it
• Turning off all remaining clock-gating cells
© 2007 Synopsys, Inc. (30)
Predictable Success
Power-Aware ATPG Example
• Suppose budget = 4500 scan cells• Suppose ATPG has turned on clock-
gating cell U1 to detect some faultThis results in 3000 scan cells possibly switching
• Since clock-gating cell U2 could cause the switching budget to be exceeded (3000+2000 > 4500), ATPG will turn it off
EN
CLK
TEST_EN
EN_CLK
U13000 Scancells
EN
CLK
TEST_EN
EN_CLK
U22000 Scancells
EN
CLK
TEST_EN
EN_CLK
U31000 Scancells
© 2007 Synopsys, Inc. (31)
Predictable Success
Table of ResultsMore Degrees of Freedom
Percent of Peak Capture (Budget) 100 95
(21)90
(20)85
(19)80
(17)75
(16)70
(15)65
(14)60
(13)55
(12)50
(11)45
(10)40(9)
35(8)
30(7)
25(5)
20(4)
15(3)
10(2)
5(1)
Pattern Count 20555 21509 22245 22137 21475 21979 22322 22145 22128 22917 23404 24171 26250 34071 35000 35000 35000 35000 35000 35000
Run Time 94392 92085 93255 86455 861291080001006981099411329089637210442175621 81747 81821 30278 31314 31543 32133 31340 28962
Average Shift (adj) 46.78 1.81 1.55 1.62 1.6 1.49 1.46 1.5 1.4 1.46 1.41 1.39 1.38 1.33 1.3 1.3 1.31 1.31 1.31 1.3
Average Capture 8.63 4.36 3.2 3.92 3.64 3.11 2.84 3.009 2.46 2.48 2.26 2.2 2.08 1.93 1.75 1.75 1.82 1.8 1.76 1.79
Peak Shift (adj) 50.49 5.33 5.17 4.9 4.63 4.77 4.28 3.85 3.96 3.69 3.52 3.28 3.24 3.07 2.91 2.85 2.86 2.67 2.71 2.67
Peak Capture 21.78 8.01 8.57 7.57 7.19 6.54 6.46 6.13 6.09 5.34 4.82 4.54 4.53 4.84 3.71 4.11 3.84 4.04 4.02 4.01
Minimum Recommended Low-Power ATPG Budget: 7.60%
© 2007 Synopsys, Inc. (32)
Predictable Success
Peak Capture Switching Percent
Pattern Count
Baseline21201917161514131211109
© 2007 Synopsys, Inc. (33)
Predictable Success
Is That All That Can Be Done!
© 2007 Synopsys, Inc. (34)
Predictable Success
What about Post Capture Data?
Pattern with Random fill0011101111011011110010110000011110101110100011000010000000010000110011000011000011100001000000110010001101011101110101001001101100000010110010100001111111111101 1110011111110010011000101100000000110100000100011011001101100011001110110100100111011000011111110100011000010101010001100110100011111110101001001011010110110110
Pattern with Adjacent fill0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000111111111111111111100000000000000000000000000000000000000000000 1111111111111111111111111111000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000011111111111
Response with Adjacent fillLLHLLLLLLHLLLLLLLLLLLLLLHLLLLLLHLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHHHHLHLLLLHLLLLLLLLLHLLLHLLLLLLLLLLLHLHLLLLLLLLLLLLHLHHLLLLLLLLLLLLLLLLHHLLLHHLLLLLLLLLLLLLLLHLLLLL LHLHHHHHHLLLLLLHLHLLHLHLHHHHHLHLLLLLLLLLLLHLLHLLLLLLLHLLLLLLLLLLLLLHLLLHLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLLLHLLLLLLLHLLLLLLLLLHLLLLLHHLLLLLHLLLLHLLLLHHHLLHLLHLHL
Response with Random fillLHLHHLHLHLHLHLLLLHLLLLHHLHLLHHHHLLLLHLHLHLHLHLHLHLHHHLHHLLLLLHLLLLLLLHHHHLLHLLLHHLHLLLLHHLLHLLLHHLLLLHLLLLLLHHLLHLHHLLLLLLLHLHLLLHLLLHLHHHLLLLHLLHLHLHLHHLHLHLLH LHHLLLLHHHHHLLHLLHLHLHHLHHLLHHHHHHHHLLHLHHLLLHLLHLLLLLLHLHHHLLHLLLLLHHHLLHLLLLHLLHLLLLLHLHLLLLLHLLLLLHHLHLLLLLLLLLLHLLHHLHLLLLLLLLHHLLLLLLHHLHLLLLLHHHLHLLLHLLLL
© 2007 Synopsys, Inc. (35)
Predictable Success
Adjacent Fill exists for Scan-out!C
orre
latio
n co
effic
ient
© 2007 Synopsys, Inc. (36)
Predictable Success
Adjacent Fill and Bad Fill Choices
20% patterns worse than random
© 2007 Synopsys, Inc. (37)
Predictable Success
Constant Data Fill and Peak Power
s13207
© 2007 Synopsys, Inc. (38)
Predictable Success
Using Correlation: Bounded Adjacent Fill
1xxx1xx101xxx1xxxx11xxx1xx101xxx1xxxx1
11111111011111111111111111101111111111
Adjacent fill
11111111010001000011111111101000100001
Bounded adjacent fill
|← d →|
© 2007 Synopsys, Inc. (39)
Predictable Success
BA Fill Underlying Concept
Min detection, fminDMin detection, fminD
Bounding distance, dBounding distance, d
Capture activity, CpeakCapture activity, Cpeak
More constrained
Less constrained
Monitor:
Constrain:
© 2007 Synopsys, Inc. (40)
Predictable Success
101010000000100000000010000010000000100000100010100000000000001010000000001000001010000010101000000000100000001000000010001010100010100000100010100000000010101000101010001010000000000010000000101000000010000010000010000000001010000000001010101000100000000010101010100000000000000010000010001000000010000000100000
fminD = 1000, dbound = 1add_scan_cell_constraintfminD = 500, dbound = 5add_scan_cell_constraint
000000000100000010010000101000000101000001000010000000000011110000100000010000000000000010011010100100000000100100000010000000011101001000000100100000000100000000101110000010000000001000000110001010000000000000101000100000000000000000100010100001000000000100000000100000000010001000001000000000000011000000000000
fminD = 200, dbound = 10add_scan_cell_constraint
000000000000000001100000000000000000000000110001111000000011100000000000011000000000000000000000011000000000000000000110011100000000100000100000000110000101111110000000000000000000000000000011001000000100000000000000000000011110000001000000011110011000000000000110100000001100000000111000010000000111000010000000
fminD = 20, dbound = 40add_scan_cell_constraint
...000000000000000000000000000000000000000111110111111111111111111111111111111
...111100000000000000000000000011111111111111110000000000000000000000000000000
...000000000000000000000000000000000000000000000000000000000000000000000000000
...111100000000000000000000000000000000000000000000000000000000000000000000000
fminD = 1, dbound = 300add_scan_cell_constraint
...000000000000000000000000000000011111100000000000000000000000000000000000000
...000000000000000000000000000000000000000000000000000000000000000000000000000
...000000000000000000000000000000000000000000000000000000000000000000000011110
...000000000000000000000000000000000000000000000001000000000111111111111111110
Bounded Adjacent Fill Algorithm
ATPG
Cpeak?Cpeak?
© 2007 Synopsys, Inc. (41)
Predictable Success
Experimental Results:Scan-in + Scan-out Shift Activity
© 2007 Synopsys, Inc. (42)
Predictable Success
Shift Switching Activity Graph
© 2007 Synopsys, Inc. (43)
Predictable Success
37.3 %28.6 % 39.0 %
49.5 %66.0 %
51.2 %
0
5000
10000
15000
20000
s13207 Ckt1 Ckt2 Ckt3 Ckt4 Ckt5
Random
Adjacent
Bounded
Capture Switching Activity
-68 % 2 %
-30 %
-19 %
-40 %
10 %
© 2007 Synopsys, Inc. (44)
Predictable Success
Test Pattern Comparison
© 2007 Synopsys, Inc. (45)
Predictable Success
Conclusion
• A lot can be done in ATPG for switching activity reduction.