Fabrication of general purpose gratings

Submitted by Guided by Vaibhav Rana Prof. K.N. Bhat Prof. Navakanta Bhat

Indian Institute of Science (IISc), Bangalore

Introduction•The resolution of a photoresist pattern begins to blur at around 45 nm half-pitch. For the semiconductor industry, therefore, multiple patterning was introduced for the 32 nm half-pitch node and below.•Sidewall Image Transfer (SIT) it is a technique which required optical lithography to obtain sub micron line width. •It comes under a class of technologies called as Multiple patterning for manufacturing integrated circuits (ICs), developed for photolithography to enhance the feature density. •The beauty of this method is that it uses optical lithography for patterning which makes it industry favorable.• For proving the positive traits of this technique I have compares it with conventional E-beam Lithography.

• Silicon Wafer (4 inch)a. 100 orientationb. P-typec. One side polished

• Cleaned by RCA method to remove surface contamination

CLEANED SILICON WAFER

• Thermally Silicon Oxide is grown over cleaned wafer.a. Approach is WET oxidation and named as Pyrogenic oxidation.b. Targeted thickness is 1 micron

SILICON WAFER

SILICON OXIDE

• Above the Silicon Oxide deposit silicon.a. Poly-Silicon by LPCVD at high temperature.b. Amorphous-Silicon by PECVD at low temperature.c. Directly use SOI (Silicon On Insulator) wafer.

• Thickness is 1 micron

SILICON WAFER

SILICON OXIDE

Poly-SILICON/A-SILICON/Device-SILICON

• By using optical Lithography write the lines over Photoresist coated layered wafer.•I have lines of width 1 micron with 1 micron gaps in between.

SILICON WAFER

SILICON OXIDE

Poly-SILICON/A-SILICON/Device-SILICONPhoto Resist

MASK

UV

• Patterned Photoresist

SILICON WAFERSILICON OXIDE

Poly-SILICON/A-SILICON/Device-SILICONPhoto ResistPhoto Resist Photo Resist Photo Resist Photo Resist

Microscopic image after Photo Lithography

• Now do the etching of deposited silicon using patterned photoresist as a hard mask.

a. To maintain the anisotropy etching is done by RIE (Reactive Ion Etching) technique.

SILICON WAFERSILICON OXIDE

SiliconPhoto ResistPhoto Resist Photo Resist Photo Resist Photo Resist

Silicon Silicon Silicon Silicon

• As photoresist is hard and organic material so it can’t be affected by silicon etching gases.•To do further processing this leftover photoresist should be removed first

a. I have used RIE only for photoresist removal.

SILICON WAFERSILICON OXIDE

Silicon Silicon Silicon Silicon Silicon

Patterned SOI

Patterned LPCVD-Si

Patterned PECVD-Si

• Next step is to deposit Silicon Nitride conformally over the patterned Silicon• Done by LPCVD method• Thickness is 600 nm

SILICON WAFER

SILICON OXIDESilicon Silicon Silicon Silicon Silicon

Silicon NitrideSilicon Nitride

LPCVD Silicon Nitride deposition(SOI)

LPCVD Silicon Nitride deposition(LPCVD-Si)

LPCVD Silicon Nitride deposition(PECVD-Si)

• Now by RIE blanket etch the deposited Silicon Nitride • Targeted thickness is 600 nm.

SILICON WAFER

SILICON OXIDESilicon Silicon Silicon Silicon Silicon

Silicon Nitride etch (SOI)

Silicon Nitride etch (LPCVD-Si)

• Further remove the exposed patterned Silicon.a. RIE technique is usedb. Targeted thickness is 1 micron

Silicon Nitride etch(SOI)

Silicon Nitride etch (LPCVD-Si)

• Moving further I have etched Silicon oxidea. To maintain anisotropy I have used RIE methodb. Targeted thickness is 1 micron.

Silicon Oxide etch(SOI)

Silicon Oxide etch(LPCVD-Silicon)

• Now moving towards I have etched Bulk Silicona. By RIE to maintain anisotropic profileb. Targeted thickness 1 micron

SILICON WAFER

Bulk Silicon etch (SOI)

Bulk Silicon etch (LPCVD)

• Now at final step I have removed stacked hard mask so there are only silicon gratings left on the wafer.

a. By Wet etching approachb. Using Buffered Oxide Etchant

SILICON WAFER

Stack hard mask etched (SOI)

Stack hard mask etched (LPCVD)

Thank You