Project 11: Influence of the Number of Processors on the Miss Rate

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Project 11: Influence of the Number of Processors on the Miss Rate. Prepared By: Suhaimi bin Mohd Sukor M031010040. Project 11. Configure a system with the following architectural characteristics: • Cache coherence protocol = MESI. • Scheme for bus arbitration = LRU. - PowerPoint PPT Presentation

Transcript of Project 11: Influence of the Number of Processors on the Miss Rate

Project 11: Influence of the Number of Processors on the Miss Rate

Prepared By:

Suhaimi bin Mohd Sukor

M031010040

Project 11

Configure a system with the following architectural characteristics: • Cache coherence protocol = MESI. • Scheme for bus arbitration = LRU. • Word wide (bits) = 16. • Words by block = 32 (block size = 64 bytes). • Blocks in main memory = 524288 (main memory size = 32 MB). • Blocks in cache = 256 (cache size = 16 KB). • Mapping = Set-Associative. • Cache sets = 64 (four-way set associative caches). • Replacement policy = LRU.

Question :

Does the global miss rate increase or decrease as the number of processors increases? Why? Does this increment or decrement happen for all the benchmarks or does it depend on the

different locality grades, shared data,...? What does it happen with the capacity and coherence misses when you enlarge the number of processors? Are there conflict misses

in these experiments? Why?

Answer

The global miss rate will increase as the number of processor increases. By the result, the increment are happened in all benchmarks. Generally, the greater number of processors,

the higher miss rate and network traffics.

Question:

Configure the number of processors in the SMP using the following configurations: 1, 2, 4, and 8. For each of the configurations, obtain the global miss rate for the system using the three traces that were generated by the post-mortem scheme: FFT, Simple and Weather. (Note:

To change with Comp, Hydro and Nasa7 with your permission)

Answer :

I have attached the result by configuring each of the processor using SMP Cache simulator. I have chose Comp, Hydro and Nasa7 traces to get my result.

Full Result

NO. OF PROCESSOR

MISS RATE (%)

COMP HYDRO NASA7

MISSES NO. MISSES NO. MISSES NO.

1 9.3899 237 8.9798 191 9.3261 173

2 17.631 445 19.464 414 19.892 369

4 18.502 467 21.439 456 22.049 409

8 12.559 317 22.990 489 22.049 409

Number of Processors vs Miss Rate

17.631

19.464

22.9922.049

9.3899

18.502

12.559

8.9798

21.439

9.3261

19.892

22.049

0

5

10

15

20

25

1 2 4 8

No. of Processors

Mis

s R

ate

s (

%)

Comp Hydro Nasa7

Result by using Comp traces

Using Comp tracesNo of Processor : 1

Using Comp tracesNo of Processor : 2

Using Comp tracesNo of Processor : 4

Using Comp tracesNo of Processor : 8

Using Hydro traces

Using Hydro tracesNo of Processor : 1

Using Hydro tracesNo of Processor : 2

Using Hydro tracesNo of Processor : 4

Using Hydro tracesNo of Processor : 8

Using Nasa7 traces

Using Nasa7 tracesNo of Processor : 1

Using Nasa7 tracesNo of Processor : 2

Using Nasa7 tracesNo of Processor : 4

Using Nasa7 tracesNo of Processor : 8

Conclusion

Question:

In conclusion, does the increase of the number of processors improve the multiprocessor system performance? Why and in what sense?

Answer:

In conclusion, the increase of the number of processors can improve the multiprocessor system performance. However, it depends on the bus bandwidth, if the Multiprocessor System have enough bus bandwidth then the performance will increase, if not the system will slow down.