New Architecture : -Scenario’s FE TDC selection - How much radiation do we get

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LHCb Outer Tracker Collaboration meeting januari 2013 Nikhef Status. New Architecture : -Scenario’s FE TDC selection - How much radiation do we get - How much radiation can the Proasic3E have - Proasic Overdose Solution Actel version , Wilco talks - PowerPoint PPT Presentation

Transcript of New Architecture : -Scenario’s FE TDC selection - How much radiation do we get

New Architecture : -Scenario’s

FE TDC selection -How much radiation do we get -How much radiation can the Proasic3E have -Proasic Overdose Solution

Actel version, Wilco talks -results of prototypes -proposed design

Other talks tom-Fiber setup -Services like supplies, cooling

LHCb Outer Tracker Collaboration meeting januari 2013Nikhef Status

New architecture

Scenario’s

1. Larger silicon inner area, same amount of electronics2. 50% less straws , 50% Scintilating Fibers

We assume the scenario1 where we change all FE’s to new ones nr 2 is less work and less costly

New Front Ends, new TDC selection

We need a new OTIS TDC with 40Mc output instead of 1Mc

To adapt the OTIS tdc there was too little manpower in the chip development area

FPGA solutions can be with Actel antifuse, Actel Proasic or Altera

For the selection of Commercial Off The Shelf (COTS) components we have to know the new radiation levels

How much radiation do we get in the worst spot (T3)

Expected levels, check Antonio:

How much radiation do we get in the worst spot (T3)

LHCB Electronics Upgrade Meeting, 10/14/2010

6R. Mountain, Syracuse University

Boston Louvain #00 Cyclotron US

LHCB Electronics Upgrade Meeting, 10/14/2010

8

FPGA Setup (2)

R. Mountain, Syracuse University

Aperture Ø12.7 mm

Ion ChamberFPGA Board

p Beam

Adjustable mechanics

Radiation Test Proasic3E

2010-2013 Syracuse uni200Mev Protons in Boston hospital

Prelim results see also LHCb Electronics Upgrade Meeting, 7/21/2011

About same as SPECS test above-Ram few SEU every 3min run of few kRad-Flash rom dito-Pll tested end 2012 good chips increasing tdc errors 20-37 on 8*10^9 measurements per run of few krad 2 bad chips 3*10^9 (tdc value changefrom 10>11?) a lock error occurred only 1 time during all tests

2004 results Specs proasic (in our Control boxes)(Not published, Saclay, Dominique Breton, Jaque l Fr.)

1.Programmable upto 17 kRad2.Still funtions until 30 kRad, then high current and malfunction)

Conclusion

The Proasic can measure 5 bits with acceptable bin size variation(see results measurement albert)

All proasic tdc boards have to be replaced after several years of running to be able to run for 10 years in radiation

Consequences for fiber installation and power in other talks