COMP 1321 COMP 1321 Digital InfrastructureDigital Infrastructure

Richard HensonRichard Henson

University of WorcesterUniversity of Worcester

OctoberOctober 20132013

Week 3: The Fetch-Execute Week 3: The Fetch-Execute CycleCycle

Explain the instruction set of a typical CPU

Understand the sequential way a CPU works, using its instruction set

Understand how registers and memory addresses are used to process a CPU instruction and store the results

CPUs and the SAMCPUs and the SAM

SAM is a CPU simulatorSAM is a CPU simulatordesigned to allow you to watch what designed to allow you to watch what

happens when a CPU workshappens when a CPU works CPU very, very, very fastCPU very, very, very fast Processes one instruction at a timeProcesses one instruction at a time Instructions can require several cyclesInstructions can require several cycles

What is “Processing”?What is “Processing”?

Usually calculations:Usually calculations:need data inputneed data input

» from registerfrom register

» from external memoryfrom external memory

need to store outputneed to store output» from registerfrom register

» from external memoryfrom external memory

Could also be a command without dataCould also be a command without data

CPU typesCPU types

Most frequently used:Most frequently used:Intel 8086 familyIntel 8086 familyMotorola (esp. 68000 family)Motorola (esp. 68000 family)ARM (many mobile phones)ARM (many mobile phones)

We’ll focus on Intel 8086 familyWe’ll focus on Intel 8086 familydates back to original IBM PC…dates back to original IBM PC…

RegistersRegisters

A series of memory stores inside the A series of memory stores inside the CPUCPUusually containing one word of memoryusually containing one word of memory

» 1, 2, 4 bytes i.e. very very small!1, 2, 4 bytes i.e. very very small!

CPU reads/writes data very very CPU reads/writes data very very quickly to/from the registersquickly to/from the registers

0

1

4

6 8

6

8

4

Registers:

high-speed memory on the CPU chip

Parking places for data on the moveAX and BX registers are used for ALU operations

MAR is memory address register, 4 in eg.

Result, 6+8=14, will go into memory cell address 4

AX BX

MARR

Registers (from last week…)Registers (from last week…)

8086 CPU family registers8086 CPU family registers

8086 chip always used a 16-bit word8086 chip always used a 16-bit wordSAM simulates an 8-bit wordSAM simulates an 8-bit word

» popular for most early microcomputerspopular for most early microcomputers

Typical 8086 registers:Typical 8086 registers:general purpose data: AX, BX, CX, DXgeneral purpose data: AX, BX, CX, DXspecific use e.g. specific use e.g.

» program counter: instruction address in memoryprogram counter: instruction address in memory

» stack pointer…stack pointer…

Data and AddressingData and Addressing A general purpose register could A general purpose register could

contain contain datadataA memory address that points to dataA memory address that points to data

Convention:Convention:data written as hexadecimal equivalentdata written as hexadecimal equivalent

» e.g. 4Ae.g. 4A

memory location has square bracketsmemory location has square brackets» e.g. [4A]e.g. [4A]

InstructionsInstructions Used to tell the CPU what to do…Used to tell the CPU what to do… MOV is for moving data around…MOV is for moving data around…

MOV AX, 4A – move “4A” into AX registerMOV AX, 4A – move “4A” into AX registerMOV AX, [4A] – move data contained in MOV AX, [4A] – move data contained in

address 4A into AX address 4A into AX registerregister

Other instructions for different Other instructions for different operations… operations… collectively known as an collectively known as an instruction setinstruction set

8086 in practice8086 in practice Four 16-bit General Purpose registersFour 16-bit General Purpose registers

each gen register split into upper byte & each gen register split into upper byte & lower byte:lower byte:

AH AL

BLBH

CH

DH

CL

DL

AX

BX

CX

DX

upper byte lower byte

Another 8086 Instruction: ADDAnother 8086 Instruction: ADD

Takes values from two registersTakes values from two registers Adds them togetherAdds them together Deposits results back in one of the Deposits results back in one of the

registersregisters Which one?Which one?

the register that appears first in the the register that appears first in the instructioninstruction

Fetch-Execute CycleFetch-Execute Cycle

1. Fetch instruction from memory

2. Decode the instruction and read any registers

3. Do any ALU operations (execute units)

5. Write back results to registers

(Organization and Control)

add ax , bx

4. Do any Memory Access

ALU <- ax ALU <- bx

ax + bx

(Data cache)

ax <- ALU

None needed

add ax , bx

add ax,bx

add ax

0

1

4

3

2

bx

Fetch-Exec : State 1

Instruction Fetch

8

3

7

1

9

3 1

AX BX

0

1

4

3

2

Fetch-Exec : State 2

Decode, Register Operations

8

3

7

1

9

add ax , bx

add ax,bx

add ax bx

3 1

3 1

AX BX

0

1

4

3

2

Fetch-Exec : State 3

ALU Operation

8

3

7

1

9

add ax , bx

add ax,bx

add ax bx

AX BX

3 1

4

0

1

4

3

2

Fetch-Exec : State 4

Memory Access

8

3

7

1

9

add ax , bx

add ax,bx

add ax bx

AX BX

3 1

4

0

1

4

3

2

Fetch-Exec : State 5

Register Write

8

3

7

1

9

add ax , bx

add ax,bx

add ax bx

BX

3 1

4

4

Fetch-Execute CycleFetch-Execute Cycle

1. Fetch instruction from memory

2. Decode the instruction and read any registers

3. Do any ALU operations (execute units)

5. Write back results to registers

(Organization and Control)

mov ax , [1]

4. Do any Memory Access

Read the ‘1’

Put ‘1’ into MAR

Data into ax

Read memory at addr ‘1’

mov ax , [1]

mov ax , [1]mov ax

0

1

4

3

2

1

Fetch-Exec : State 1

Instruction Fetch

8

3

7

1

9

mov ax , [1]

mov ax , [1]mov ax

0

1

4

3

2

1

Fetch-Exec : State 2

Decode, Register Operations

8

3

7

1

9

mov ax , [1]

mov ax , [1]mov ax

0

1

4

3

2

1

Fetch-Exec : State 3

ALU Operation

1

8

3

7

1

9

mov ax , [1]

mov ax , [1]mov ax

0

1

4

3

2

1

Fetch-Exec : State 4

Memory Access

1

8

3

7

1

9

8

mov ax , [1]

mov ax , [1]mov ax

0

1

4

3

2

1

Fetch-Exec : State 5

Register Write

1

8

3

7

1

9

88

8088: Brains of the IBM PC8088: Brains of the IBM PC

Inside the 8088Inside the 8088address bus

address adder

gen registers

Externalbuses

ALU

5

1

2

3

4

1. Fetch2. Decode3. ALU4. Mem Ops5. Reg Write

PentiumPentium(same(samefamily)family)

Programming a CPUProgramming a CPU

CPU programming code written as CPU programming code written as assembly languageassembly language

Each family has its own instruction setEach family has its own instruction set Programming syntax will depend on the Programming syntax will depend on the

instructions & how they should be usedinstructions & how they should be used Intel 8086 assembly language is used Intel 8086 assembly language is used

for CPUs that support Microsoft for CPUs that support Microsoft platforms…platforms…

Example 8086 Example 8086 Assembly LanguageAssembly Language

MOV AH,08INT 21MOV DL,ALMOV AH,02INT 21MOV AH,4CINT 21

So THAT’S how it all works!So THAT’S how it all works!

now you try it on SAM2…now you try it on SAM2…

Next week: a focus on writing Next week: a focus on writing programs and i/oprograms and i/o