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- Copenhagen, 26 August 2009

CMOS Pixel Sensors for Charged Particle Tracking :

Achieved Performances and PerspectivesMarc Winter (IPHC/Strasbourg)

on behalf of IPHC/Strasbourg – IRFU/Saclay collaboration

⊲ More information on IPHC Web site: http://www.iphc.cnrs.fr/-CMOS-ILC-.html

• Motivation of the talk :

> ∼ 11 years since the 1st CMOS sensor was proposed for vertexing (at the ILC)

> numerous other applications of CMOS sensors have emerged since then

> ∼ 10–15 HEP groups in the US & Europe are presently active in CMOS sensor R&D

• Scope of the talk :

> R&D motivations

> performances achieved with CMOS pixel sensors

> current applications

> perspectives with 2D and 3D sensors

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- What is the ILC Project ?

• ILC ≡ next large scale accelerator after LHC ⊲⊲⊲ Physics & 2020

⊲ it is an electron - positron linear collider : c.m. energy up to ∼ 1 TeV ; & 31 km long site;

⊲ it will deepen discoveries made at LHC and extend the experimental sensitivity to new phenomena

underlying the history of Universe (laws of Nature) and its present mysteries (Dark Matter, Dark Energy)

• ILC design expected to be technically ready for constructio n & 2012 (... R&D started & 10 years ago ... )

→ Detector concept should mature synchronously (time scale less tight as LHC)

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- The Quest for Highly Precise & Sensitive Detectors

• ILC is a high precision machine :

⊲ electron - positron collisions are relatively (compared to LHC) background free

⊲ physics conditions of elementary interactions are particularly well defined and tunable

Very high precision/sensitivity studies accessible if det ectors are extremely sensitive

Vertex Detector with unprecedented performances

• Major requirements :

⋄ Resolution on vertex position ∼ O(10) µm ⋄ O(103) hit pixels /cm2/10 µs (inner layer)

⋄ Ionising radiation : O(100) kRad / yr ⋄ Non-ionising radiation . O(1011)neq /cm2/yr from e±BS

and . O(1010)neq /cm2/yr from neutron gas

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- Granularity and Transparency

• How to achieve high spatial resolution : small pixels (pitch ) and reduced material ( ≡ weight)

→ Figure of merit : σip = a ⊕ b/pt b governs low momentum (∼ 30 % particles < 1 GeV/c)

a governs high momentum

Accelerator a (µm) b (µm · GeV )

LEP 25 70

SLD 8 33

LHC 12 70

RHIC-II 13 19

ILC < 5 < 10

b dominated

ւ

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- Granularity and Transparency

• How to achieve high spatial resolution : small pixels (pitch ) and reduced material ( ≡ weight)

→ Figure of merit : σip = a ⊕ b/pt b governs low momentum (∼ 30 % particles < 1 GeV/c)

a governs high momentum

Accelerator a (µm) b (µm · GeV )

LEP 25 70

SLD 8 33

LHC 12 70

RHIC-II 13 19

ILC < 5 < 10

b dominated

ւ

a dominated

Existing pixel technologies cannot do the job :

> CCDs are too slow and radiation soft

> Hybrid Pixel Sensors are not granular and thin enough

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- Main Features and Advantages of CMOS Sensors

• P-type low-resistivity Si hosting n-type ”charge collecto rs”

• signal created in epitaxial layer (low doping):

Q ∼ 80 e-h / µm 7→ signal . 1000 e−

• charge sensing through n-well/p-epi junction

• excess carriers propagate (thermally) to diode

with help of reflection on boundaries

with p-well and substrate (high doping)

• Prominent advantages of CMOS sensors:

⋄ granularity: pixels of . 10×10 µm2 high spatial resolution

⋄ low mat. budget: sensitive volume ∼ 10 - 15 µm total thickness . 50 µm

⋄ Signal processing µcircuits integrated in the sensors compacity, high data throughput, flexibility, etc.

⋄ other attractive aspects: cost, multi-project run frequen cy, Troom operation, etc.

⊲ ⊲ ⊲ Attractive balance between granularity, mat. budget, rad. tolerance, r.o. speed and power dissipation

• Limitations ⋊⋉ Very thin sensitive volume impact on signal magnitude (mV !) vey low noise FEE

⋊⋉ Sensitive volume almost undepleted impact on radiation tolerance & speed

⋊⋉ Commercial fabrication fab. param. (doping profile, etc.) not optimal for charged pa rt. detection

⋊⋉ etc.

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Achieved Performances

with Analog Output Sensors

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- M.I.P. Detection with CMOS Sensors

• ∼ 100 chips (M1, M2, M4, M5, M8, M9, M11, M14, M15, M16, M17, M18) tested on H.E. beams since 2001 at

CERN & DESY, mounted on Si-strip telescope (calibrated with 55Fe) 7→ well established perfo. (analog output):

> Example of well performing technology: AMS 0.35 µm OPTO ∼ 14 & 20 µm epitaxy thickness

> N ∼ 10 e−ENC 7→ S/N & 20 – 30 (MPV) at room Temperature

> Technology without epitaxy also performing well : very high S/N but large clusters (hit separation ց)

> Macroscopic sensors : MIMOSA-5 (∼ 1.7x1.7 cm2; 1 Mpix) ; MIMOSA-20 (1x2 cm2; 200 kpix) ;

MIMOSA-17 (0.76x0.76 cm2; 65 kpix) ; MIMOSA-18 (0.55x0.55 cm2 ; 256 kpix)

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- Detection Efficiency & Spatial Resolution

• Detection efficiency:

> Ex: MIMOSA-9 data (20, 30 & 40 µm pitch)

> ǫdet & 99.5–99.9 % repeatedly observed

at room temperature (fake rate ∼ 10−5)

> Toper. & 40 C

C)oTemp (

-20 -10 0 10 20 30 40

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pitch 20 small diode chip 3

pitch 30 small diode chip 3

pitch 40 small diode chip 3

Efficency vs Temperature Small Diode

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Mimosa resolution vs pitchMimosa resolution vs pitch• Single point resolution versus pixel pitch:

> clusters reconstructed with eta-function,

exploiting charge sharing between pixels (12-bit ADC)

> σsp ∼ 1 µm (10 µm pitch) . 3 µm (40 µm pitch)

> 4-bit ADC simul. σsp . 2 µm (20 µm pitch)

> measured binary output resolution (MIMOSA-16, -22):

σsp & 3.5 & 4.5 µm (18.4 & 25 µm pitch)

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- Radiation Tolerance: Condensed Summary

• Ionising radiation tolerance (chips irradiated with 10 keV X-Rays) :

> Pixels modified against hole accumulations (thick oxide) an d leakage current increase (guard ring)

> MIMOSA-15 tested with ∼ 5 GeV e− at DESY after 10 kGy exposure : Preliminary results

• T = - 20C, tr.o. ∼ 180 µs

• tr.o. << 1ms crucial at Troom

Integ. Dose Noise S/N ( MPV) Detection Efficiency

0 9.0 ± 1.1 27.8 ± 0.5 100 %

1 MRad 10.7 ± 0.9 19.5 ± 0.2 99.96 ± 0.04 %

• Non-ionising radiation tolerance (chips irradiated with O (1 MeV) neutrons):

> MIMOSA-15 (20 µm pitch) tested on DESY e − beams : Preliminary results

• T = - 20C, tr.o. ∼ 700 µs Fluence (10 12neq /cm2) 0 0.47 2.1 5.8 (5/2) 5.8 (4/2)

S/N (MPV) 27.8 ± 0.5 21.8 ± 0.5 14.7 ± 0.3 8.7 ± 2. 7.5 ± 2.

Det. Efficiency (%) 100. 99.9 ± 0.1 99.3 ± 0.2 77. ± 2 84. ± 2.

5.8·1012neq /cm2 values

with standard & soft cuts

> MIMOSA-18 (10 µm pitch) tested at CERN-SPS (120 GeV π− beam) : Preliminary results

• T = - 20C, tr.o. ∼ 3 ms Fluence (n eq /cm2) 0 6·1012 1·1013

Qclust (e−) 1026 680 560

S/N (MPV) 28.5 ± 0.2 20.4 ± 0.2 14.7 ± 0.2

Det. Efficiency (%) 99.93 ± 0.03 99.85 ± 0.05 99.5± 0.1

parasitic 1–2 kGy γ gas Nր

• Conclusion :

> obs. tolerance: O(10 kGy) & 2·1012 neq /cm2 (20 µm pitch) > 1·1013 neq /cm2 (10 µm pitch)

> further studies needed : tolerance vs diode size, r.o. speed, digital output, ................ , annealing ??

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- System Integration

• Industrial thinning (via STAR coll. at LBNL) MIMOSA-18 (5.5×5.5 mm2 thinned to 50 µm)

• Devt of ladder equipped with MIMOSA chips (coll. with LBL): STAR (. 0.3 % X0 ) ILC (< 0.2 % X0 )

• Perspectives ?

> accessibility of industrial thinning + post-processing of ”high-res” substrate

> stitching alleviates material budget of flex cable

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- Applications of Sensors with Analog Output

• Beam telescope of the FP6 project EUDET

> 2 arms of 3 planes (plus 1 high resolution plane)

> σextrapol. . 1 µm EVEN with e− (3 GeV, DESY)

> frame read-out frequency O(102) Hz

> running since ’07 CERN-SPS & DESY (numerous users)

> evolution towards 104 frames/s in 2009, using

binary output sensors (see later)

• Several other applications :

> MIMOSA sensor R&D : Pixel telescope of Strasbourg (TAPI)

> STAR (RHIC) : telescope (3 MIMOSA-14) inside apparatus (2007)

background meast, no pick-up !

> CBM (FAIR) : MVD demonstrator (double-sided layers) to be used

for high precision tracking in HADES (GSI) ∼ 2010

> Spin-offs : beta imaging, hybrid photo-detector, dosimetre, ...

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Improving the Read-Out Speed

with Digital Output Sensors

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- Development Strategy of Fast CMOS Sensors

• Target value : read-out time . 20 - - - - 200 µs sensors organised in pixel columns read out in //

• R&D organisation : 3 simultaneous R&D lines 3 types of µcircuits MIMOSA-22H

> architecture of pixel arrays organised in columns read out in //

⊲ CDS and pre-amp µcircuit in each pixel

⊲ 1 discriminator ending each column

→ MIMOSA-8 (2004), MIMOSA-16 (2006), MIMOSA-22 (2007/08)

> Ø µcircuits & output memories : SUZE-01 (2007) −→

> 4–5 bits ADCs (1000 ADC featuring 20×500 µm2 per sensor ! )

⊲ potentialy replacing each discriminator

→ σsp < 2 µm (4 bits) 1.7–1.6 µm (5 bits) for 20 µm pitch

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- Performances of a Large Prototype with Digitised Output

• MIMOSA-22 : fabricated in 2007/08 (coll. with IRFU/Saclay)

⋄ 136 col. of 576 pixels (18.4 µm pitch, integrated CDS )

⋄ 128 col. ended with an integrated discriminator

⋄ integrated JTAG controller

• Tests at CERN-SPS (∼ 120 GeV π−) in 2008 results of different sub-arrays

Discri. Threshold (mV)2 3 4 5 6 7 8

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⊲⊲⊲ Architectures of pixel (integrated CDS ) and of full chain ma de of

”columns ended with integrated discri. ” validated at real s cale

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- Zero Suppression Micro-Circuit : SUZE-01 Test Results

• 1st chip (SUZE-01) with integrated Ø and output memories (no pixels) :

> 2 step, raw by raw, logic :

⋄ step-1 (inside blocks of 64 columns) :

identify up to 6 series of ≤ 4 neighbour pixels per raw

delivering signal > discriminator threshold

⋄ step-2 : read-out outcome of step-1 in all blocks

and keep up to 9 series of ≤ 4 neighbour pixels

> 4 output memories (512x16 bits) taken from AMS I.P. lib.

> adapted to 2 × 64 columns

> surface ∼ 3.9 × 3.6 mm2

• Test results summary :

> designed & fabricated in ’07 (lab) tests completed by Spring ’08

> design performances reproduced up to 1.15 × design read-out frequency (Troom) :

noise values as predicted, no pattern encoding error, can handle > 100 hits/frame at rate > 104 frames/s

• Still to do : improve radiation tolerance (SEU, latch-up ) of ouput memories

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- MIMOSA-26 : 1st Sensor with Integrated Ø

• MIMOSA-26 ≡ final sensor for EUDET telescope

> MIMOSA-22 (binary outputs) complemented with Ø (SUZE-01)

> Active surface : 1152 columns of 576 pixels (21.2 x 10.6 mm 2)

> Pitch : 18.4 µm ∼ 0.7 million of pixels σsp & 3.5 µm

> Integration time . 110 µs ∼ 104 frames / second

suited to > 106 particles/cm2/s

> Ø in 18 groups of 64 col. allowing ≤ 9 ”pixel strings” / raw

> Sensor full dimensions : ∼ 21 x 12 mm2

> Data throughput: 1 output at ≥ 80 Mbits/s

or 2 outputs at ≥ 40 Mbits/s

• Fabricated in AMS-0.35 technology:

> Sensor currently being tested preliminary test results satisfactory (see next slide)

> Sensor foreseen to equip several beam telescopes (including ATLAS)

> Architecture is baseline for STAR, CBM and ILC vertex detectors

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- MIMOSA-26 : Preliminary Lab Test Results

• MIMOSA-26 ≡ final sensor for EUDET telescope

> 9 sensors mounted on interface board and tested with/withou t 55Fe source

> Noise performance assessment performed separately for

each of the 4 groups of 288 columns, at nominal r.o. speed

> Typical value of pixel (i.e. temporal noise) ∼ 0.6–0.7 mV

> Typical value of FPN (discriminator) noise ∼ 0.3–0.4 mV

> Results are ∼ identical to MIMOSA-22 values

> Ø logic seems to work as foreseen

> 3 sensors mounted as DUT on EUDET beam telescope

Sensor is operational at nominal speed

• Next steps :

> Commission final version of EUDET beam telescope at CERN-SPS (Septembre ’09)

> Cross-check radiation tolerance

> Yield investigate stitching ?

> Extend design to various vertex detectors (STAR, CBM, ILC, etc.)

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- Extensions of MIMOSA-22 & MIMOSA-26 to STAR

• 1st generation sensor for the HFT- PIXEL of STAR (PHASE-1):

> full scale extension of MIMOSA-22 (no Ø)

> 640x640 pixels (30 µm pitch) active surface : 19.2 x 19.2 mm2

> integration time : 640 µs

> designed and fabricated in 2008 currently under test at LBNL

> 3 + 9 ladders to equip with 10 sensors thinned to 50 µm (1/4 of PIXEL)

> 1st physics data expected in 2011

• Final HFT- PIXEL sensor :

> MIMOSA-26 with active surface × 1.8 & improved rad. tolerance

→ 1152 col. of 1024 pixels (21.2 x 18.8 mm2)

> Pitch : 18.4 µm ∼ 1.1 million pixels

> Integration time ∼ 200 µs

> Design in 2009 fab. early 2010

1st physics data expected in 2012

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- ILC Vertex Detector R&D Goals

• Sensor requirements defined w.r.t. ILD VTX geometries> 2 alternative geometries :

⋄ 5 single-sided layers

⋄ 3 double-sided layers (mini-vectors)

> pixel array read-out perpendicular to beam lines

• Prominent specifications :

> read-out time target values (continuous read-out version) :

SL1/SL2 /SL3 /SL4 /SL5 DL1 / DL2 / DL3

⋄ single-sided : 25 / 50 / 100 / 100 / 100 µs ⋄ double-sided : 25–25 / 100–100 / 100–100 µs

> σsp < 3 µm (partly with binary outputs)

> full ladder material budget in sensitive area (. 50 µm thin sensors) :

⋄ single-sided : < 0.2 % X0 ⋄ double-sided : ∼ 0.2 % X0

> Pdiss . 0.1–1 W/cm2× 1/50 duty cycle

(5 Hz, 1 ms long, bunch train frequency)

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- From MIMOSA-26 to the ILC Design

• Move from AMS-0.35 µm to feature size ≤ 0.18 µm

improved clock frequency, more metal layers, more compact peripheral circuitry, etc.

• Outer layers (t int ∼ 100 µs) : • Inner layers (t int ∼ 25 - 50 µs) :

> pitch . 35 µm (need phys. studies ) > double-sided r.o. twice shorter (= faster) columns

> 4-bit ADC σsp ∼ 3 µm > pitch . 15 µm

> 576 col. of 576 pixels 2x2 cm2> binary r.o. σsp . 3 µm

> 1600 columns of 320 pixels . 24x0.95 mm2

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- System Integration : PLUME Project

• PLUME project

≡ Pixelised Ladder using Ultra-light Material Embedding

• Objectives :

> achieve a double-sided ladder prototype by 2012

> evaluate benefits of 2-sided concept (mini-vectors) :

σsp, alignment, shallow angle pointing

• Collaboration:

> Bristol - DESY - Oxford - Strasbourg

> Synergy with Vertex Detector of CBM/FAIR

• Perspective:

> to be integrated in FP-7 project called DEVDET (proposal in preparation)

> interest for (s)LHC experiments ?

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- System Integration : PLUME Project

• 1st step (2009) :

> 2 pairs of MIMOSA-20 sensors (4x1 cm2, 50 µm thin)

mounted on flex cable, assembled on SiC (8 %) support

> total material budget ∼ 0.5 % X0

SiC foam sensors glue flex0.18 % 0.11 % 0.02 % 0.29 %

> beam tests at CERN-SPS in Novembre

• 2nd step (2009 − 2012) :

> 2 sets of 6 MIMOSA-26 sensors (12.5x1 cm2, 50 µm thin)

mounted on flex cable, assembled on SiC support

> total material budget & 0.2 % X0 (stitching ???)

> prototype for innermost layer

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Evolution of CMOS Sensors

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- High Resistivity Sensitive Volume

• Advantages :

> faster charge collection (< 10 ns ) faster frame read-out frequency

> shorter minority charge carrier path length improved tolerance to non-ionising radiation

• Exploration of 0.6 µm techno: ∼ 15 µm thick epitaxy ; Vdd ≤ 5 V ; ρ ∼ O(103)Ω · cm

> MIMOSA-25 : fabricated in 2008 & tested with 106Ru (β) source before/after O(1 MeV) neutron irradiation

⋄ 20 µm pitch, + 20C, 160 µs r.o. time

⋄ fluence ∼ 0.3 / 1.3 / 3·1013neq /cm2

⋄ tolerance improved by > 1 order of mag.

⋄ need to confirm ǫdet (uniformity !) with

beam tests (CERN-SPS in July ’09)

• Exploration of a new VDSM technology with depleted substrat e : project LePIX

project driven by CERN for SLHC trackers (also attractive for CBM, ILC and CLIC Vx Det.)

> 1st prototypes by the end of 2009 > thinning and post-processing of substrate ?

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- Using 3DIT to Improve CMOS Sensor Performances

• 3D Integration Techno. allow integrating high density signal processing µcircuits inside small pixels

• 3DIT are expected to be particularly beneficial for CMOS sens ors :

> combine different fab. processes > alleviate constraints on transistor type inside pixel

• Split signal collection and processing functionnalities :

> Tier-1: charge collection system > Tier-2: analog signal processing

> Tier-3: mixed and digital signal processing > Tier-4: data formatting (electro-optical conversion ?)

• Use best suited technology for each Tier :

> Tier-1: epitaxy (depleted or not), deep N-well ? > Tier-2: analog, low Ileak , process (nb of metal layers)

> Tier-3 & -4 : digital process (nb of metal layers), feature size fast laser (VOCSEL) driver, etc.

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- Ex: Delayed R.O. Architecture for the ILC Vertex Detector

• Run in Chartered - Tezzaron technology Tier-1

> 2-Tier run with ”high-res” substrate (allows m.i.p. detection)

3-Tier architecture compactified in 2-Tier chip

> feature size = 130 nm design foreseen for smaller feature size

• Try 3D architecture based on small pixel pitch, motivated by : Tier-2

> < 3 µm single point resolution with binary output

> probability of > 1 hit per train << 10 %

12 µm pitch : σsp & 2.5 µm & . 5 % proba. of > 1 hit/train

• Split signal collection and processing functionnalities :

> Tier-1A: sensing diode & amplifier

> Tier-1B: shaper & discriminator

> Tier-2: time stamp (5 bits) + overflow bit & read-out delayed r.o.

• Architecture prepares for 3-Tier perspectives :

> Tier-1: CMOS process adapted to charge collection

> Tier-2: CMOS process adapted to analog & mixed signal processing

> Tier-3: digital process (<< 100 nm ????) Tier-2

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- Ex: Low Power Design & Mixed CMOS Technologies ‘

• Other ex. of chips designed in Chartered - Tezzaron technolo gy for ILC

> FAST architecture aiming to minimise power consumption (IRFU/Saclay) :

⋄ subdivide sensitive area in ”small” matrices running INDIVIDUALLY in rolling shutter mode

⋄ adapt the number of raws to required frame r.o. time

few µs r.o. time may be reached (???)

• Combine 2-Tier read-out chip with Tier hosting sensitive vo lume :

> Tier-1: XFAB-0.6 (depleted epitaxy) signal sensing volume

> Tier-2 /-3 : Chartered signal processing micro-circuits

> adapted to fast (few µs), low occupancy, particle detection (small sub-arrays in projective geometry)

• Memory tolerant to SEU & SEL (CMP/Grenoble)

⊲⊲⊲ Chips submitted to foundry back by end of 2009

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- CONCLUSIONS – SUMMARY

• 2D CMOS sensors have reached necessary prototyping maturit y for real scale applications :

> beam telescopes (EUDET/FP6, etc.) σsp ∼ few µm & 106 part./s/cm2 (even few GeV e± !!!)

> vertex detectors requiring high resolution & very low material budget (STAR-HFT, etc.)

→ 2-sided ladder with . 0.3 % X0 (PLUME project)

> wide spectrum of spin-offs (bio-medical imaging, synchro. rad., dosimetry, hadrontherapy, ...)

• The emergence of fabrication processes with depleted epita xy / substrate opens the door to :

> substantial improvements in read-out speed and non-ionising radiation tolerance

> ”large pitch” applications trackers (e.g. Super LHC )

• Translation to 3D integration processes :

> resorbs most limitations specific to CMOS sensors :

T type & density, peripheral insensitive zone, combination of different CMOS processes

> offers improved read-out speed : O(µs ) !

many obstacles to explore & overcome (e.g. power consumption)

→ R&D is progressing 2009 ≡ important step for process validation

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- 3D-MAPS Consortium

R.Yarema/IUC/Nov.08CMOS pixel sensors, –29–