Post on 20-Feb-2021
Roma SDD Group S. Di LibertoM.A. Mazzoni
F. MeddiG.M. Urciuoli
A.Ruggeri (techn.)S.Sestito (techn.)
ALICE - Silicon Drift DetectorRoma “CL100 Clean Room”
TheThe Probe StationProbe Station CASCADE MICROTECH REL-6100CASCADE MICROTECH REL-6100connected to Logic Analyzer AGILENT 16702B AGILENT 16702B ( S/W: LABVIEW LABVIEW ))
Power SuppliesLogic Analyzer System
LVDS/CMOSPROBE CARD
Image on the Probe St. screen
Pasc/AmPasc/Am88”” wafer wafer
AMBRAAMBRA PASCALPASCALSDD - FrontEnd chips
Probe Cards
AMBRAAMBRA PASCALPASCALSDD - FrontEnd chips
Probe Cards
The Pascal validation program running display
Summary of the ROMA-SDD activity for the Ambra/PascalSummary of the ROMA-SDD activity for the Ambra/Pascal chips validation ( february 2005 - november 2006 ) chips validation ( february 2005 - november 2006 )
PASCALPASCAL 4883 4330 341 212 89 7 4 34
AMBRAAMBRA 4597 3608 392 597 78 9 13 32
MEAS GOODGOOD GREY BAD(%%) (%) (%)MEAS
GOOD
MEAS
GREY
MEAS
BAD N. of halfWAFERSWAFERS
1 Wafer : 127127 Pascal + 113113 Ambra GOOD
mean
08.22080
4330
)(#
)(#!=
needed
GoodPASCAL73.1
2080
3608
)(#
)(#!=
needed
GoodAMBRA
a SDD module: a Silicon Drift chamber equipped with 4 + 4 Pascal/Ambra pairs
Inner Tracker System ( ITS ) Mechanics Support
The The Probe StationProbe Station CASCADE MICROTECH REL-6100 CASCADE MICROTECH REL-6100 in the CL100 RoomCL100 Roomequipped with Logic Analyzer AGILENT 16702B AGILENT 16702B and S/W LABVIEWLABVIEW
Power SuppliesLogic Analyzer System
LVDS/CMOSPROBE CARD
ITS - 6 Layers ( 2 SPD + 2 SDD + 2 SSD ) Support inner outer
SPD = Sil. PixelSDD = Sil. DriftSSD = Sil. Strip
SDD - Layer 4 ( 22 Ladders )
1 Ladder = 8 Modules
SDD Readout Electronics
SDD – Layers 3 and 4 Cables
SDD ( Layers 3 and 4 ) inside SSD ( Layers 5 and 6 )
SDD groups: Italy ( AL, BO, RM , TO, TS ),Czech Rep., Russia, Ukraine
SDD integrated inside ITS february 2007
ALICE Pit : work in progress
ITS getting down / 1
ITS getting down / 2
ITS integrated inside ALICE March 2007