CMI8738 Spec v06 Reg
Interfacing of data converters & io devices
STLD-Combinational logic design
logic family
Digital design chap 1
Digital design chap 3
Digital Integrated Circuits – Logic Families
1 کلاس جبراني پنجشنبه 26 فروردين: ساعت 8:00 صبح ميان ترم سه شنبه 3 ارديبهشت: ساعت 9:30 صبح.
ASI Module
1 Combinational Logic Design Unit-3. List of Topics: Single output and multiple output combinational logic circuit design AND-OR, OR-AND, and NAND/NOR.
2CO-N3
Combinational Logic Design
