LTspice Guide
Spice
Variation Aware Gate Delay Models Dinesh Ganesan.
EcA Lab Manuall
Analog Circuit Simulation
The Life of SPICE Laurence W. Nagel Omega Enterprises Consulting Presented at Chabot College Hayward, CA October 25, 2011.
10/27/20051 The Life of SPICE Laurence W. Nagel Omega Enterprises Randolph, NJ.
Using Spice in Lab Practicing for Analog ASIC Design Goran Jovanović, Faculty of Electronic Engineering University of Niš Serbia and Montenegro.
Introduction to CMOS VLSI Design SPICE Simulation.
Z. Feng MTU EE4800 CMOS Digital IC Design & Analysis 8.1 EE4800 CMOS Digital IC Design & Analysis Lecture 8 Spice Simulation Zhuo Feng.
Interactive, Procedural Computer-Aided Design
CSV881: Low-Power Design Gate-Level Power Analysis
