The top documents tagged [muxes clock tree synthesis]

-1- UC San Diego / VLSI CAD Laboratory OCV-Aware Top-Level Clock Tree Optimization Tuck-Boon Chan, Kwangsoo Han, Andrew B. Kahng, Jae-Gon Lee and Siddhartha.

-1- UC San Diego / VLSI CAD Laboratory OCV-Aware Top-Level Clock Tree Optimization Tuck-Boon Chan, Kwangsoo Han, Andrew B. Kahng, Jae-Gon Lee and Siddhartha.

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