Intel s Low Power Technology With High-K Dielectric Balapradeep Gadamsetti.
Power Consumption by Integrated Circuits Lin Zhong ELEC518, Spring 2011.
1 Compilers for DSP Processors and Low-Power Jenq-Kuen Lee Department of Computer Science National Tsing-Hua Univ. Hsinchu, Taiwan.
Micro-Architecture Techniques for Sensor Network Processors Amir Javidi EECS 598 Feb 25, 2010.
MPSoC University of Tehran Electrical and Computer Engineering School Design of ASIC CMOS Systems Course Presented by: Mahdi Hamzeh Instructor: Dr S.M.
ECE 260B – CSE 241A Intro and ASIC Flow.1 ECE260B – CSE241A Winter 2005 Introduction and ASIC Flow Instructor: Bao Liu Website:
