© Copyright 2013 Xilinx. Rajat Aggarwal Sr Director, FPGA Implementation Tools March 31 st, 2014 FPGA Place & Route Challenges.
Task 1091.001: Highly Scalable Placement by Multilevel Optimization Task Leaders: Jason Cong (UCLA CS) and Tony Chan (UCLA Math) Students with Graduation.
Constraint-Driven Large Scale Circuit Placement Algorithms
