vh sld2
RTL Hardware Design by P. Chu Chapter 101. 1. Overview 2. FSM representation 3. Timing and performance of an FSM 4. Moore machine versus Mealy machine.
RTL Hardware Design by P. Chu Chapter 161 Clock and Synchronization.
RTL Hardware Design by P. Chu Chapter 91. 1. Poor design practice and remedy 2. More counters 3. Register as fast temporary storage 4. Pipelined circuit.
RTL Hardware Design by P. Chu Chapter 11. 1. Why Digital? 2. Device Technologies 3. System Representation 4. Abstraction 5. Development Tasks 6. Development.