I MPROVING C ACHE M ANAGEMENT P OLICIES U SING D YNAMIC R EUSE D ISTANCES Nam Duong 1, Dali Zhao 1, Taesu Kim 1, Rosario Cammarota 1, Mateo Valero 2, Alexander.
HDF5 I/O Performance
Project 11: Influence of the Number of Processors on the Miss Rate
Cryptanalysis through Cache Address Leakage Eran Tromer Adi Shamir Dag Arne Osvik.
Cache-Conscious Data Placement
FFT-Cache: A Flexible Fault-Tolerant Cache Architecture for Ultra Low Voltage Operation
