April 2001 Mixed-Signal RF Products
User’s Guide
SWRU003B
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinueany product or service without notice, and advise customers to obtain the latest version of relevant informationto verify, before placing orders, that information being relied on is current and complete. All products are soldsubject to the terms and conditions of sale supplied at the time of order acknowledgment, including thosepertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its products to the specifications applicable at the time of sale in accordance withTI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessaryto support this warranty. Specific testing of all parameters of each device is not necessarily performed, exceptthose mandated by government requirements.
Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customer’s applications, adequate design and operatingsafeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or representthat any license, either express or implied, is granted under any patent right, copyright, mask work right, or otherintellectual property right of TI covering or relating to any combination, machine, or process in which suchproducts or services might be or are used. TI’s publication of information regarding any third party’s productsor services does not constitute TI’s approval, license, warranty or endorsement thereof.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is withoutalteration and is accompanied by all associated warranties, conditions, limitations and notices. Representationor reproduction of this information with alteration voids all warranties provided for an associated TI product orservice, is an unfair and deceptive business practice, and TI is not responsible nor liable for any such use.
Resale of TI’s products or services with statements different from or beyond the parameters stated by TI forthat product or service voids all express and any implied warranties for the associated TI product or service,is an unfair and deceptive business practice, and TI is not responsible nor liable for any such use.
Also see: Standard Terms and Conditions of Sale for Semiconductor Products. www.ti.com/sc/docs/stdterms.htm
Mailing Address:
Texas InstrumentsPost Office Box 655303Dallas, Texas 75265
Copyright 2001, Texas Instruments Incorporated
EVALUATION BOARD DISCLAIMER
The enclosed evaluation boards are experimental printed circuit boards and are thereforeonly intended for device evaluation.
We would like to draw your attention to the fact that these boards have been processedthrough one or more of Texas Instruments’ external subcontractors which have not been pro-duction qualified.
Device parameters measured, using these boards, are not representative of any final data-sheet or of a final production version. Texas Instruments does not represent or guarantee thata final version will be made available after device evaluation.
THE EVALUATION BOARDS ARE SUPPLIED WITHOUT WARRANTY OF ANY KIND, EX-PRESSED, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO, ANY IMPLIEDWARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
TEXAS INSTRUMENTS ACCEPTS NO LIABILITY WHATSOEVER ARISING AS A RESULTOF THE USE OF THESE BOARDS.
The fee associated with the evaluation modules (EVM) is a partial nonrecurring engineeringfee (NRE) to partially defray the engineering costs associated with the EVM developmentand applications support for the RF integrated semiconductor product. The EVM is a tool forevaluating the RF semiconductors supplied by Texas Instruments. The EVM is supplied toprospective component customers to provide services and software allowing the prospectcustomers to evaluate the RF semiconductors in products they would build.
The EVM may be operated only for product evaluation purposes and then only in nonresiden-tial areas. TI’s understanding is that the customers’ products using the RF parts listed shall bedesigned to comply with all applicable FCC and appropriate regulatory agency requirementsand will, upon testing, comply with these requirements. Operation of this device is subject tothe conditions that it not cause harmful interference and that it must accept any interference.
Information About Cautions and Warnings
iii Read This First
Preface
About This Manual
This document is intended to introduce the TRF4900 evaluation module(EVM) and familiarize the reader with setting up and testing the TRF4900 EVMusing the evaluation software in a typical laboratory environment.
How to Use This Manual
This document contains the following chapters:
Chapter 1 − Overview
Chapter 2 − Evaluation Board
Chapter 3 − Software User’s Guide
Information About Cautions and Warnings
This book may contain cautions and warnings.
This is an example of a caution statement.
A caution statement describes a situation that could potentiallydamage your software or equipment.
This is an example of a warning statement.
A warning statement describes a situation that could potentiallycause harm to you .
The information in a caution or a warning is provided for your protection.Please read each caution and warning carefully.
iv
Running Title—Attribute Reference
v Chapter Title—Attribute Reference
1 Overview 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Purpose 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 EVM Setup 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Block Diagram 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Evaluation Board 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 Schematics 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.1 Top Side Silkscreen and Drawing 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1.2 Bottom Side Silkscreen and Drawing 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Parts List 2-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 EVM DC Voltage Setup 2-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4 Serial Interface and PC Port Pin Out 2-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 Standard PC Parallel Port 2-12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6 Jumper Connections 2-13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.6.1 Jumper Description 2-13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7 Connectors and Test Points 2-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.7.1 Connectors 2-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7.2 Test Points (TP) 2-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7.3 Adjustments 2-15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7.4 LED Indicators 2-15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Software User’s Guide 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 Introduction 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 Main Program Screen 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.1 Synthesizer 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.2 Mode Options 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.3 Output Parameters 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.4 PLL and MM Options 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.5 Help 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.6 Words 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.7 Operation Mode 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2.8 Changing Values on the Main Program Screen 3-5. . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Chip Layout Screen 3-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4 PLL/Modulation Options Screen 3-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5 Testing of Transmitter 3-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Running Title—Attribute Reference
vi
1−1 TRF4900 Block Diagram 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2−1 TRF4900 EVM DC Voltage Setup 2-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2−2 TRF4900 EVM Serial Interface 2-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−1 Main Program Screen 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−2 Chip Layout Screen 3-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−3 PLL/Modulation Options Screen 3-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−4 Block Diagram for Testing of the TRF4900 EVM Transmitter Section 3-9. . . . . . . . . . . . . . . . . 3−5 Main Program Screen 3-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−6 Chip Layout Screen 3-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−7 Spectrum Analyzer 3-12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−8 Input of Frequency Error 3-13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−9 Main Panel Display After Clock Offset Is Applied 3-13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−10 Chip Layout View for FSK Modulation Output Test 3-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−11 PLL/Modulation Options Screen 3-15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−12 FSK Output From Transmitter 3-16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−13 Block Diagram for Testing of the TRF4900 EVM Transmitter Section With an
External Pulse Generator 3-16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3−14 FSK Output From Transmitter With an External Modulation 3-17. . . . . . . . . . . . . . . . . . . . . . . .
1-1Overview
This chapter provides an overview of the TRF4900 evaluation module (EVM).
Topic Page
1.1 Purpose 1−2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 EVM Setup 1−2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Block Diagram 1−3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1
Purpose
1-2
1.1 PurposeThe TRF4900 evaluation module (EVM) provides a platform for lab prototypeevaluation of the Texas Instruments TRF4900.
The TRF4900 EVM board evaluates the RF performance of the TRF4900. Itcontains a PC parallel port interface and operates from 850 MHz to 950 MHzfrom 2.2 V to 3.6 V. The TRF4900 EVM contains two SMA connectors thatallow the user to observe transmitted data, to test the VCO tuning range, orto feed in an external RF input. The transmitted data can be viewed on aspectrum analyzer as either a single output frequency or in FSK mode at datarates up to 30 kbps. Although higher data rates are achievable with theTRF4900, the TRF4900 EVM is designed to operate at data rates up to 30kbps at room temperature.
1.2 EVM SetupThe 3.5-inch diskette supplied with the TRF4900 contains the softwarerequired to demonstrate the TRF4900. Complete the following steps to set upthe TRF4900 for evaluation.
Step 1: Place the 3.5-inch diskette into the floppy disk drive of the computerbeing used to evaluate the TRF4900.
Step 2: Copy the TRF4900.exe file to the hard drive.
Step 3: Connect a DB25 female to a DB25 male cable between the TRF4900evaluation board and the PC parallel port. The DB25 female end ofthe cable is connected to the TRF4900. The DB25 male end of thecable is connected to the desired LPT port of the PC (LPT1 or LPT2).
Step 4: Connect a dc power supply capable of 10 V 200 mA between the redpower supply pin and ground on the TRF4900 evaluation board.
Step 5: Verify that the power supply output is set to 8 V.
Step 6: Turn the power supply on.
Step 7: If the jumper at JP4 is installed, verify that LED3 (the red power onLED) is illuminated.
Step 8: Run the TRF4900.exe file on the PC.
Step 9: Press the Send Words Now (F12) button located on the mainprogram screen.
Step 10: Verify that LED1 (the green lock detect LED) is illuminated. When thelock detect LED is illuminated, the PLL is locked on frequency.
Note:
The actual icons/windows on the computer screen may differ from thoseshown in the user’s guide, due to software version upgrades.
The schematics shown in this user’s guide may not match the currentrevision, due to PCB and component upgrades.
Always check the TI website for the latest schematics and software.
Block Diagram
1-3Overview
1.3 Block Diagram
Figure 1−1 shows the block diagram for the TRF4900.
Figure 1−1. TRF4900 Block Diagram
1
2
3
4
24
22
21
20
19
17
18
23
5
6
7
8
9
10
11
1213
14
15
16
VCO
TRF4900
PLL
PD_OUT2PD_OUT1
PLL_VCC
PD_SET
VCO_TANK1
VCO_TANK2
PLL_GND
DIG_GND
CLOCK
DATA
STROBE
MODE
STDBY
LOCKDET
PA_OUT
PA_GND
PA_VCC
GND
DIG_GND
XOSC2
XOSC1
DIG_GND
TX_DATA
NC
SerialInterface
Direct Digital Synthesizerand
Power-Down Logic
PowerAmplifier
1-4
2-1Evaluation Board
This chapter describes the EVM and its operation.
Topic Page
2.1 Schematics 2−2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Parts List 2−6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 EVM DC Voltage Setup 2−10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4 Serial Interface and PC Port Pin Out 2−11. . . . . . . . . . . . . . . . . . . . . . . . . . .
2.5 Standard PC Parallel Port 2−12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.6 Jumper Connections 2−13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.7 Connectors and Test Points 2−14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 2
Schematics
2-2
2.1 Schematics
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Schematics
2-3Evaluation Board
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Top Side Silkscreen and Drawing
2-4
2.1.1 Top Side Silkscreen and Drawing
Top Side Silkscreen and Drawing
2-5Evaluation Board
2.1.2 Bottom Side Silkscreen and Drawing
Parts List
2-6 Evaluation Board
2.2
Par
ts L
ist
Cou
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2-7Evaluation Board
Cou
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Cou
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2-9Evaluation Board
Cou
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2-10
2.3 EVM DC Voltage Setup
The evaluation board should be used with a dc power supply voltage of 8 Vnominal. Figure 2−1 details the dc voltage supply setup for the TRF4900 EVM.
Figure 2−1. TRF4900 EVM DC Voltage Setup
Vin is equal to 8 V
in
Vout for LM317 voltage regulator is equal to:
V at terminal 3 of LM317 should be 2 V to 3 Vhigher than Vout
V = 7.2 V equal to 8 V,
nominal.
With V
12
4
R33
LED3VCCLN1271R−(TR)
0JP4
R31 C17 C18 C19
2.0 − 3.8 V (3.0 V TYP)
VCC2
3.3V
C22C21C20R35
VCC1
S1JB
CR5RED8.0V
ZR1
SMBJ8.5CA
POWER
C15
R34
C16
2
3
R32
3VIN
2VOUT
1
ADJ
LM317MDTVR1
VI
3 VOVO
ADJ 5NC
6VO
7VO
8NC
VR2
LM317LBD
R36
10µ F 0.1µ F
220 Ω
500 Ω
220 Ω
1µ F 0.1 µ F 0.01µ F360 Ω
1µ F 0.1 µ F 0.01µ F220 Ω
360 Ω
Vadj Used to ChangeVout From 2.2 V to 3.6 V
GROUND CLIPS
TP4TP2 TP3
Vout = 1.25(1+((R32+R34)/R31))
Serial Interface and PC Port Pin Out
2-11Evaluation Board
2.4 Serial Interface and PC Port Pin Out
Figure 2−2 details the serial interface portion of the TRF4900 EVM.
Figure 2−2. TRF4900 EVM Serial Interface
10kR19
10kR20
10kR21
174163152141
13251224112310229218207196185
P1
DB25M
VC
C2
CLOCK
STROBE
0.1uFC14
1 1OE
20
2 1A14 1A26 1A38 1A4
19 2OE
11 2A1 92Y1
121Y4
181Y1 161Y2 141Y3
13 2A215 2A317 2A4
72Y2 52Y3 32Y410
IC2
SN74LVT244BDW
LED2ENABLE
LN1471SY−(TR)
10kR23
10kR22
10kR24
R25510
100R27
100R26
10kR30
10kR29
10kR28
VC
C2
VC
C2
TXDATA
MODE
STDBY
LL4148
CR1
LL4148
CR2
LL4148
CR3
LL4148CR4
23 1
JP22
3 1
JP3
MODESTDBYTXDATA
CLOCK
DATA
STROBE
LED1LDETLN1371SG−(TR)
DATA
10kR16
10kR17
10kR15
100
R13
100
R12
100
R14
510
R18
LOCKDET
P1 Computer Interface Connector Pin Number Function
2 DATA
3 CLOCK
4 STROBE
5 MODE
7 STDBY
9 TXDATA
18 thru 25 Ground
Standard PC Parallel Port
2-12
2.5 Standard PC Parallel Port
A standard PC parallel port is configured as follows:
1 13
14 25
View Is Looking atConnector Side ofDB-25 Male Connector
Pin
1234567891011121314151617
Description
StrobeData 0Data 1Data 2Data 3Data 4Data 5Data 6Data 7ACKBusyPaper EmptySelectAuto FeedErrorInitialize PrinterSelect Input
PC OutputPC OutputPC OutputPC OutputPC OutputPC OutputPC OutputPC OutputPC OutputPC InputPC InputPC InputPC InputPC OutputPC InputPC OutputPC Output
Pin Assignments
Note: 8 Data Outputs 4 Misc Other Outputs
5 Data Inputs
Note: Pins 18−25 Are Ground
Note: The TRF4900 EVM uses pins 2–9 for signals from the PC to the EVM.
Standard PC Parallel Port
2-13Evaluation Board
2.6 Jumper Connections
The default position of the jumpers on the TRF4900 EVM are configured asshown below.
1
2
To R1 and C2 (Loop Filter)
To R5 and R6 (VCO Tank)
1
2
3
To Mode Test Point
To Ground
1
2
3
To STDBY Test Point
To Ground
1
2
VR1 output (VCC1)
To LED3 anode (Power on LED)
Denotes Default Connection
JP1
JP3
JP2
JP4
JP1 is a 0-Ω 0603 resistor
JP2 Default is not installed
JP3 Default is not installed
To VCC2
To VCC2
JP4 is a 0-Ω 0603 resistor
2.6.1 Jumper Description
The jumpers on the TRF4900 EVM are used for the following purposes:
JP1Jumper JP1 connects the VCO tank circuit to the loop filter of the PLLcircuit. The only reason to remove jumper JP1 is to test the tuning rangeof the VCO tank circuit with an external power supply. The default state forjumper JP1 is JP1-1 to JP1-2. Jumper JP1 is a 0-Ω 0603 resistor.
JP2Jumper JP2 can be used to pull the STDBY line up to VCC (JP2-1 to JP2-2)or pull down to ground (JP2-2 to JP2-3), if a computer connection is notinstalled. The primary purpose for JP2 is as a test point to monitor the stateof the STDBY line. The default state for jumper JP2 is not connected.
JP3Jumper JP3 can be used to pull the MODE line up to VCC (JP3-1 to JP3-2)or pull down to ground (JP3-2 to JP3-3), if a computer connection is notinstalled. The primary purpose for JP3 is as a test point to monitor the stateof the MODE line. The default state for jumper JP3 is not connected.
JP4Jumper JP4 connects the Power-On LED to the output of the VR2 voltageregulator. The default state for jumper JP4 is JP4-1 to JP4-2. Jumper JP4is a 0-Ω, 0603 resistor.
Connectors and Test Points
2-14
2.7 Connectors and Test Points
The following information describes the TRF4900 EVM connectors and testpoints.
2.7.1 Connectors
P1P1 is the PC parallel port interface and is a male DB25 connector. P1 isconnected to the LPT1 or LPT2 port of the computer on which theTRF4900 software is running.
J1TX_OUT is an SMA female connector which is connected to thetransmitter output of the TRF4900.
J2 VCO_TANKVCO_TANK is an SMA female connector used with resistors R8, R9, R10,R11, and capacitor C6 to directly feed in an external VCO signal. ResistorsR8, R9, R10, and R11 are used to form a T attenuator. The componentsfor this option are not installed on the EVM.
2.7.2 Test Points (TP)
TP1Test point TP1 is used to monitor the tuning voltage applied to the VCOcircuit by the PLL circuit.
LDET TPThe LDET test point is used to monitor the lock detect line of the TRF4900.
MODE TPThe MODE test point is used to monitor the MODE line.
STDBY TPThe STDBY test point is used to monitor the STDBY line.
CLOCK TPThe CLOCK test point is used to monitor the CLOCK signal from the PC.
DATA TPThe DATA test point is used to monitor the DATA signal from the PC.
STROBE TPThe STROBE test point is used to monitor the STROBE signal fromthe PC.
TXDATA TPThe TXDATA test point is used to monitor the transmitted data. Transmitdata from an external source can also be applied at this point.
Connectors and Test Points
2-15Evaluation Board
2.7.3 Adjustments
Resistor R32 is varied to adjust the VCC1 voltage applied to IC1 (TRF4900).
2.7.4 LED Indicators
VCC LEDIf JP4 is installed, the VCC LED is illuminated when voltage is applied toIC1.
LDET LEDThe LDET LED is illuminated when the lock detect line IC1−23 (TRF4900)is high, indicating that the PLL circuit is locked.
ENABLE LEDThe ENABLE LED is illuminated when the STDBY line from the computeris in the high state.
2-16
3-1Software User’s Guide
This chapter describes the Windows-based software application thataccompanies the EVM.
Topic Page
3.1 Introduction 3−2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Main Program Screen 3−3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Chip Layout Screen 3−6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.4 PLL/Modulation Options Screen 3−7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.5 Testing of Transmitter 3−9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 3
Introduction
3-2
3.1 Introduction
A Windows-based software application accompanies the evaluation board.The software is intended for use in either a Windows 95/98 or Windows NTenvironment. If the Windows NT environment is used, the Windows NT driversoftware must accompany the software. However, if the operating system isWindows 95/98, the software application can run on its own.
Both the Windows NT Driver and the TRF4900 software are provided ondiskette. Your system administrator must install the Windows NT Driver if youdo not have administrative privileges on your computer. The TRF4900software can run from the floppy disk by following these steps:
1) Click on the Start button on the desktop
2) Click on the Run button
3) Type − A:\ TRF4900.exe and press OK
Main Program Screen
3-3Software User’s Guide
3.2 Main Program Screen
The screen shown in Figure 3−1 appears on your monitor.
Figure 3−1. Main Program Screen
Transmit FrequencyCrystal or ClockFrequency
Double Click Here With theLeft Mouse Button to ObtainChip Layout Screen
Computer Printer PortLPT1 or LPT2
Press to Program the TRF4900
NOTE: When word bits are displayed in RED, the Send Words Now (F12) button on the main program screen must be pressedfor changes to be updated.
The main program screen is divided into seven main sections as follows:
3.2.1 Synthesizer
This section is used to set the crystal/clock (CLK) frequency, the Desired Freq.,and the PreScaler value of the divide-by-N of the PLL. From these inputs, theactual frequency and bit values of Words A and B are calculated.
Main Program Screen
3-4
3.2.2 Mode Options
This section allows the user to control various features of the TRF4900. Thefollowing is a brief summary of the four controls.
1) PLL Turns the phase-locked loop on or off.
2) VCO The voltage controlled oscillator (VCO) is always on.
3) Pwr Amp Allows the power amp to be set to off, 20-dB attenuation,10-dB attenuation, or 0-dB attenuation states.
4) LPT Port Allows the user to change between the LPT1 and the LPT2 ports of the controlling computer.
3.2.3 Output Parameters
This section allows the user to turn the TRF4900 Enable, TXData, and Modecontrol lines on and off. When the mode control line is off, Mode 0 is defaulted.When the mode control line is on, Mode 1 is defaulted. Mode 0 initializes usingWords A and D; Mode 1 initializes using Words B and C.
Clock Width and Strobe Width allow the clock and strobe pulse widths to beincreased or decreased.
3.2.4 PLL and MM Options
Allows the change of the APLL value (0, 20, 40...140), the NPLL value (256,512), and the Modulation Mode (FSK).
3.2.5 Help
Gives a brief description of each control box. For example, after clicking thePLL box in the Mode Options section on the main program screen, the Helpbox will read:
Phase-Lock Loop 0: Off1: OnValid in Mode 0 or 1.
Most of the other control boxes follow this format. The first line indicates whatportion of the TRF4900 is being controlled. The next two lines indicate the bitvalue. If the PLL is off, bit 12 of Words C and D are equal to 0. If it is on, bit 12is equal to 1. The last line indicates this control works in both Mode 0 andMode 1.
Double clicking in the Help box on the main program screen activates the chiplayout screen.
Main Program Screen
3-5Software User’s Guide
3.2.6 Words
This section updates the binary words after changes are made to the controloptions. Clicking on the box next to the word can individually send each word.Clicking on the Send Words Now (F12) button on the main program screen orpressing F12 on the keyboard, sends all the words to the TRF4900.
3.2.7 Operation Mode
Operation mode shows whether the TRF4900 is enabled, which mode (0 or1) is selected, and whether the transmit (TX) data line is on or off.
3.2.8 Changing Values on the Main Program Screen
Synthesizer Section
CLK Type the desired clock frequency inside the box or usethe arrows located at the right side of the box.
Desired Freq. Type the desired transmit or LO receive frequency insidethe box or use the arrows located at the right side of thebox.
PreScaler Click inside the box to change divide-by-N valuebetween 256 and 512. The value of NPLL under PLL andMM Options changes when the PreScaler valuechanges.
Mode Options
PLL Click inside the box to turn the PLL on or off (turn on fortransmit).
VCO The VCO is always on. Clicking has no effect.
Pwr Amp Use the arrow at the side of the box to select the desiredpower amplifier attenuation.
Output Parameters
Enable Click inside the box to turn the TRF4900 on or off.
TXData Click inside the box to switch the TXData line betweenhigh and low.
Mode Click inside the box to switch the mode line between 0and 1.
Clock Width Type inside the box to increase or decrease the clockpulse width (this should not be changed during normaluse).
Strobe Width Type inside the box to increase or decrease the strobepulse width (this should not be changed during normaluse).
Chip Layout Screen
3-6
PLL and MM Options
APLL: Use the arrows beside the box to select from values of 0,20, 40, 60, 80, 100, 120, and 140.
NPLL: Click inside the box to change the divide-by-N valuebetween 256 and 512. The value of PreScaler underSynthesizer changes when the NPLL value changes.
MM: Modulation Mode is fixed to FSK Modulation Mode.
LPT Port
LPT_x: Click inside the box to chose between PC parallel portsLPT 1 or LPT 2.
Help
Help: When any box on the main program screen is selected(clicked inside of box with mouse), the Help screendisplays the valid selections for that box. Double clickinginside the Help box cause the chip layout screen to bedisplayed as shown in Figure 3−2.
3.3 Chip Layout Screen
The chip layout screen can be accessed by double clicking on the left mousebutton in the Help section of the main program screen. The chip layout screenappears as a simplified internal schematic of the TRF4900 as shown inFigure 3−2.
PLL/Modulation Options Screen
3-7Software User’s Guide
Figure 3−2. Chip Layout Screen
Enable or Standby.IC is Disabled inStandby Mode.
Press to SelectPLL/ModulationOptions Screen
Press to StartFSK Test
Press to Program the TRF4900
Turn TX Data On or Off
Mode Select 0 or 1
Clicking Here SetsPower AmpAttenuation (0 dB,10 dB, 20 dB) orTurn the PowerAmp Off
Press to Turn PLL and VCO On or Off
The Mode Options (e.g., the Power Amp, PLL, etc.) may be controlledfrom the chip layout screen, as well as from the main program screen.Changes made in either the main program screen or the chip layoutscreen simultaneously update both screens. The user can also control thechip enable, TXData, and mode control lines from the chip layout screen.
The user can select FSK Modulation. The FSK Test button, located on thechip layout screen, will allow the user to transmit data using the TRF4900.Options for use with the FSK Test button are the pulse repetition frequency(PRF), which is defaulted to 100 Hz, and the Run Time (Min), which canbe set in minutes. For example, if you want the test to run for five minutes,set Run Time (Min) to 5.
The PLL/Modulation Options button brings up the PLL/ModulationOptions screen as shown in Figure 3−3. This button is activated only whenthe PLL is on.
3.4 PLL/Modulation Options Screen
The PLL/Modulation Options screen is accessed by pressing thePLL/Modulation Option button, located on the chip layout screen, and isdisplayed as shown in Figure 3−3.
PLL/Modulation Options Screen
3-8
Figure 3−3. PLL/Modulation Options Screen
DV6 DisplaySet to 1 byDouble Clicking
f1 Frequency915 MHz
f2 Frequency915.10 MHz
FSK Deviationof 100 kHz
Send BitsButton
The PLL/Modulations Options screen is divided into the following foursections:
APLL
Controls the acceleration factor for the PLL. The values are 0, 20, 40, 60,80, 100, 120, and 140. Any changes are automatically updated in the PLLand MM Options section of the main program screen after pressing theSend Bits button located on the PLL screen.
NPLL
Controls the N-Divider of the PLL. The NPLL can be set to either 256 or512. Any changes are automatically updated in the NPLL box on the mainprogram screen after pressing the Send Bits button located on the PLLscreen.
Modulation Mode
Allows the user to select FSK modulation. Any changes are automaticallyupdated in the MM box on the main program screen after pressing theSend Bits button located on the PLL screen.
FSK Frequency Register
This section acts as a calculator and sets bits 20−13 of Word D to the userdefined bits. The bits of the FSK deviation register (DV7−DV0) can be setindividually by double clicking inside each DVx box. After setting all bits,press the Send Bits button located on the PLL/Modulation Options screen.The bits of the frequency register will be mapped to Word D on the mainprogram screen, and highlighted in green. Furthermore, Fout: TX_DataHigh (MHz), Fout: TX_Data Low (MHz) frequencies, and their difference(Delta Fout kHz), are calculated and displayed.
Press the Send Bits button located on the PLL/Modulation Options screen toprogram the TRF4900. Press the Close button to return to the chip layoutscreen.
Testing of Transmitter
3-9Software User’s Guide
3.5 Testing of Transmitter
To test the transmitter section of the TRF4900, perform the following steps:
Step 1: Test Setup:
Set up the test bench as shown in Figure 3−4.
Figure 3−4. Block Diagram for Testing of the TRF4900 EVM Transmitter Section
PC withTRF4900 software
installed Frequency Counter
TRF4900Evaluation
Board
P1DB25M(Male)
J1
PC printer port(LPT1 or LPT2)
Cable DB25M to DB25F
Spectrum Analyzer
DirectionalCoupler
Coupled Port
Testing of Transmitter
3-10
Step 2: Software Programming:
To test the TRF4900 transmitter section, set the main program screen and thechip layout screen as shown in Figure 3−5 and Figure 3−6.
Figure 3−5. Main Program Screen
Transmit FrequencyDouble Click Here With Left MouseButton to Obtain Chip Layout View
Testing of Transmitter
3-11Software User’s Guide
Chip Layout Screen of TRF4900 Software for Transmitter Testing
Figure 3−6. Chip Layout Screen
Clicking Here SetsPower Amp Attenuation(0 dB, 10 dB, 20 dB) orTurn the Power Amp Off
Press to ProgramTRF4900
After setup is complete, press the Send Words button on the chip layout screenor the Send Words Now (F12) button on the main program screen to send theprogramming words to the TRF4900.
Testing of Transmitter
3-12
Step 3: Spectrum Analyzer Setup and Clock Offset Procedure
Setup the spectrum analyzer to observe the following:
Figure 3−7. Spectrum Analyzer
Clock Offset Procedure
1) Use the test setup as shown in Figure 3−4 and transmitter software setupshown in Figure 3−5 and Figure 3−6.
2) Observe the frequency reading on the frequency counter.
3) Subtract 915.000000 MHz from the frequency counter reading.
4) Enter the difference value in the Freq. Error box in the main programscreen as shown in Figure 3−8.
5) Note: If the difference value is negative, enter – sign, followed by the differ-ence value.Example: Frequency counter reading is 914.996000 MHzSubtracting 915.000 MHz from 914.996 MHz will yielda difference of –4000 Hz. This difference is entered in the Freq. Errorblock as −0.004 MHz (see Figure 3−8).
6) Press the Update CLK button on the main program screen.
7) Verify that clock frequency is updated as shown in Figure 3−9.
8) Pressing the Update CLK button twice clears the frequency offset.
Testing of Transmitter
3-13Software User’s Guide
Figure 3−8. Input of Frequency Error
Frequency Error is entered here Press Update CLK button
Figure 3−9. Main Panel Display After Clock Offset Is Applied
Testing of Transmitter
3-14
Step 4: FSK Modulation Output Test
On the chip layout screen press the PLL/Modulation Options button.
The PLL/Modulation Options View Is Set Up as Shown in Figure 3−11.
Figure 3−10. Chip Layout View for FSK Modulation Output Test
Select This Buttonto Start the FSKModulation Test
Select to Programthe TRF4900
Select This ButtonWith Mouse to SetFSK Frequency
Set the DVx bits, as shown in Figure 3−11, by double clicking inside eachDVx box to set the value to either a 1 or 0. For this example only DV6 isset to a 1.
Press the Send Bits button located on the PLL/Modulation Options screen,to obtain the results shown in Figure 3−11.
Press the Close button located on the PLL/Modulation Options screen.
Testing of Transmitter
3-15Software User’s Guide
Figure 3−11. PLL/Modulation Options Screen
DV6 DisplaySet to 1
f1 Frequency915 MHz
f2 Frequency915.10 MHz
FSK Deviationof 100 kHz
Send BitsButton
Press the Send Words button on the chip layout screen or the Send WordsNow (F12) on the main program screen.
Press the FSK Test button on the chip layout screen, as shown in Figure3−10, to start the FSK test.
Set up the spectrum analyzer to observe the spectrum analyzer displayas shown in Figure 3−12.
Testing of Transmitter
3-16
Figure 3−12. FSK Output From Transmitter
Note: This is FSK modulation with f1 equal to 915.0 MHz, f2 equal to 915.10-MHz and 100-Hz data rate.The f1 frequency is the 0 frequency. The f2 frequency is the 1 frequency.
Figure 3−13. Block Diagram for Testing of the TRF4900 EVM Transmitter Section With anExternal Pulse Generator
J1
PC WithTRF4900 Software
Installed PC Printer(LPT1 or LPT2)
PowerSupplyCable DB25M to DB25F
P1DB25M(Male)
TRF4900Evaluation
Board
Spectrum AnalyzerTXDATA TPGND TP
Coaxial Cable WithClip Lead EndsPulse
GeneratorPulse Generator Output Waveform
3 V1 kHz
Testing of Transmitter
3-17Software User’s Guide
To use an external pulse generator to supply transmit data, set up the testbench as shown in Figure 3−13.
Perform the FSK modulation output test as described in the previoussection. In this new setup, an external pulse generator is providing themodulation. The FSK Test button on the chip layout screen does not needto be pressed to start the FSK test.
Figure 3−14. FSK Output From Transmitter With an External Modulation
Note: This is FSK modulation with f1 equal to 915.0 MHz, f2 equal to 915.10-MHz and 1000-Hz data rate.The f1 frequency is the 0 frequency. The f2 frequency is the 1 frequency.
3-18
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