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maXTouchPCB/FPCB Layout Guidelines
1. IntroductionThe maXTouch touch controllers are capable of driving mutual-capacitance
touchscreens with the electrodes arranged in X by Y grids.
It is important to observe certain layout practices in the routing of traces to and from
the chip to optimize its performance.
In general the flexibility and tolerance of the controller allows the system designer the
freedom to site the chip either on the main PCB with a passive tail connection to the
sensor, or on the sensor tail itself.
For more information on designing mutual-capacitance electrodes refer to the Touch
Sensors Design Guide. For more information on touchscreen designs for the
maXTouch chip, refer to QTAN0054, Getting Started with maXTouch Touchscreen
Designs.
Note: This application note assumes the use of 49-ball BGA maXTouch chips.However, much of the information is also relevant to QFN packages.
2. Example Component LayoutAn example component layout for the mXT224 is shown in Figure 2-1.
Figure 2-1. Example Component Layout for the mXT224 Top View
maXTouch Chip5 x 5 mm BGA
7 mm
7 mm
C1(0402)
C2(0201)
C4(0201)
C5(0201)
C3(0402)
Y Lines
X Lines
X Lines
GPIO andComms Lines
R1 R2 R3 R4
Extended Mode
Resistors (0201; )100
maXTouch
PCB/FPCB
Layout
Guidelines
Application NoteQTAN0048
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3. Trace Routing
3.1 X and Y Sensor Traces
3.1.1 Introduction
The ideal tracking order is shown in Figure 3-1.
When routing the X and Y traces, there are some important guidelines that must be followed
as given in the following sections. Later sections in this application note give further routing
advice.
Figure 3-1. Ideal Sensor Tracking for 18X by 10Y
3.1.2 Y Lines
The Y lines are the most critical in terms of layout. They are not themselves touch sensitive
but can interact with nearby X lines and use up the mutual capacitance measurement
budget of the chip's front end unless care is taken.
Observe these points:
Try to minimize the length between the IC and the sensor.
Keep the routed length from the chip to the sensors hot-bond region to 100 mm or less in
all cases. Avoid running Y lines over or between ground or power planes to help minimize stray
capacitance (note that with maXTouch chips stray capacitance on Y lines does not degrade
the signal measurement, but it can cause extra settling time to be needed during the
charge transfer cycle).
Try to keep parasitic routing capacitance on each Y line to less than 50 pF (to ground or
other low impedance circuits) between the chip and the sensor hot-bond.
Do not place any components in series or parallel with the Y lines.
X0
X2
X4
X6
X8
X10
X12
X14
X16
X1
X3
X5
X7
X9
X11
X13
X15
X17
Y0Y1
Y2Y3
Y4Y5
Y6Y7
Y8Y9
NOTE: No ITO pattern is assumed for X and Y traces
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The parasitic series resistance of each Y line should be kept to less than 100from the
chip to the sensor hot-bond.
Always route Y traces using minimum track and gap geometries, and route them as a
group all the way from the chip to the sensor.
Do not route the Y lines in parallel to (and above) the X lines, such as on opposite sides of
a flex.
Separate the Y lines from the X lines using a double width or double gap ground trace
between the groups of signals. This converts coupling (mutual) capacitance into stray
capacitance, which is more tolerable.
If the Y lines must cross the X lines on opposite layers, cross them at 90 and, ideally, far
away from any touchable regions. Cross them on layers that are as far apart as possible.
Keep foreign signals (for example, D-class amplifier drives, communications signals, data
buses or strobes) well away from the Y lines.
3.1.3 X Lines
The next most critical traces are the X lines. These are not themselves touch sensitive, bu
any interaction with Y lines istouch sensitive. Note that dedicated X lines are slew rate limited
typically with Trand Tftimes in hundreds of nanoseconds. The additional extended mode X
lines (where applicable) require slew control resistors, as described below.
Observe these points:
Keep the routed length from the chip to the sensors hot-bond region to 100 mm or less in
all cases.
Avoid excessive capacitive loading on the X lines to ground. A loading of 50 pF or less on
each of the X lines is the maximum tolerable loading between the chip and the sensor
hot-bond.
Do not place any component in series or parallel with the X lines, with one exception: in
extended mode (where used) the extended X lines require a 100series slew control
resistor (0201 or larger) within 5 mm of the chip body.
All X lines should be routed as a group.
See the notes on Y lines in Section 3.1.2for X to Y separation rules.
The parasitic series resistance of each X line (not including extended X line resistance)
should be kept to less than 100from the chip to the sensor hot-bond.
3.1.4 Mixed Touchscreen and Touch Key Designs
In situations where touch keys are required as well as a touchscreen, follow the same routing
advice as that given for X and Y lines in Section 3.1 on page 2.
Note that with the maXTouch chips the Y lines used for the keys typically cannot be shared
with the touchscreen; however, X lines can be shared with the touchscreen.
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Table 3-1shows an example configuration for the mXT224 in native mode.
Table 3-2shows an example configuration for teh mXT224 in extended mode.
For more information on the use of the extended modes, and for more detailed layout rules
refer to the datasheet for your maXTouch device.
3.2 Power Traces
Power to the maXTouch is provided via two sets of pins: VDD (digital supply) and AVDD
(analog supply).
3.2.1 VDD
This is the digital supply to the chip. It is independent of the analog supply and can be
sequenced independently of it. Refer to the datasheet for your maXTouch device fo
allowable ranges.
VDD is not directly used as part of the capacitive measurement process and so it is relatively
tolerant of noise.
While the average power used by VDD is low, the instantaneous peak current on VDD (around
5-7 mA for 1 to 2 ms every acquisition then
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3.2.2 AVDD
This is the analog supply to the chip. It is independent of the digital supply and can be
sequenced independently of it. Refer to the datasheet for your maXTouch device fo
allowable ranges.
AVDD is critical to the performance of the chip and is used directly by the measurement front
end. Slow rate changes in AVDD (changes of a few percent over a period of several minutes)will be compensated by the chip. Fast rate changes will cause shifts in the measured
capacitive values and will degrade the signal to noise ratio and hence the quality of the
reported XY position or the reporting rate. Refer to the datasheet for your maXTouch device
for PSSR versus Frequency details.
While the average power used by AVDD is low, the instantaneous peak current on AVDD
(around 12-15 mA for 1 ms every acquisition then
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Figure 3-3. Ground Trace Routing
Shared Ground Trace BAD!
maXTouchChip
GND
AVDD
VDDOtherChips
GND
Split Ground Trace Good
AVDD
VDDOtherChips
Star-point
maXTouchChip
GND
Shared Ground Flood BETTER
AVDD
VDDOtherChips
maXTouchChip
GND
Split Ground Flood BEST Star-point
AVDD
VDDOtherChips
maXTouchChip
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3.3 Communication Traces
Always route SDA, SCL and CHG lines well away from the Y and X lines to avoid any potentia
coupling and hence noise contamination.
There are no internal pull-up resistors in the maXTouch chip so external pull-up resistors are
required for SDA and SCL. These resistors must be at the same voltage as VDD. CHG is also
open drain so requires a pull-up resistor in the same manner.Refer to the datasheet for your maXTouch device for recommended pull-up resistor values.
3.4 Other Traces
RESET routing is non-critical. It can be left open if not used, but it is strongly recommended to
allow host control of this signal to perform a full system reset when required.
ADDR_SEL should be terminated to VDD or GND depending on which I2C-compatible
address is required. Its routing is non-critical. It can also be driven from another device, i
required, but note that it is sampled only at start-up or reset to select the address.
4. Hot-bond LayoutFigure 4-1shows the Flooded-X and Snowflake bonding pad layouts for both glass and PET
sensors for the mXT224. Note that the Flooded-X on glass design does not allow for the
optimal pad order because it has to be bonded onto opposite sides of the substrate.
Figure 4-1. Bonding Pad Layouts for the mXT224
(evens)GND
X16
|X0
GND
Y0 |
Y9
GND
X1 |
X17
GND
(odds)
GND
X17
|X0
GND
Y0 |
Y9
GND
All pads on same side of the glass
Pads on opposite sides of the glass
Snowflakeon glass
Flooded-Xon glass
(evens)GND
X16
|X0
GND
Y0 |
Y9
GND
X1 |
X17
GND
(odds)
All pads on same side, but on different PET layers
Snowflakeon PET
(evens)GND
X16
|X0
GND
Y0 |
Y9
GND
X1 |
X17
GND
(odds)
All pads on same side, but on different PET layers
Flooded-Xon PET
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5. BGA Escape RoutingFigure 5-1shows two example escape routing patterns for the mXT224: a one-layer pattern
and a two-layer pattern. The principles given here also apply to other maXTouch devices.
Figure 5-1. Example 49-ball BGA Escape Routing Patterns
One-layer Escape Routing Pattern
Two-layer Escape Routing Pattern
Be sure to follow applicable guidelines for BGA routing between-pads. Via-in-pad is also
acceptable as long as solder wicking can be controlled (micro vias or plugged vias are strongly
recommended). Also pay particular attention to solder mask clearances around and between
the BGA pads to guarantee that, even under worst case misalignment of the resist and/or the
chip, that there is no chance of BGA solder balls contacting partly non-insulated traces tha
escape between pads.
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6. FPC Tail
6.1 FPC Orientation
The shape and direction of the connector stub influences the tracking pinout. Figure 6-1
shows three scenarios that illustrate different tracking layouts using the same connector
pinouts.
Figure 6-1. Scenarios for Tracking Pinouts
6.2 FPC Folding PathDepending on which side the connector is attached to both the FPC and the soldered side ofthe connector on the main board, the pinout may be mirrored or rotated as the result of one
small change (see Figure 6-2). This can, of course, be corrected using vias if there is
enough space.
Figure 6-2. FPC Folding Path
5 4 3 2 1
6 7 8 9 10
3,4,5,6,7,8,9,10,1,2
5 4 3 2 1
6 7 8 9 10
1,2,3,4,5,6,7,8,9,10
5 4 3 2 1
6 7 8 9 10
6,7,8,9,10,1,2,3,4,5
12
34
5
109
87
6
12
34
5
109
87
6
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6.3 FPC Layers
Using a one-layer FPC (see Figure 6-3) results in a limitation on the possible pinouts. In this
case, shielding is also not possible.
Figure 6-3. One-layer FPC
A two-layer FPC (see Figure 6-4) allows for much more flexibility in the pinout, tracking and
shielding options, but remember to keep X-Y coupling to a minimum.
Figure 6-4. Two-layer FPC
A FPC ZIF style connector makes the choice of pinouts more difficult as there are fewer
convenient spaces for vias (see Figure 6-5).
Figure 6-5. FPC ZIF Style Connector
7. Associated DocumentsThe following documents are also of use:
Datasheet: relevant to your maXTouch device Touch Sensors Design Guide (document reference: 10620-AT42)
Application Note: QTAN0054 Getting Started with maXTouch Touchscreen Designs
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Notes
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