7/27/2019 PULSE WIDTH MODULATION TECHNIQUES.docx
http://slidepdf.com/reader/full/pulse-width-modulation-techniquesdocx 1/4
PULSE WIDTH MODULATION TECHNIQUES
The three phase, six-step inverter control is simple and the switching loss is low because there
are only six switchings per cycle of fundamental frequency. Unfortunately, the lower order harmonics of
the six-step voltage wave will cause large distortions of the current wave unless filtered by bulky
uneconomical low-pass filters. Besides, the voltage control by the line-side rectifier has the usualdisadvantages.
PWM Principle
Because an inverter contains electronic switches, it is possible to control the output voltage as
well as optimize the harmonics by performing multiple switching within the inverter with the constant
dc input voltageVd. The PWM principle to control the output voltage is explained as shown in the fig. The
fundamental Vl has the maximum amplitude (4Vd/π) at square wave, but by creating two notches as
shown, the magnitude can be reduced. If the notch widths are increased, the fundamental voltage will
be reduced.
Fig. PWM principle to control output voltage
PWM Classification:
There are many possible PWM techniques proposed in the literature. The classification of PWM
techniques can be given as follows:
Sinusoidal PWM (SPWM)
Selected harmonic elimination (SHE) PWM
Minimum ripple current PWM
Space Vector PWM (SVM)
Random PWM
Hysteresis band current control PWM
7/27/2019 PULSE WIDTH MODULATION TECHNIQUES.docx
http://slidepdf.com/reader/full/pulse-width-modulation-techniquesdocx 2/4
Sinusoidal PWM with instantaneous current control
Delta Modulation
Sigma-delta modulation
Hysteresis-Band Current Control PWM
Principle of hysteresis-band current control
Hysteresis-band PWM is basically an instantaneous feedback current control method of PWM
where the actual current continually tracks the command current within a hysteresis band. The figure
explains the operation principle of hysteresis-band PWM for a half-bridge inverter. The control circuit
generates the sine reference current wave of desired magnitude and frequency, and it is compared with
the actual phase current wave. As the current exceeds a prescribed hysteresis ban, the upper switch in
the half bridge is turned off and the lower switch is turned on. As a result, the output voltage transitions
from +0.5Vd to -0.5Vd and the current starts to decay. As the current crosses the lower band limit, the
lower switch is turned off and the upper switch is turned on. A lock-out time (td) is provided at each
7/27/2019 PULSE WIDTH MODULATION TECHNIQUES.docx
http://slidepdf.com/reader/full/pulse-width-modulation-techniquesdocx 3/4
transition to prevent a shoot through fault. The actual current wave is thus forced to track the sine
reference wave within the hysteresis band by back-and-forth switching of the upper and lower switches.
The inverter then essentially becomes a current source with peak-to-peak current ripple, which is
controlled within the hysteresis band irrespective of Vd fluctuation. When the upper switch is closed, the
positive slope of the current is given as
Where 0.5Vd is the applied voltage, Vcm sine Ѡet = instantaneous voltage of the opposing load CEMF, and
L=effective load inductance. The corresponding equation when the lower switch is closed is given as
The peak-to-peak current ripple and switching frequency are related to the width of the
hysteresis band. For example, a smaller band will increase switching frequency and lower the ripple. An
optimum band that maintains a balance between the harmonic ripple and inverter switching loss is
desirable. The hysteresis-band PWM can be smoothly transitioned to square wave voltage mode
through the quasi PWM region. In the low speed region of the machine, when the CEMF is low, there is
no difficulty in the current controller tracking. However, at higher speeds, the current controller will
saturate in part of the cycle due to a higher CEMF and fundamental frequency-related harmonics will
appear. At this condition, the fundamental current will be less and its phase will lag with respect to the
command current.
Control block diagram of hysteresis band PWM
Fig shows the simple control block diagram for a hysteresis-band PWM implementation. The error in the
current control loop is impressed at the input of a comparator with a hysteresis band, as shown. The
bandwidth of HB is given as
7/27/2019 PULSE WIDTH MODULATION TECHNIQUES.docx
http://slidepdf.com/reader/full/pulse-width-modulation-techniquesdocx 4/4
HB=V
Where V=comparator supply voltage. The condition for switcjing the devices are:
Upper switch on:
(i*-i)>HB
Lower switch on:
(i*-i)<-HB
For a three-phase inverter, a similar control circuit is used in all phases.
The hysteresis-band PWM has been very popular because of its simple implementation, fast transient
response, direct limiting of device peak current, and practical insensitivity of dc link voltage ripple thatpermits a lower filter capacitor. However, there are a few drawbacks of this method. It can be shown
that the PWM frequency is not constant (varies within a band) and, as a result, non-optimum harmonic
ripple is generated n the machine current. An adaptive hysteresis band can alleviate this problem. It can
be shown that the fundamental current suffers a phase lag that increases at higher frequency. This
phase deviation causes problems in high-performance machine control. Of course, isolated neutral load
(which is not discussed here) creates additional distortion of the current wave.
Top Related