Programming Super-VGA Graphics Devices
Introduction to VESA graphics modes and to organization of the
linear frame-buffer memory
Motivation
• The impetus for high-quality PC graphics was an early incentive for developing the 32-bit Intel x86 processor, since graphics images with realistic color and animation requires efficient access to a much larger memory-segment than can be addressed with the original 20-bit real-mode scheme
Raster Display TechnologyThe graphics screen is a two-dimensional array of picture elements (‘pixels’)
These pixels are redrawn sequentially, left-to-right, by rows from top to bottom
Early ‘planar’ memory
7 6 5 4 3 2 1 0
Each cpu byte-address controlled 8 adjacent pixels in 4 parallel color-planes
640-by-480 times 4-planes, divided by 8 bits-per-byte = 38400 byte-addresses
Greater picture fidelity
640
480
1280
960
1280-by-960 = 1228800 pixels (i.e., picture-elements) times 4 bytes-per-pixel = 614400 bytes of vram
Typical Chipset Layout
MCHMemory Controller Hub
(Northbridge)
ICHI/O Controller Hub
(Southbridge)
CPUCentral Processing Unit
DRAMDynamic RandomAccess Memory
NICNetwork Interface
Controller
HDCHard Disk Controller
ACAudio Controller
GraphicsController
Timer Keyboard Mouse Clock
MultimediaController
FirmwareHub
PCI Configuration Space
PCI Configuration Space Body(48 doublewords – variable format)
64doublewords
PCI Configuration Space Header(16 doublewords – fixed format)
A non-volatile parameter-storage area for each PCI device-function
PCI Configuration Header
StatusRegister
CommandRegister
DeviceID
VendorID
BISTCacheLineSize
Class CodeClass/SubClass/ProgIF
RevisionID
Base Address 0
SubsystemDevice ID
SubsystemVendor ID
CardBus CIS Pointer
reservedcapabilities
pointer Expansion ROM Base Address
MinimumGrant
InterruptPin
reserved
LatencyTimer
HeaderType
Base Address 1
Base Address 2Base Address 3
Base Address 4Base Address 5
InterruptLine
MaximumLatency
31 0 31 0
16 doublewords
Dwords
1 - 0
3 - 2
5 - 4
7 - 6
9 - 8
11 - 10
13 - 12
15 - 14
reserved
Interface to PCI Configuration Space
CONFADD( 0x0CF8)
CONFDAT( 0x0CFC)
31 23 16 15 11 10 8 7 2 0
EN
bus(8-bits)
device(5-bits)
doubleword (6-bits)
function(3-bits) 00
PCI Configuration Space Address Port (32-bits)
PCI Configuration Space Data Port (32-bits)
31 0
Enable Configuration Space Mapping (1=yes, 0=no)
Reading PCI Configuration Data
• Step one: Output the desired longword’s address (bus, device, function, and dword) with bit 31 set to 1 (to enable access) to the Configuration-Space Address-Port
• Step two: Read the designated data from the Configuration-Space Data-Port:# read the PCI Header-Type field (byte 2 of dword 3) for bus=0, device=0, function=0
movl $0x8000000C, %eax # setup address in EAXmovw $0x0CF8, %dx # setup port-number in DX outl %eax, %dx # output address to port
mov $0x0CFC, %dx # setup port-number in DXinl %dx, %eax # input configuration longwordshr $16, %eax # shift word 2 into AL registermovb %al, header_type # store Header Type in variable
Graphics programs
• What a graphics program must do is put appropriate bit-patterns into the correct locations in the VRAM, so that the CRT will show an array of colored dots which in some way is meaningful to the human eye
• So the programmer must understand what the CRT will do with the contents of VRAM
How ‘truecolor’ works
R
B
G
alpha red green blue081624
pixel
longword
The intensity of each color-component within a pixel is an 8-bit value
Vendor incompatibilities
• Several competing vendors manufacture graphics controllers for the PC market
• They’re based in various parts of the world (e.g., United States, Canada, Taiwan, etc.)
• Their hardware designs are not identical
• The VESA (Video Electronics Standards Association) organization was created to create a standardized firmware interface
VBE 3.0
• The VESA BIOS Extensions document is accessible on our CS 630 course website
• It implements services in a manner similar to the ROM-BIOS routines we’ve used in our previous boot-time applications (e.g., via software interrupt-0x10)
• We’ve created a demo-program (named ‘vesademo.s’) illustrating VESA’s use
Typical ‘program-structure’
Usual steps within a graphics application:– Initialize video system hardware– Display some graphical imagery– Wait for a termination condition– Restore original hardware state
Hardware Initialization
• The SVGA system has over 300 registers which must be individually reprogrammed
• It would take us many months to learn how they all work to support a graphics mode
• For now, we just ‘reuse’ vendor-supplied routines, built into the SVGA firmware
• They usually support quite a few different screen-resolutions and color-depths
Physical Memory Layout
Graphicsframe-buffer
our code/data 0x0001000
Base-Address is dynamically assigned by firmware at power-on
CPUaddress space (4GB)
VESA function 1
• Obtains a block of parameter-values for the desired graphics display-mode:– Scanline-width (in bytes)– Horizontal resolution (in pixels)– Vertical resolution (in pixels)– Pixel-size (in bits-per-pixel)– Frame-buffer’s physical address
VESA function 2
• Reprograms all the graphics controller’s internal device registers for the selected VESA-standard display-mode
In-class exercise #1
• Can you reprogram the colors used in our ‘vesademo.s’ application to use another border-color and another annulus-color?
ALPHA RED GREEN BLUE
31……...24 23……16 15…..….. 8 7 ……… 0
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