Major Technical Requirements
Technical requirements are for the following items:
Item-1: Automated test System for C-Band TR Modules (ATS/TRM) as per attached RFP.
Item-2: Automated test System for X-Band TR Modules (ATS/TRM) as per attached RFP.
Guideline to Vendors
1. Automated test System requirements for C & X-Band TR Modules (ATS/TRM) may be combined in a
single system.
2. Vendor shall develop common ATS control software and hardware to cater the requirement for both
C and X-Band.
3. Vendor shall develop ATS to cater requirement of individual & multiple TR Modules (8 Nos.) testing
and TR Block controller & TR Controller testing , required for both C & X-Band.
4.Vendor is required to quote in slabs of 1, 2-3, 4-5, 6 & above.
5.Vendor is required to quote for both 3 years and 5 years warranty and application support options.
6. Source code and installation kit containing actual deliverable software shall be provided.
7. Final configuration of ATS will be decided based on the pre-bid discussions with the vendor.
1
RFP OF Automated Test System for C-Band TR Modules
(ATS/TRM)
2
TR Module-Automated Test System
(TR Module-ATS)
1.0 SCOPE OF WORK
Building, integrating (both hardware and software segments) and
supplying an integrated TR Module – Automated Test System (ATS),
meeting the following requirements:
1. Shall be able to Test 8 TRMs sequentially at a time as per the TR Module
specifications and test plan given in Annexure-I &II respectively. It shall
be possible to Test & characterize even if 1 TRM is present.
2. Shall provide all the external interfaces needed by all the DUTs and
control the DUTs. Shall be able to power all or any one of the DUTs
selectively. However, measurements can be sequential.
3. Shall be able to test Transmit Receive Controller (TRC) outputs which
are digital signals, as per test plan given in Annexure-II.
4. Shall be able to run through the complete test plan (Annexure-II)
without any further manual intervention, once the setup is made and
calibration is done.
5. RF hardware making ATS shall be chosen such that entire “TR Module
Test Plan (Annexure-II)", for each TR Module is executed within 50
minutes.
6. Both the transmit path & Receive path measurements are pulsed. ATS
shall be able to run through the "TR module test plan" under pulsed
condition with selectable PRF. However ATS should have a provision to
test NF in CW condition also.
7. ATS shall have capability to program EEPROM data in TR module and to
validate programmed data, through serial data lines with one CMOS
monitor enable command.
8. The ATS software shall be implemented such that it is modular, easily
amenable to modifications/expansions without major change in the
"core" of the software.
9. ATS software shall be able to process the measured data and shall be
able to generate plots, export the data to Microsoft Excel spreadsheets
or any spreadsheet software, e.g. open-office & PDF format with all the
necessary annotations.
10. Proper naming convention and alphanumeric id (having 3 digits TRM
identification) for unit under test is to be defined to identify test results
and reports.
3
11. ATS Specifications: ATS specifications for measurement of 5350 ± 125 MHz TRM
( however, ATS should have bandwidth selection up to +/- 225 MHz) up to third
harmonic (18 GHz) at standard lab conditions (23 ± 3 ⁰C, 55 ± 5 % Relative
humidity):
Table-1
Sl. No. Measurement Specification
1. Frequency 0.5 GHz to 18 GHz
2. Peak power handling 42dBm max., 12 % duty max.
3. Pulsed S-parameter
measurement accuracy
< 5 deg –phase
< 0.5dB – Magnitude
4. Peak power measurement
accuracy
≤ 0.3 dB
5. Noise Figure Measurement
accuracy
≤ 0.25dB
6. Rise/Fall time measurement
accuracy
≤ 10 ns
7. ATS Calibration &
Demonstration
a.) Vendor shall specify ATS calibration process.
b.) Individual equipments/instruments of ATS shall
be calibrated as per manufacturer guidelines.
c.) All other hardware of ATS shall be calibrated
using above (S. no. b) calibrated instruments.
d.) Using calibrated ATS, parameters (S. no. 1-6)
are to be demonstrated at time of ATP.
12. ATS should have software requirements as given in Annexure-IV.
13. ATS should have capability for day to day automatic calibration.
14. ATS Supply voltage: 230 V AC, single phase, 50 Hz (nominal).
15.Vendor has to work out data backup plan on separate machine
which should have capacity more than 4 TB. Automatic data transfer
after each test set is required. It should have feature of viewing test
report from backup machine.
16. UPS supplied along with ATS should have at least twice the backup
time to that of TRM measurement (~100 minutes). UPS should have at
least 1.5 times output power rating required for ATS.
17.Modifications in the specifications and test plan, if any, will be intimated
at the time of PDR.
4
2.0 Preliminary Design Review
Vendor shall conduct a Preliminary Design Review (PDR) approximately
6 weeks after confirmation of order. PDR will consist of
design/configuration (block diagram) of ATS including thermal aspects.
Acceptance Test Plan (ATP) shall be prepared by vendor in
consultation with SAC. End item Data product (EIDP) will be given by
SAC at the time of PDR.
3.0 Factory Acceptance Testing (FAT)
Upon completion of the ATS development, vendor shall demonstrate
the compliance of functional requirements and measurement
accuracy/ precision specifications as per mutually agreed
Acceptance Test Plan (ATP) including software.
SAC Engineer(s)/ISRO representative may witness the Pre-shipment
Clearance Testing at manufacturer’s premises. Shipment clearance will
be given after successful completion of FAT.
4.0 Site Acceptance Test (SAT)
Vendor is responsible for installation and commissioning of the TR
Module – Automated Test System (ATS) at SAC, Ahmedabad or at a
place in India, as suggested by SAC. Upon completion of the
installation and commissioning of ATS at site, vendor shall demonstrate
the compliance of functional requirements and measurement
accuracy/ precision specifications as mentioned in ATP. SAC
Engineer(s) shall be witnessing the acceptance testing at the time of
ATP. The ATS will be accepted after the successful completion of the
ATP cleared by SAC/ISRO Committee.
5.0 Training
System Operation Training
Once the system is installed and operational, a 3-day training shall be
held. System Engineer familiar with the hardware, software and test
methodologies shall conduct this training. The training shall focus on
familiarization with the instrumentation, test methodologies,
programming and operational usage of the ATS.
6.0 On Site Application Support
Vendor shall provide application support for 3 and 5 years after
acceptance of the system. System Engineer familiar with the hardware,
software and test methodologies used shall be available to deliver this
support. This support shall immediately follow the system installation and
training.
5
In case of any failure in ATS, vendor shall respond to SAC within 48 hrs
with respect to request by SAC. After that vendor has to correct the fault
within 96 hours.
7.0 Warranty, Support and Calibration
ATS shall have 3 and 5 years of warranty. If 5 years warranty is not
available as standard, vendor shall quote for standard warranty plus
chargeable warranty for remaining term.
If equipments are to be sent for calibration/repair, pickup and delivery
from site of installation shall be done by vendor only.
8.0 Payment terms & conditions along with delivery schedule
Payment terms : Vendor shall specify payment terms and conditions.
Delivery Schedule :
Table-2 Delivery Schedule
Preliminary Design Review (PDR) 6 Weeks after confirmation of
order by vendor
Factory Acceptance Testing (FAT)
30 weeks after confirmation of
order by vendor
Site Acceptance Testing (SAT)
34 weeks after confirmation of
order by vendor
Note: SAC will provide DUTs 15 weeks after confirmation of order by
vendor, for all the test cases as defined in section 11.0.
9.0 Documentation
For ATS, vendor shall produce custom system documentation and
compile it into a System Reference Manual. This shall include
Operating manual for the ATS.
Comprehensive Service manual for maintaining the complete
system
ATS Calibration data and procedure.
Custom System Reference Documentation shall include rack layout,
system interconnect diagrams, serialized instrument/equipment and
other hardware list, custom cable pin out tables, and certificates as
applicable. The documents shall be supplied in electronic form.
6
10.0 Guideline to vendors
1. The vendor shall examine the whole RFP thoroughly and offer point
by point compliance matrix indicating clearly the
parameter/specification in tabular format for their offer. In case of
non-compliance, the deviation from the specified parameter shall
be furnished.
2. Vendor must submit the quotation of ATS in slabs of 1, 2-3 ,4-5, 6 &
above.
3. Vendor must quote for all the cases as mentioned in section 11.0 of
this RFP. All the test cases are necessary for offer consideration.
4. Vendor shall quote in two parts :
Part 1: Technical offer along with masked price-bid
Part 2: Commercial offer
5. Vendor can attach additional information if any, which may
provide more information on ATS.
6. The delivery schedule shall be presented in a bar chart form
showing sequence and time of all important activities e.g. ATS
development, testing etc. including design reviews etc.
7
11.0 Signal details of ATS and DUT:
Case-1: One TR module with its power supply is defined as one DUT. ATS
shall be controlling the DUT (as per signals given in Table 3).
Figure-1
Table-3 ATS TRM Interface
Sl.
No. Signal name Source Destination Type Remarks
1. Phase control 0 ATS TR Module TTL ,200uA max.
Signals for
controlling
phase of
TR Module
2. Phase control 1 ATS TR Module TTL,200uA max.
3. Phase control 2 ATS TR Module TTL,200uA max.
4. Phase control 3 ATS TR Module TTL,200uA max.
5. Phase control 4 ATS TR Module TTL,200uA max.
6. Phase control 5 ATS TR Module TTL,200uA max.
7. Phase Control GND ATS TR Module GND
8. Gain control 0 ATS TR Module TTL ,200uA max.
Signals for
controlling
gain of TR
Module
9. Gain control 1 ATS TR Module TTL,200uA max.
10. Gain control 2 ATS TR Module TTL,200uA max.
11. Gain control 3 ATS TR Module TTL,200uA max.
12. Gain control 4 ATS TR Module TTL,200uA max.
13. Gain control 5 ATS TR Module TTL,200uA max.
14. Gain Control GND ATS TR Module GND
15. Protection switch control ATS TR Module TTL,200uA max.
16. Protection switch control
GND ATS TR Module GND
17. Tx/Rx Switch Control ATS TR Module TTL,2mA max.
18. Tx/Rx Switch Control GND ATS TR Module GND
19. Temp. sensor point TR
Module ATS
Voltage o/p
(@1150 mV typ.)
To read
temp. of
TR Module
20. Temp. sensor point TR
Module ATS GND
21. TC –ON CMD LIVE ATS POWER 4.5V±0.5V / 4 mA 100±10 mS
TR Module
POWER SUPPLY
ATS
8
Table-3 ATS TRM Interface
Sl.
No. Signal name Source Destination Type Remarks
SUPPLY
22. TC –OFF CMD LIVE ATS POWER
SUPPLY
4.5V±0.5V / 4 mA
100±10 mS
23. TC –ON CMD RTN ATS POWER
SUPPLY GND
24. TC –OFF CMD RTN ATS POWER
SUPPLY GND
25. 70V RAW BUS LIVE ATS POWER
SUPPLY
DC line (62-74V),
70 V (nominal)
Raw Bus
DC Line ,
200 mA
current
@70 V
26. 70V RAW BUS RTN ATS POWER
SUPPLY DC RTN
27. CHASSIS GND ATS POWER
SUPPLY GND
28. PULSE CONTROL-1 ATS POWER
SUPPLY 4.2V0.5V/ 2 mA 8.2%, Tx
29. PULSE CONTROL-2 ATS POWER
SUPPLY 4.2V0.5V/2 mA 65%, Rx
30. PULSE CONTROL GND ATS POWER
SUPPLY GND
31. POWER SUPPLY CLOCK /
SYNC LIVE ATS
POWER
SUPPLY
4.5V ± 0.5V / 2
mA
195 ± 5 KHz
,10 % duty
cycle,
32. POWER SUPPLY CLOCK /
SYNC GND ATS
POWER
SUPPLY GND
35. TM ON STATUS LIVE POWER
SUPPLY ATS 5V±0.5V
36. TM OFF STATUS LIVE POWER
SUPPLY ATS 0V
37. STATUS GND POWER
SUPPLY ATS GND
9
Case-2: Eight TR modules with four TR controller (TRC) & four power
supplies shall be tested by ATS (as per signals given in Table
4).
Figure-2
Sl. no.
1 to 9
Sl. no.
1 to 9
Sl. no.
1 to 9
ATS
TR Module-1
TR Module-2
TRC 1 POWER
SUPPLY 1
TR Module-3
TR Module-4
TRC 2 POWER
SUPPLY 2
TR Module-5
TR Module-6
TRC 3 POWER
SUPPLY 3
TR Module-7
TR Module-8
TRC 4 POWER
SUPPLY 4
10
Table-4 ATS and TRC Input Interface Sl.
No. Signal name Source
Destinati
on Type
Connection
Topology Remarks
1 Serial_Data ATS TRC RS-422
Level
Daisy Chain
(Single
channel I/P)
Configurable Baud
rate (Typically
10172)
2 Tx_Pre_Sel ATS TRC RS-422
Level
Active Low
Daisy Chain
(Single
channel I/P)
Configurable freq.
and ON/OFF time
(Typically 48 to
58us @ 2000Hz to
5000Hz)
3 Tx_Pulse ATS TRC RS-422
Level
Active High
Daisy Chain
(Single
channel I/P)
Configurable freq.
and ON/OFF time
(Typically 12 to 22
us @ 2000Hz to
5000Hz)
4 Data_Window ATS TRC RS-422
Level
Active High
Daisy Chain
(Single
channel I/P)
Configurable freq.
and ON/OFF time
(Typically 50 to 300
us @ 2000Hz to
5000Hz)
5 Tx_Beam_Hop ATS TRC RS-422
Level
Active Low
Daisy Chain
(Single
channel I/P)
Configurable freq.
and ON/OFF time
(Typically 48 to
58us @ 2000Hz to
5000Hz)
6 Tx_Beam_Init ATS TRC RS-422
Level
Active Low
Daisy Chain
(Single
channel I/P)
Configurable freq.
and ON/OFF time
(Typically 48 to
58us @ 2000Hz to
5000Hz)
7 TRC_Reset ATS TRC RS-422
Level
Daisy Chain
(Single
A min of 1us active
pulse
11
Table-4 ATS and TRC Input Interface Sl.
No. Signal name Source
Destinati
on Type
Connection
Topology Remarks
Active Low channel I/P)
8 TRC_Clock ATS TRC RS-422
Level
Daisy Chain
(Single
channel I/P)
Configurable freq.
with 50% duty
cycle (Typically
3.90625 MHz with
+/-3% stability)
9 Serial_Data_RS
485
TRC ATS RS-485
Level
Daisy Chain
(Single
channel O/P)
Variable Baud rate
(Typically 10172)
10 Monitor_Enable ATS TRC CMOS , 8
lines
Parallel 8
Lines
High/Low Level
Signal
11 PS_Control_Tx TRC ATS CMOS , 8
lines
Parallel 8
Lines
Pulse width
Measurement and
offset
measurement w.r.t.
TX_Pre_Sel signal
12 PS_Control_Rx TRC ATS CMOS , 8
lines
Parallel 8
Lines
Pulse width
Measurement and
offset
measurement w.r.t.
TX_Pre_Sel signal
13 TC –ON CMD
LIVE ATS
POWER
SUPPLY
TTL pulse,
Active
High, 8 lines
50ms duration
14 TC –OFF CMD
LIVE ATS
POWER
SUPPLY
TTL pulse,
Active
High, 8 lines
50ms duration
17 TC –ON CMD
RTN ATS
POWER
SUPPLY GND,1 lines
18 TC –OFF CMD
RTN ATS
POWER
SUPPLY GND, 1 line
19 70V RAW BUS
LIVE ATS
POWER
SUPPLY
DC line (62-
74V), 70 V
(nominal)
Raw Bus DC Line ,
600 mA current
@70 V
12
Table-4 ATS and TRC Input Interface Sl.
No. Signal name Source
Destinati
on Type
Connection
Topology Remarks
1live + 1Rtn
20 70V RAW BUS
RTN ATS
POWER
SUPPLY DC RTN
21 CHASSIS GND ATS POWER
SUPPLY GND
22 CHASSIS GND ATS POWER
SUPPLY GND
13
Case-3: Transmit Receive Controller (TRC) & power supply is defined
as one DUT. ATS shall be controlling the DUT (by generating
stimulus as per Table 4) and capturing the digital output
signals of TRC (as per signals given in Table 5).
Figure-3
Table-5 ATS TRC output Interface Sr.
No. Signal Name Source Destination
No of
Lines
Interface
Type (5V)
Remarks
1 Phase_H
TRC ATS 6
CMOS 6 bit parallel level signals, Level measurements
2 Phase_V
TRC ATS 6
CMOS 6 bit parallel level signals, Level measurements
3 Attenuation_H
TRC ATS 6
CMOS 6 bit parallel level signals, Level measurements
4 Attenuation_V
TRC ATS 6
CMOS 6 bit parallel level signals, Level measurements
5
PSControl_Tx TRC
ATS
2
CMOS Pulse width Measurement and offset measurement w.r.t. TX_Pre_Sel signal
6
PSControl_Rx TRC
ATS
2
CMOS Pulse width Measurement and offset measurement w.r.t. TX_Pre_Sel signal
7 Tx_Rx_Sw_Control TRC ATS 2 CMOS Pulse Width Measurement
8 Prot_Sw_Control TRC ATS 2 CMOS Pulse Width Measurement
POWER
SUPPLY
TRC
ATS
14
12.0 RF Signal details of TRModule :
Table-6
Signal Signal
Type &
No. of
lines
Level Pulse width PRF
Tx Input /
Rx Output
5350 125
MHz
pulsed RF
-10dBm /-5dBm 10 us-20 us
Transmit RF
pulse width;
pre and post
trigger : 1us
for each
2000 Hz-
5000 Hz
Rx Input /
Tx Output
5350 125
MHz
pulsed RF
-60dBm /40dBm 50-300 us
pulse width
for Rx
CAL Input /
CAL Output
5350 125
MHz
pulsed RF
-40dBm / +20dBm 10 us-20 us
Transmit RF
pulse width;
pre and post
trigger : 1us
for each
15
13.0 Timing diagram:
Figure-4
Tx RF pulse
Figure-5 Beam Hop, Beam Initiate wrt. Tx RF pulse
Tx-1 Tx-2 Tx-3 Tx-N Tx-N+1 Tx-N+2 Tx-N+3 Tx-2N Tx-2N+1 Tx-2N+2 Tx-2N+3 Tx-3N Tx-8N Tx-8N+1 Tx-8N+2
Beam Hop 1 Beam Hop 2 Beam Hop 3 Beam Hop 8
Beam Init 1 Beam Init 2
Tx-Pre -Select
(Ref. Signal)
Rx Supply Window
Tx/Rx control
loading Rx
Loading
18sec
Tx
Loading Tx
Loading
18sec 18sec
1sec
PRF-1 PRF-2
1sec
Tx Supply Pulse
Beam Initiate
Beam Hop
12s -
22s 12s –
22s
10s –
20s Tx RF Pulse
Rx Data Window Data Window
1sec
48 s –
58s
1sec
10s –
20s
1sec
1sec
sec
1sec
50 s –300s
1sec
16
ANNEXURE-I TR MODULE SPECIFICATIONS
17
Table-7
Electrical Specifications of 5350 125MHz TR Module(DUT)
Parameter Specification
Frequency f0 5350 MHz
Bandwidth f0 125MHz
Tx/Rx switching time 8000 ns max.
Tx i/p return Loss 13dB average
Rx i/p return Loss 13dB average
Phase Control Digital - 5.625 step / 360 range
RMS Phase setability error (Tx& Rx) 5
RMS Gain variation with phase
Control (Tx& Rx)
0.5 dB
Gain Control Digital - 0.5dB step/31.5 dB range
RMS Gain setability error (Tx& Rx) 0.5 dB
RMS phase variation with gain
Control (Tx& Rx)
5
Digital Attenuator’s switching time 250 ns typ.
Coupling @ CAL Port 20 dB nom.
Coupling flatness ±0.5 dB typ.
CAL port Return Loss 13 dB min.
Operating temp range -10 °C to +60 °C
Transmit path Characteristics
Peak output RF Power +40 dBm min. @ -10 dBm i/p
Transmit pulse characteristics Pulse Duration: 10 us - 20 us
PRF: 2000 Hz -5000 Hz
Tx Pulse Rise Time
(with 1 µs pre-Trigger)
< 1 µs
Tx Pulse Fall Time < 1 µs
Tx o/p response vs. Freq @-10 dBm
i/p
± 0.75 dB
Phase response vs. frequency
RMS Phase Error w.r.t. Linear Phase
5°
Receive path Characteristics
Noise Figure 3.5 dB nom.
Rx Path gain @ 0 dB DA Setting 38 dB min.
Gain response vs. frequency ± 1 dB max.
Phase response vs. frequency
(RMS Phase Error w.r.t .Linear Phase
fit)
5° max.
Rx Path P1dB -5dBm min.
Max. Input power handling
capability
Should survive 12 W RF power
having 20 s pulse width and 7%
duty cycle.
Rx. Prot. Switch Isolation 35 dB typ.
18
ANNEXURE-II
TEST PLAN
19
Test Plan for Case 1:Following tests are required on individual TR Modules
to ascertain their performance:
2.1.0 Tx/Rx Switch Characterization
a. Rise Time & Fall Time
Tx/Rx Switch control is pulsed at few kHz rate and Rise & Fall times are
measured by recording detected Rx output.
Input Level Rx input: -40 dBm @ 5350 MHz
Tx/Rx Mode Pulsed
Protection OFF (Continuous)
Phase control 0 deg setting
Attenuator Control 0 dB setting
b. Isolation
With the measurement conditions as in measurement 2.1.0a, difference
between the Protection ON & OFF states gives the Isolation of Protection
Switch. This needs to be measured on VNA.
2.2.0 S-parameters of Tx Path & CAL path
Input Level Tx input: -10 dBm
Tx/Rx Mode Tx
Protection ON (Continuous)
Phase control 0 deg setting
Attenuator Control 0 dB setting
On a pulsed VNA, Pulsed Sij parameters of Tx path with above conditions
are recorded over 250 MHz bandwidth around 5350 MHz with 25 MHz
steps. Data is analyzed to calculate:
Tx Path Gain Response
Tx Path Phase response
Tx Path i/p return Loss
Simultaneously, Tx–CAL path S-parameters can be recorded using multi-
port VNA to calculate:
CAL port Return Loss
CAL path coupling & response
20
2.3.0 Tx Output Characterization
a. Flatness, Peak Output, Rise/Fall times & Droop
Tx path input -10dBm @ 5350MHz
Tx/Rx Mode Tx
Protection ON (Continuous)
Phase control 0 deg setting
Attenuator Control 0 dB setting
Output is to be observed on a Peak Power Meter and the following are to
be recorded
Rise &Fall times,
Power Droop
Peak Power
Pulse profile plot
The above measurements are required over 250 MHz bandwidth centered
around 5350 MHz in 25 MHz steps.
b. P1dB Measurement
Peak Power is to be recorded.
Tx/Rx Mode Tx
Protection ON (Continuous)
Phase control 0 deg setting
Attenuator Control 0 dB setting
The above measurements are required over power levels of -20dBm to -5
dBm in 1 dB steps and at 7 points around 5350 MHz .
2.4.0 Tx Path Characterization Data
a. Tx Path Phase Control Characterization
At a given frequency, Phase shifter is varied through all the 64 states and
both "Phase & Magnitude" for all the pulsed S-parameters need to be
recorded. S21 data is to be analyzed to estimate RMS Phase setability Error
& RMS A/. The above measurement is required over the bandwidth of
250 MHz around 5350 MHz in steps of 25 MHz.
Input Level -10 dBm
Tx/Rx Mode Tx
Protection ON
21
From the above measured S parameter data following are to be
calculated:
RMS Phase Setability Error (Tx Path)
RMS Gain variation with Phase control ( Tx Path)
b. Tx Path Gain Control Characterization
At a given frequency, attenuator is varied through all the 64 states and
both "Phase & Magnitude" for all the pulsed S-parameters need to be
recorded. S21 data is to be analyzed to estimate RMS Gain setability Error
& RMS /A. The above measurement is required over the bandwidth of
250 MHz around 5350 MHz in steps of 25 MHz.
Input Level -10 dBm
Tx/Rx Mode Tx
Protection ON
From the above data following parameters are to be calculated:
RMS Gain Setability Error (Tx Path)
RMS Phase variation with Gain control ( Tx Path)
2.5.0 Digital Attenuator & Phase shifter Response Time
MSB of Digital attenuator is to be pulsed while monitoring Rx output for
calculating delay in change of attenuation state. Similarly, MSB of Digital
Phase Shifter is pulsed while monitoring Rx output for calculating delay in
change of phase state.
Input Level Rx input: -40dBm
Tx/Rx Mode Rx (continuous)
Protection OFF (continuous)
Attenuator/Phase Control MSB of either DA or DPS is pulsed at
a time with other bits at logic low.
2.6.0 Rx Protection Switch Characterization
a. Rise /Fall times
Rx Protection Switch control is pulsed at a few KHz and Rise & Fall times
are measured by recording Rx output.
22
Input Level Rx input: -60 dBm @ 5350 MHz
Tx/Rx Mode Rx
Protection Pulsed
Phase control 0 deg setting
Attenuator Control 0 dB setting
b. Isolation
With the measurement conditions as in measurement 2.7.0a, difference
between the IL of receive chain Protection ON & OFF states gives the
Isolation of Switch. This needs to be measured on VNA.
2.7.0 Rx path P1dB Measurement
This measurement is required at 7 points around 5350 MHz .
Input Level Input power is swept from -60 dBm to
-45 dBm
Tx/Rx Mode Rx
Protection OFF (Continuous)
Phase control 0 deg setting
Attenuator Control 0 dB setting
2.8.0 Noise Figure Measurement
Receiver noise figure under pulsed and CW condition is to be measured.
Tx/Rx Mode Rx
Protection OFF (Continuous)
Phase control 0 deg setting
Attenuator Control 0 dB setting
2.9.0 Rx path Spurious Measurement
Out of band Spurious search upto 18GHz.
Input Level Rx input: -60 dBm at 5225, 5350 &
5475 MHz
Tx/Rx Mode Rx
Protection OFF (Continuous)
Phase control 0 deg setting
Attenuator Control 0 dB setting
23
2.10.0 Rx Path Characterization Data
a. Rx Path Phase Control Characterization
At a given frequency, Phase shifter is varied through all the 64 states and
both "Phase & Magnitude" for all the pulsed S-parameters need to be
recorded. S21 data is to be analyzed to estimate RMS Phase setability Error
& RMS A/. The above measurement is required over the bandwidth of
250 MHz around 5350 MHz in steps of 25 MHz.
Input Level -60dBm
Tx/Rx Mode Rx
Protection ON
From the above data following parameters are to be calculated:
RMS Phase Setability Error (Rx Path)
RMS Gain variation with Phase control ( Rx Path)
b. Rx Path Gain Control Characterization
At a given frequency, attenuator is varied through all the 64 states and
both "Phase & Magnitude" for all the pulsed S-parameters need to be
recorded. S21 data is to be analyzed to estimate RMS Phase setability Error
& RMS /A. The above measurement is required over the bandwidth of
250 MHz around 5350 MHz in steps of 25 MHz.
Input Level -60dBm
Tx/Rx Mode Rx
Protection ON
From the above data following parameters are to be calculated
RMS Gain Setability Error (Rx Path)
RMS Phase variation with Gain control ( Rx Path)
24
2.11.0 S-parameters of Rx path
Input Level Rx input: -60 dBm
Tx/Rx Mode Rx
Protection ON (Continuous)
Phase control 0 deg setting
Attenuator Control 0 dB setting
On a pulsed VNA, Pulsed Sij parameters of Tx path with above conditions
are recorded over 250 MHz bandwidth around 5350 MHz with 25 MHz
steps. Data is analyzed to calculate:
Rx Path Gain Response
Rx Path Phase response
Rx Path i/p return loss
25
Test Plan for Case 2: All the eight TRM either/both polarization are to be
powered on simultaneously/individually and RF performance of individual
TRMs are to be evaluated for possible degradation due to RF coupling &
thermal issues.
Following tests are required to ascertain performance of eight TR modules
with four TR controller (TRC) & four power supplies:
2.1.1 S-parameters of Tx Path & CAL path
Input Level Tx input: -10 dBm
Tx/Rx Mode Tx
Protection ON (Continuous)
Phase control 0 deg setting
Attenuator Control 0 dB setting
On a pulsed VNA, Pulsed Sij parameters of Tx path with above conditions
are recorded over 250 MHz bandwidth around 5350 MHz with 25 MHz
steps. Data is analyzed to calculate:
Tx Path Gain Response
Tx Path Phase response
Tx Path i/p return Loss
Simultaneously, Tx–CAL path S-parameters can be recorded using multi-
port VNA to calculate:
CAL port Return Loss
CAL path coupling & response
2.2.1 Tx Output Characterization
a. Flatness, Peak Output, Rise/Fall times & Droop
Tx path input -10dBm @ 5350MHz
Tx/Rx Mode Tx mode
Protection ON (Continuous)
Phase control 0 deg setting
Attenuator Control 0 dB setting
Output is to be observed on a Peak Power Meter and the following are to
be recorded
Rise &Fall times,
Power Droop
Peak Power
Pulse profile plot
26
The above measurements are required over 250 MHz bandwidth centered
around 5350 MHz in 25 MHz steps.
b. P1dB Measurement
Peak Power is to be recorded.
Tx/Rx Mode Tx
Protection ON (Continuous)
Phase control 0 deg setting
Attenuator Control 0 dB setting
The above measurements are required over power levels of -20dBm to -5
dBm in 1 dB steps and at 7 points around 5350 MHz .
2.3.1 Tx Path Characterization Data
a. Tx Path Phase Control Characterization
At a given frequency, Phase shifter is varied through all the 64 states and
both "Phase & Magnitude" for all the pulsed S-parameters need to be
recorded. S21 data is to be analyzed to estimate RMS Phase setability Error
& RMS A/. The above measurement is required over the bandwidth of
250 MHz around 5350 MHz in steps of 25 MHz.
Input Level -10 dBm
Tx/Rx Mode Tx
Protection ON
From the above measured S parameter data following are to be
calculated:
RMS Phase Setability Error (Tx Path)
RMS Gain variation with Phase control ( Tx Path)
b. Tx Path Gain Control Characterization
At a given frequency, attenuator is varied through all the 64 states and
both "Phase & Magnitude" for all the pulsed S-parameters need to be
recorded. S21 data is to be analyzed to estimate RMS Gain setability Error
& RMS /A. The above measurement is required over the bandwidth of
250 MHz around 5350 MHz in steps of 25 MHz.
27
Input Level -10 dBm
Tx/Rx Mode Tx
Protection ON
From the above data following parameters are to be calculated:
RMS Gain Setability Error (Tx Path)
RMS Phase variation with Gain control ( Tx Path)
2.4.1 Rx path P1dB Measurement
This measurement is required at 7 points around 5350 MHz .
Input Level Input power is swept from -60 dBm to
-45 dBm
Tx/Rx Mode Rx
Protection OFF (Continuous)
Phase control 0 deg setting
Attenuator Control 0 dB setting
2.5.1 Noise Figure Measurement
Receiver noise figure under pulsed and CW condition is to be measured.
Tx/Rx Mode Rx
Protection OFF (Continuous)
Phase control 0 deg setting
Attenuator Control 0 dB setting
2.6.1 Rx path Spurious Measurement
Out of band Spurious search upto 18GHz.
Input Level Rx input: -60 dBm at 5225, 5350 &
5475 MHz
Tx/Rx Mode Rx
Protection OFF (Continuous)
Phase control 0 deg setting
Attenuator Control 0 dB setting
28
2.7.1 Rx Path Characterization Data
a. Rx Path Phase Control Characterization
At a given frequency, Phase shifter is varied through all the 64 states and
both "Phase & Magnitude" for all the pulsed S-parameters need to be
recorded. S21 data is to be analyzed to estimate RMS Phase setability Error
& RMS A/. The above measurement is required over the bandwidth of
250 MHz around 5350 MHz in steps of 25 MHz.
Input Level -60dBm
Tx/Rx Mode Rx
Protection ON
From the above data following parameters are to be calculated:
RMS Phase Setability Error (Rx Path)
RMS Gain variation with Phase control ( Rx Path)
b. Rx Path Gain Control Characterization
At a given frequency, attenuator is varied through all the 64 states and
both "Phase & Magnitude" for all the pulsed S-parameters need to be
recorded. S21 data is to be analyzed to estimate RMS Phase setability Error
& RMS /A. The above measurement is required over the bandwidth of
250 MHz around 5350 MHz in steps of 25 MHz.
Input Level -60dBm
Tx/Rx Mode Rx
Protection ON
From the above data following parameters are to be calculated
RMS Gain Setability Error (Rx Path)
RMS Phase variation with Gain control ( Rx Path)
29
2.8.1 S-parameters of Rx path
Input Level Rx input: -60 dBm
Tx/Rx Mode Rx
Protection ON (Continuous)
Phase control 0 deg setting
Attenuator Control 0 dB setting
On a pulsed VNA, Pulsed Sij parameters of Tx path with above conditions
are recorded over 250 MHz bandwidth around 5350 MHz with 25 MHz
steps. Data is analyzed to calculate:
Rx Path Gain Response
Rx Path Phase response
Rx Path i/p return loss
30
Test Plan for Case-3:
During Case-3, when TRC is being tested standalone, following tests are to be done-
1. Phase verification– The phase data loading has to be verified through following test cases. a) All data bits high b) All data bits low c) Alternate data bits high/low
2. Attenuation verification–
These data loading has to be verified through following test cases. d) All data bits high e) All data bits low f) Alternate data bits high/low
3. PSControl Verification TRC will generate PSControl_Tx and PSControl_Rx for each TR Module. There are total two TR Modules and hence two PSControl_Tx and two PSControl_Rx signals are to be captured and verified as per following test-cases- a) PSControl_Tx (1 to 2) sequentially b) PSControl_Rx (1 to 2) sequentially
4. Tx/Rx_Sw&Prot_SwVerification
TRC will generate Tx_Rx_Sw_control and Prot_Sw_control for each TR Module. There are total two TR Modules and hence two Tx_Rx_Sw_control and twoProt_Sw_control signals are to be captured and verified as per following test-cases- a) Tx_Rx_Sw_control (1 to 2) sequentially b) Prot_Sw_control (1 to 2) sequentially
31
Table-8
PARAMETER VERIFICATION MATRIX for TRMODULE Units
Test
Co
mp
lete
TR M
od
ule
Te
st p
lan
NF o
f R
x p
ath
P1d
B o
f Tx
Pa
th
Ch
ara
cte
riza
tio
n
Da
ta
Vo
lta
ge
& C
urr
en
t
TR M
od
ule
Tem
pe
ratu
re
Vis
ua
l In
spe
ctio
n
Initial bench test √ √ √
Burn-in Test √ √
Post Burn-in test √ √ √
Post Random
Vibration
√
Temp.
Operational test √
√ √ √
Temp.
Operational test
(verification)
√ √ √
Thermo-Vacuum* √ √ √
EMI / EMC √ √ √ √
Final functional
test √
√ √
Note : √ denotes “Test is applicable”
* The ATS shall have capability to monitor and log the Voltage, Current,
output power of Tx and Rx path during temperature transitions.
32
ANNEXURE-III Interface command structure for Case-2 &3
33
ATS to TRC SERIAL Interface Protocol
Serial Communication between ATS to TRC is as per following details: ATS to TRC: RS422 level (Serial_data) TRC to ATS: RS485 level (TM_RS485) Baud rate: Configurable, default 10172, No Parity, 8 Data bits, 1 Start bit (low) and 1 Stop Bit (high). Typical Protocol:
ATS sends Command to TRC for start configuration.
Package of variable length (i.e. 4 byte + data) over serial link. Wait for acknowledgment.
Acknowledgement from TRC will be sent through RS485 line output
If no response received from TRC in 200 milliseconds (max data length 127 bytes at 10172 baud rate) then there is error in communication. This is worst-case time in which channel communication will break.
Command Format:
Table-9
Sr. No.
No of Byte
Command Description Value Range
1 1 Id Id address of TRC (MSB=1)
81-88, 8F for broadcast mode
2 1 Command Command number* 1-Tile Address 2-Operation Mode 3-CAL Mode 4-Config Data Mode 5-debug Mode 6-Self ID Change 7-TSG Parameter 8-Telemetry
1-8
3 1 Data Length Data Length 0-7F (127)
4 (0-127) Variable
DATA Bytes 7 bit Data. (Variable depending upon Command)
0-7F (127)
5 1 Checksum byte 7bit resultant of sum of Sr.No.2 -4
0-7F
* Command details along with command files will be provided at the time of PDR
34
Programming of EEPROM of TRC in-circuit through SERIAL commands ATS will program EEPROM of TRC in-circuit. Selection of monitor mode will be done through enabling the Monitor_Enable line for programming the EEPROM. Serial commands will be sent through serial_data interface and returned echo will be captured through Serial_data_RS485 line. Data collected through TRM characterization has to be processed and a LUT file will be created. This LUT file will be merged with program file to fuse the EEPROM. Serial command will consist of command word and data from file. After programming complete EEPROM, it will be readback through command and will be verified w.r.t. programmed file. Note: Modifications, if any, will be intimated at the time of PDR.
35
ANNEXURE-IV ATS Software Requirements
36
ATS Software shall have following requirements: 1. Documents:
a) Vendor should provide Software Requirement Specification (SRS), Software Design Document (SDD), User manualfor software and offer them for review.
2. Source Code and Installation Kit containing actual deliverable software
shall be provided.
3. Code walk-through is to be conducted by SAC team along with vendor at the time of ATP.
4. Software Audit to be conducted by SAC team before final delivery.
5. Software should have following quality attributes: (1) Security:
a. Login and password facility with user registration and password recovery mechanism.
b. All important configuration files and code files should be protected with separate administrative password.
c. Session time out facility. (2) Software should be maintainable which includes modification,
corrections, improvements or adaptation of the software to changes in environment. To achieve this modularity of software is compulsory.
(3) GUI of ATS shall have following features display, preferably:
User id and DUT, Instrument connectivity status, Input parameters entry, Test result and test condition selection, Test result status, Test completion time and error message display.
1
RFP OF
Automated Test System for X-Band TR Modules
(ATS/TRM)
2
TR Module-Automated Test System
(TR Module-ATS)
1.0 SCOPE OF WORK
Building, integrating (both hardware and software segments) and
supplying an integrated TR Module – Automated Test System (ATS),
meeting the following requirements:
1. Shall be able to Test 8 TRMs sequentially at a time as per the TR Module
specifications and test plan given in Annexure-I &II respectively. It shall
be possible to Test & characterize even if 1 TRM is present.
2. Shall provide all the external interfaces needed by all the DUTs and
control the DUTs. Shall be able to power all or any one of the DUTs
selectively. However, measurements can be sequential.
3. Shall be able to test TR Block Controller (TRBC) outputs which are
digital signals, as per test plan given in Annexure-II.
4. Shall be able to run through the complete test plan (Annexure-II)
without any further manual intervention, once the setup is made and
calibration is done.
5. RF hardware making ATS shall be chosen such that entire “TR Module
Test Plan (Annexure-II)", for each TR Module is executed within 50
minutes.
6. Both the transmit path & Receive path measurements are pulsed. ATS
shall be able to run through the "TR module test plan" under pulsed
condition with selectable PRF. However ATS should have a provision to
test Noise Figure in CW condition also.
7. ATS shall have capability to program EEPROM data in TRBC and to
validate programmed data, through serial data lines with one CMOS
monitor enable command.
8. The ATS software shall be implemented such that it is modular, easily
amenable to modifications/expansions without major change in the
"core" of the software.
9. ATS software shall be able to process the measured data and shall be
able to generate plots, export the data to Microsoft Excel
spreadsheets or any spreadsheet software, e.g. open-office & PDF
format with all the necessary annotations.
10. Proper naming convention and alphanumeric id (having 3 digits TRM
identification) for unit under test is to be defined to identify test results
and reports.
3
11. ATS Specifications: ATS specifications for measurement of 9600 ± 300 MHz TRM
( however, ATS should have bandwidth selection up to +/- 400 MHz) up to
third harmonic (30 GHz) at standard lab conditions (23 ± 3 ⁰C, 55 ± 5 %
Relative humidity):
Table-1
Sl. No. Measurement ATS Specifications
1. Frequency 0.5 GHz to 30 GHz
2. Peak power handling 42dBm max. , 25 % duty max.
3. Pulsed S-parameter
measurement accuracy
< 5 deg –phase
< 0.5dB – Magnitude
4. Peak power measurement
accuracy
≤ 0.3 dB
5. Noise Figure Measurement
accuracy
≤ 0.25dB
6. Rise/Fall time measurement
accuracy
≤ 10 ns
7. ATS Calibration &
Demonstration
a.) Vendor shall specify ATS calibration process.
b.) Individual equipments/instruments of ATS
shall be calibrated as per manufacturer
guidelines.
c.) All other hardware of ATS shall be calibrated
using above (S. no. b) calibrated instruments.
d.) Using calibrated ATS, parameters (S. no. 1-6)
are to be demonstrated at time of ATP.
12. ATS should have software requirements as given in Annexure-IV.
13. ATS should have capability for day to day automatic calibration.
14. ATS Supply voltage: 230 V AC, single phase, 50 Hz (nominal).
15. Vendor has to work out data backup plan on separate machine
which should have capacity more than 4 TB. Automatic data transfer
after each test set is required. It should have feature of viewing test
report from backup machine.
16. UPS supplied along with ATS should have at least twice the backup
time to that of TRM measurement (~100 minutes). UPS should have at
least 1.5 times output power rating required for ATS.
17. Modifications in the specifications and test plan, if any, will be
intimated at the time of PDR.
4
2.0 Preliminary Design Review
Vendor shall conduct a Preliminary Design Review (PDR)
approximately 6 weeks after confirmation of order. PDR will consist of
design/configuration (block diagram) of ATS including thermal
aspects. Acceptance Test Plan (ATP) shall be prepared by vendor in
consultation with SAC. End item Data product (EIDP) will be given by
SAC at the time of PDR.
3.0 Factory Acceptance Testing (FAT)
Upon completion of the ATS development, vendor shall demonstrate
the compliance of functional requirements and measurement
accuracy/ precision specifications as per mutually agreed
Acceptance Test Plan (ATP) including software.
SAC Engineer(s)/ISRO representative may witness the Pre-shipment
Clearance Testing at manufacturer’s premises. Shipment clearance
will be given after successful completion of FAT.
4.0 Site Acceptance Test (SAT)
Vendor is responsible for installation and commissioning of the TR
Module – Automated Test System (ATS) at SAC, Ahmedabad or at a
place in India, as suggested by SAC. Upon completion of the
installation and commissioning of ATS at site, vendor shall demonstrate
the compliance of functional requirements and measurement
accuracy/ precision specifications as mentioned in ATP. SAC
Engineer(s) shall be witnessing the acceptance testing at the time of
ATP. The ATS will be accepted after the successful completion of the
ATP cleared by SAC/ISRO Committee.
5.0 Training
System Operation Training
Once the system is installed and operational, a 3-day training shall be
held. System Engineer familiar with the hardware, software and test
methodologies shall conduct this training. The training shall focus on
familiarization with the instrumentation, test methodologies,
programming and operational usage of the ATS.
6.0 On Site Application Support
Vendor shall provide application support for 3 and 5 years after
acceptance of the system. System Engineer familiar with the hardware,
software and test methodologies used shall be available to deliver this
support. This support shall immediately follow the system installation
and training.
5
In case of any failure in ATS, vendor shall respond to SAC within 48 hrs
with respect to request by SAC. After that vendor has to correct the
fault within 96 hours.
7.0 Warranty, Support and Calibration
ATS shall have 3 and 5 years of warranty. If 5 years warranty is not
available as standard, vendor shall quote for standard warranty plus
chargeable warranty for remaining term.
If equipments are to be sent for calibration/repair, pickup and
delivery from site of installation shall be done by vendor only.
8.0 Payment terms & conditions along with delivery schedule
Payment terms: Vendor shall specify payment terms and conditions.
Delivery Schedule:
Table-2 Delivery Schedule
Preliminary Design Review (PDR) 6 Weeks after confirmation of
order by vendor
Factory Acceptance Testing (FAT)
30 weeks after confirmation of
order by vendor
Site Acceptance Testing (SAT)
34 weeks after confirmation of
order by vendor
Note: SAC will provide DUTs 15 weeks after confirmation of order by
vendor, for all the test cases as defined in section 11.0.
9.0 Documentation
For ATS, vendor shall produce custom system documentation and
compile it into a System Reference Manual. This shall include
Operating manual for the ATS.
Comprehensive Service manual for maintaining the complete
system
ATS Calibration data and procedure.
Custom System Reference Documentation shall include rack layout,
system interconnect diagrams, serialized instrument/equipment and
other hardware list, custom cable pin out tables, and certificates as
applicable. The documents shall be supplied in electronic form.
6
10.0 Guideline to vendors
1. The vendor shall examine the whole RFP thoroughly and offer
point by point compliance matrix indicating clearly the
parameter/specification in tabular format for their offer. In case of
non-compliance, the deviation from the specified parameter shall
be furnished.
2. Vendor must submit the quotation of ATS in slabs of 1, 2-3 ,4-5, 6 &
above.
3. Vendor must quote for all the cases as mentioned in section 11.0
of this RFP. All the test cases are necessary for offer consideration.
4. Vendor shall quote in two parts :
Part 1: Technical offer along with masked price-bid
Part 2: Commercial offer
5. Vendor can attach additional information if any, which may
provide more information on ATS.
6. The delivery schedule shall be presented in a bar chart form
showing sequence and time of all important activities e.g. ATS
development, testing etc. including design reviews etc.
7
11.0 Signal details of ATS and DUT:
Case-1: One TR module with its power supply is defined as one DUT. ATS
shall be controlling the DUT (as per signals given in Table 3).
Figure-1
Table-3 ATS TRM Interface
Sl.
No. Signal name Source Destination Type Remarks
1. Data ATS TR Module CMOS Serial
Interface for
configuring
DA and DPS
2. Clock ATS TR Module CMOS
3. Strobe ATS TR Module CMOS
4. LNA protection ATS TR Module CMOS Level Signal
5. TR Switch ATS TR Module CMOS Level Signal
6. Temperature read TR
Module ATS
Analog
(0-2.5V)
Voltage
output
7. PULSE CONTROL-1 ATS POWER
SUPPLY
CMOS, Active
High
(4.5±0.5V/
2mA)
22% Duty,
45µs max
pulse width,
PRF 5000-6500
Hz
8. PULSE CONTROL-2 ATS POWER
SUPPLY
CMOS, Active
High
(4.5±0.5V/2m
A)
60% Duty,
102µs max
pulse width,
PRF 5000-6500
Hz
9. PULSE CONTROL GND ATS POWER
SUPPLY GND
10. POWER SUPPLY CLOCK
/ SYNC LIVE ATS
POWER
SUPPLY
3.7-5 V/2mA
(Pulse
195 KHz ± 5
KHz , 10%
duty cycle
11. TRM BLOCK_PSU_ON ATS POWER
SUPPLY
3.7-5V/4mA
(Pulse)
1live + 1Rtn
100 ms,
active high
ON pulse to
TRM BLOCK
TR Module
POWER SUPPLY
ATS
8
Table-3 ATS TRM Interface
Sl.
No. Signal name Source Destination Type Remarks
PSU
12. TRM BLOCK_PSU_OFF ATS POWER
SUPPLY
3.7-5V/4mA
(Pulse)
1live + 1Rtn
100 ms,
active high
ON pulse to
TRM BLOCK
PSU
13.
DC SUPPLY ATS POWER
SUPPLY
DC line (62-
74V), 70 V
(nominal)
PSU Raw Bus
DC Lines
(0.5A@70V)
14. 70V RAW BUS RTN ATS POWER
SUPPLY DC RTN
9
Case-2: Eight TR modules with single Transmit Receive Block
Controller (TRBC) & power supply is defined as one DUT. ATS
shall be controlling the DUT (as per signals given in Table 4).
Figure-2
Table-4 ATS and TRBC Input Interface
Sl.
No. Signal name Source Destination Type Remarks
1 Serial_Data+ ATS TRBC RS422 Serial Command with configurable baud rate (default@10172) 2 Serial_Data- ATS TRBC RS422
3 TX_Pre_SEL+ ATS TRBC RS422 Active Low reference signal (32.5µs -57.5µs)
4 TX_Pre_SEL- ATS TRBC RS422
5 TX_Pulse+ ATS TRBC RS422 Active High Input Tx Pulse (22.5µs-47.5µs)
6 TX_Pulse- ATS TRBC RS422
7 Data _Win+ ATS TRBC RS422 Active High Input Rx pulse (40µs - 110µs )
8 Data_Win- ATS TRBC RS422
9 TX_Beam_Ini+ ATS TRBC RS422 Active Low signal (32.5µs -57.5µs)
10 TX_Beam_Ini- ATS TRBC RS422
11 TX_Beam_hop+ ATS TRBC RS422 Active Low signal (32.5µs -57.5µs)
12 TX_Beam_hop- ATS TRBC RS422
13 TR_Reset+ ATS TRBC RS422 Active Low Reset of 5µs
TR Module 1
TR Module 2
TR Module 3
TR Module 4
TR Module 5
TR Module 6
TR Module 7
TR Module 8
POWER
SUPPLY
TRBC
ATS
TRM BLOCK
10
Table-4 ATS and TRBC Input Interface
Sl.
No. Signal name Source Destination Type Remarks
14 TR_Reset- ATS TRBC RS422
15 TRC_Clock_ref+ ATS TRBC RS422 Configurable Clock frequency from 3-16 MHz (Default @3.90625 MHz), 50% duty, ±3% stability
16 TRC_Clock_ref- ATS TRBC RS422
17 TM_RS485+ TRBC ATS RS485 Serial Telemetry with variable baud rate (default@10172) 18 TM_RS485- TRBC ATS RS485
19 MONITOR_ENABLE ATS TRBC CMOS
0 = Normal Mode 1= EEPROM Programming Mode
20 MONITOR_TXD TRBC ATS CMOS
Command echo/ EEPROM readback (will be used during EEPROM programing)
21 CHASSIS GND ATS TRBC GND Ground reference 22 TRM BLOCK_PSU_ON ATS POWER
SUPPLY
3.7-5V/4mA (Pulse) 1live + 1Rtn
100 ms, active high ON pulse to TRM BLOCK PSU
23 TRM BLOCK_PSU_OFF ATS POWER
SUPPLY
3.7-5V/4mA (Pulse) 1live + 1Rtn
100 ms, active high ON pulse to TRM BLOCK PSU
24 TRIB_PSU_SYNC ATS TRIB_ PSU 3.7-5V/4mA (Pulse) 1live + 1Rtn
clock @ 195 KHz ± 5 KHz, 10% Duty Cycle
25 DC SUPPLY ATS POWER SUPPLY
DC line (62-74V), 70 V (nominal) 1live + 1Rtn
PSU Raw Bus DC Lines (1.2A@70V)
11
Case-3: Transmit Receive Block Controller (TRBC) & power supply is
defined as one DUT. ATS shall be controlling the DUT (by
generating stimulus as per Table 4) and capturing the digital
output signals of TRBC (as per signals given in Table 5).
Figure-3
Table-5 ATS TRBC output Interface Sr.
No. Signal Name Source Destination
No of
Lines
Interface
Type (5V)
Remarks
1
Data TRBC ATS
8 CMOS
18- bit Serial Data on each line (data sampling on rising edge of clock)
2 Clock TRBC ATS 8 CMOS Clock for data transfer
3 Strobe TRBC ATS 8 CMOS Strobe for data transfer
4
Pulse_Mod_Tx TRBC
ATS 8
CMOS Pulse width Measurement and offset measurement w.r.t. TX_Pre_Sel signal
5
Pulse_Mod_Rx TRBC
ATS 8
CMOS Pulse width Measurement and offset measurement w.r.t. TX_Pre_Sel signal
6 Tx_Rx_Sw_Control TRBC ATS 8 CMOS Pulse Width Measurement
7 Prot_Sw_Control TRBC ATS 8 CMOS Pulse Width Measurement
POWER
SUPPLY
TRBC
ATS
12
12.0 RF Signal details of TR Module :
Table-6
Signal Signal
Type &
No. of
lines
Level Pulse width PRF
Tx Input /
Rx Output
9600 300
MHz
pulsed RF
-10 dBm
(nominal)/-
5dBm (max)
20us – 45us
Transmit RF
pulse width;
pre and post
trigger : 2us
and 0.5 us
respectively
5000-6500
Hz Rx Input /
Tx Output
9600 300
MHz
pulsed RF
-50dBm (max)
/ 40 dBm
(nominal)
40uS - 110uS
pulse width
for Rx
CAL Output/
CAL input
9600 300
MHz
pulsed RF
20 dBm
(nominal) /
-30dBm (max)
20us – 45usRF
pulse width,
pre and post
trigger : 2us
and 0.5 us
respectively
13
13.0 Timing diagram:
Figure-4
Tx RF pulse
Figure-5 Beam Hop, Beam Initiate wrt. Tx RF pulse
Tx-1 Tx-2 Tx-3 Tx-N Tx-N+1 Tx-N+2 Tx-N+3 Tx-2N Tx-2N+1 Tx-2N+2 Tx-2N+3 Tx-3N Tx-8N Tx-8N+1 Tx-8N+2
Beam Hop 1 Beam Hop 2 Beam Hop 3 Beam Hop 8
Beam Init 1 Beam Init 2
PRF-1 PRF-2
0.5sec
Tx Supply Pulse
Tx-Pre -Select
(Ref. Signal)
Beam Initiate
Beam Hop
22.5s -
47.5s 22.5s –
47.5s
20s –
45s Tx RF Pulse
Rx Data Window Data Window
2sec
32.5 s –
57.5s
Rx Supply Window
1sec
20s –
45s
2sec
1sec
sec
1sec
40 s –110s
0.5sec
14
ANNEXURE-I TR MODULE SPECIFICATIONS
15
Table-7
Electrical Specifications of 9600 300MHz TR Module (DUT)
Parameter Specification
Overall Characteristics
Centre Frequency (fo) 9600 MHz
Maximum Bandwidth 600MHz
Coupling of CAL coupler 20dB
Coupling Flatness ±0.5 dB Typ.
Nominal Return loss at Tx i/p port 13 dB
Nominal Return loss at Rx i/p port 13 dB
Nominal Return loss at CAL port 13 dB
Operating temp range -10 °C to +60 °C
Transmit Path Characteristics
Nominal I/P power -10dBm
Peak O/P power 40dBm Min.
Transmit Pulse Characteristics Pulse Duration: 20us - 45us
PRF: 5000Hz – 6500 Hz
Transmit Pulse Rise and Fall Time ;
with Pre and post-trigger <250 ns
Tx gain response with frequency 1 dB Max.
Phase Control Specs
(Range, bits, step) Range 3600, 6bit DPS, Step 5.6250
Phase Settability Error <5.625⁰
Phase Response vs. frequency
RMS Phase Error w.r.t. Linear Phase 10⁰
RMS Gain variation with phase control 0.5 dB
Receive Path Characteristics
Noise Figure 4dB nom.
Gain @ 0dB attenuation 40dB min.
Rx Path P1dB 0 dBm min.
Rx gain response with frequency 1.5 dB Max.
Gain Control (Range, step) 30dB with 0.5dB step
RMS Gain Settability Error 0.5 dB
RMS Phase variation with gain control <5.625⁰
Phase Control Specs
(Range, bits, step) Range 3600, 6bit DPS, Step 5.6250
Phase Settability Error <5.625⁰
Maximum Input Power Handling Capability Should Survive 10W RF Power having 45µs
pulse width and 22% Duty Cycle
Rx Protection Switch Isolation 35 dB typ.
16
ANNEXURE-II
TEST PLAN
17
Transmit Receive Modules (TRM) have been housed along with Transmit
receive block controller (TRBC)and power supply for transmit receive and
cal path and have been called as Transmit Receive Block (TRM BLOCK).
Test Plan for Case 1:Following tests are required on individual TR Modules
to ascertain their performance:
2.1.0 Tx/Rx Switch Characterization
a. Rise Time & Fall Time
Tx/Rx Switch control is pulsed at few kHz rate and Rise & Fall times are
measured by recording detected Rx output.
Input Level Rx input: -60 dBm @ 9600 MHz
Tx/Rx Mode Pulsed
Protection OFF (Continuous)
Phase control 0 deg setting (DATA, CLK, STROBE)
Attenuator Control 0 dB setting (DATA, CLK, STROBE)
b. Isolation
With the measurement conditions as in measurement 2.1.0a, difference
between the Protection ON & OFF states gives the Isolation of Protection
Switch. This needs to be measured on VNA.
2.2.0 S-parameters of Tx Path & CAL path
Input Level Tx input: -10 dBm
Tx/Rx Mode Tx
Protection ON (Continuous)
Phase control 0 deg setting (DATA, CLK, STROBE)
Attenuator Control 0 dB setting (DATA, CLK, STROBE)
On a pulsed VNA, Pulsed Sij parameters of Tx path with above conditions
are recorded over 600 MHz bandwidth around 9600 MHz with 50 MHz
steps. Data is analyzed to calculate:
Tx Path Gain Response
Tx Path Phase response
Tx Path i/p & o/p return Loss
Simultaneously, Tx–CAL path S-parameters can be recorded using multi-
port VNA to calculate:
CAL port Return Loss
CAL path coupling & response
18
2.3.0 Tx Output Characterization
a. Flatness, Peak Output, Rise/Fall times & Droop
Tx path input -10 dBm @ 9600 MHz
Tx/Rx Mode Tx mode
Protection ON (Continuous)
Phase control 0 deg setting (DATA, CLK, STROBE)
Attenuator Control 0 dB setting (DATA, CLK, STROBE)
Output is to be observed on a Peak Power Meter and the following are to
be recorded
Rise &Fall times,
Power Droop
Peak Power
Pulse profile plot
The above measurements are required over 600 MHz bandwidth centered
around 9600 MHz in 50 MHz steps.
b. Tx Output Power Measurement
Tx/Rx Mode Tx
Protection ON (Continuous)
Phase control 0 deg setting (DATA, CLK, STROBE)
Attenuator Control 0 dB setting (DATA, CLK, STROBE)
The input power is to be varied by ± 2 dB around nominal input power in
steps of 1 dB and peak output power is to be recorded. The above
measurements are required at 7 points around 9600 MHz .
2.4.0 Tx Path Phase Control Characterization Data
Phase shifter is varied through all the 64 states and both "Phase &
Magnitude" for all the pulsed S-parameters need to be recorded. S21
data is to be analyzed to estimate RMS Phase setability Error & RMS A/
over the frequency band. The above measurement is required over at
least 13 frequency points over the bandwidth of 600 MHz around
9600MHz.
Input Level -10 dBm
Tx/Rx Mode Tx
Protection ON
19
From the above measured S parameter data following are to be
calculated:
RMS Phase Setability Error (Tx Path)
RMS Gain variation with Phase control ( Tx Path)
2.5.0 Digital Attenuator & Phase shifter Response Time
MSB of Digital attenuator is to be pulsed while monitoring Rx output for
calculating delay in change of attenuation state. Similarly, MSB of Digital
Phase Shifter is pulsed while monitoring Rx output for calculating delay in
change of phase state.
Input Level Rx input: -60dBm
Tx/Rx Mode Rx (continuous)
Protection OFF (continuous)
Attenuator/Phase Control MSB of either DA or DPS is pulsed at
a time with other bits at logic low.
2.6.0 Rx Protection Switch Characterization
a. Rise /Fall times
Rx Protection Switch control is pulsed at a few KHz and Rise & Fall times
are measured by recording Rx output.
Input Level Rx input: -60 dBm @ 9600 MHz
Tx/Rx Mode Rx
Protection Pulsed
Phase control 0 deg setting (DATA, CLK, STROBE)
Attenuator Control 0 dB setting (DATA, CLK, STROBE)
b. Isolation
With the measurement conditions as in measurement 2.6.0a, difference
between the IL of receive chain Protection ON & OFF states gives the
Isolation of Switch. This needs to be measured on VNA.
2.7.0 Rx path P1dB Measurement
This measurement is required at 7 points around 9600 MHz .
Input Level Input power is swept to measure 1
dB compression at output
Tx/Rx Mode Rx
Protection OFF (Continuous)
Phase control 0 deg setting (DATA, CLK, STROBE)
Attenuator Control 0 dB setting (DATA, CLK, STROBE)
20
2.8.0 Noise Figure Measurement
Receiver noise figure under pulsed and CW condition is to be measured.
Tx/Rx Mode Rx
Protection OFF (Continuous)
Phase control 0 deg setting (DATA, CLK, STROBE)
Attenuator Control 0 dB setting (DATA, CLK, STROBE)
2.9.0 Rx path Spurious Measurement
Out of band Spurious search upto 30 GHz.
Input Level Rx input: -60 dBm at 9300, 9600 &
9900 MHz
Tx/Rx Mode Rx
Protection OFF (Continuous)
Phase control 0 deg setting (DATA, CLK, STROBE)
Attenuator Control 0 dB setting (DATA, CLK, STROBE)
2.10.0 Rx Path Characterization Data
a. Rx Path Phase Control Characterization
Phase shifter is varied through all the 64 states and both "Phase &
Magnitude" for all the pulsed S-parameters need to be recorded. S21
data is to be analyzed to estimate RMS Phase setability Error & RMS A/
over the frequency band. The above measurement is required over at
least 13 frequency points over the bandwidth of 600 MHz around 9600
MHz.
Input Level -60dBm
Tx/Rx Mode Rx
Protection OFF
From the above measured S parameter data following are to be
calculated:
RMS Phase Setability Error (Rx Path)
RMS Gain variation with Phase control ( Rx Path)
b. Rx Path Gain Control Characterization
Attenuator is varied through all the 64 states and both "Phase &
Magnitude" for all the pulsed S-parameters need to be recorded. S21
data is to be analyzed to estimate RMS Gain setability Error & RMS /A.
The above measurement is required over at least 13 frequency points over
the bandwidth of 600 MHz around 9600 MHz.
21
Input Level -60dBm
Tx/Rx Mode Rx
Protection OFF
From the above measured S parameter data following are to be
calculated:
RMS Gain Setability Error (Rx Path)
RMS Phase variation with Gain control ( Rx Path)
2.11.0 S-parameters of Rx path
Input Level Rx input: -60 dBm
Tx/Rx Mode Rx
Protection OFF(Continuous)
Phase control 0 deg setting (DATA, CLK, STROBE)
Attenuator Control 0 dB setting (DATA, CLK, STROBE)
On a pulsed VNA, Pulsed Sij parameters of Rx path with above conditions
are recorded over 600 MHz bandwidth around 9600 MHz with 50 MHz step
size. Data is analyzed to calculate:
Rx Path Gain Response
Rx Path Phase response
Rx Path i/p & o/p return Loss
22
Test Plan for Case 2:TR Module Integrated Blocks (TRM BLOCK) are be
characterized to ascertain the performance and any deviation at
integrated level. All the eight TRM either/both polarization are to be
powered on simultaneously/individually and RF performance of individual
TRMs are to be evaluated for possible degradation due to RF coupling &
thermal issues. The Rx Input /Tx Output port of a particular TRM under test is
to be connected dynamically with others being terminated using switch
matrix.
Following tests are required on TRM BLOCK to ascertain integrated
performance:
2.1.1 S-parameters of Tx Path & CAL path
Input Level Tx input: + 2 dBm
Tx/Rx Mode Tx
Protection ON (Continuous)
Phase control 0 deg setting (DATA, CLK, STROBE)
Attenuator Control 0 dB setting (DATA, CLK, STROBE)
On a pulsed VNA, Pulsed Sij parameters of Tx path with above conditions
are recorded over 600 MHz bandwidth around 9600 MHz with 50 MHz
steps. Data is analyzed to calculate:
Tx Path Gain Response.
Tx Path Phase response.
Tx Path i/p & o/p return Loss.
Simultaneously, Tx–CAL path S-parameters can be recorded using multi-
port VNA to calculate:
CAL port Return Loss
CAL path coupling & response
This test will represent the characteristics of TX path of TRM and distribution
network at TR input for each test mode.
2.2.1 Tx Output Characterization
a. Flatness, Peak Output, Rise/Fall times & Droop
Tx path input + 2 dBm @ 9600 MHz
Tx/Rx Mode Tx mode
Protection ON (Continuous)
Phase control 0 deg setting (DATA, CLK, STROBE)
Attenuator Control 0 dB setting (DATA, CLK, STROBE)
23
Output is to be observed on a Peak Power Meter and the following are to
be recorded
Rise & Fall times,
Power Droop
Peak Power
Pulse profile plot.
The above measurements are required over 600 MHz bandwidth centered
around 9600 MHz in 50 MHz steps.
This test will represent the characteristics of TX path of TRM and distribution
network at TR input, for each test mode.
b. Tx Output Power Measurement
Tx/Rx Mode Tx
Protection ON (Continuous)
Phase control 0 deg setting (DATA, CLK, STROBE)
Attenuator Control 0 dB setting (DATA, CLK, STROBE)
The input power is to be varied by ± 2 dB around nominal input power in
steps of 1 dB and peak output power is to be recorded. The above
measurements are required at 7 points around 9600 MHz .
2.3.1 Tx Path Phase Control Characterization Data
Phase shifter is varied through some of the 64 states and both "Phase &
Magnitude" for all the pulsed S-parameters need to be recorded. S21
data is to be analyzed to estimate RMS Phase setability Error & RMS
A/over the frequency band. The above measurement is required over
at least 13 frequency points over the bandwidth of 600 MHz around 9600
MHz.
Input Level +2 dBm
Tx/Rx Mode Tx
Protection ON
From the above measured S parameter data following are to be
calculated:
RMS Phase Setability Error (Tx Path)
RMS Gain variation with Phase control ( Tx Path)
This test will represent the TX path phase control characteristics at
integrated TRM BLOCK level.
24
2.4.1 Rx path P1dB Measurement
This measurement is needed at 7 points around 9600 MHz.
Input Level Input power is swept to measure 1
dB compression at output
Tx/Rx Mode Rx
Protection OFF (Continuous)
Phase control 0 deg setting (DATA, CLK, STROBE)
Attenuator Control 0 dB setting (DATA, CLK, STROBE)
This test will represent the P1dBof integrated TRM and distribution network.
2.5.1 Noise Figure Measurement
Receiver noise figure under pulsed and CW condition is to be measured.
Tx/Rx Mode Rx
Protection OFF (Continuous)
Phase control 0 deg setting (DATA, CLK, STROBE)
Attenuator Control 0 dB setting (DATA, CLK, STROBE)
This test will represent the Noise Figure of TRM Block and distribution
network.
2.6.1 Rx path Spurious Measurement
Out of band Spurious search up to 30 GHz.
Input Level Rx input: -60 dBm at 9300, 9600
&9900 MHz
Tx/Rx Mode Rx
Protection OFF (Continuous)
Phase control 0 deg setting (DATA, CLK, STROBE)
Attenuator Control 0 dB setting (DATA, CLK, STROBE)
This test will search for spurious at TRM BLOCK level.
2.7.1 Rx Path Characterization Data
a. Rx Path Phase Control Characterization
Phase shifter is varied through some of the 64 states and both "Phase &
Magnitude" for all the pulsed S-parameters need to be recorded. S21
data is to be analyzed to estimate RMS Phase setability Error & RMS A/
over the frequency band. The above measurement is required over at
least 13 frequency points over the bandwidth of 600 MHz around 9600
MHz.
25
Input Level -60dBm
Tx/Rx Mode Rx
Protection OFF
From the above measured S parameter data following are to be
calculated:
RMS Phase Setability Error (Rx Path)
RMS Gain variation with Phase control ( Rx Path)
b. Rx Path Gain Control Characterization
Attenuator is varied through some of the 64 states and both "Phase &
Magnitude" for all the pulsed S-parameters need to be recorded. S21
data is to be analyzed to estimate RMS Gain setability Error & RMS /A.
The above measurement is required over at least 13 frequency points over
the bandwidth of 600 MHz around 9600 MHz.
Input Level -60dBm
Tx/Rx Mode Rx
Protection OFF
From the above measured S parameter data following are to be
calculated:
RMS Gain Setability Error (Rx Path)
RMS Phase variation with Gain control ( Rx Path)
2.8.1 S-parameters of Rx path
Input Level Rx input: -60 dBm
Tx/Rx Mode Rx
Protection OFF (Continuous)
Phase control 0 deg setting (DATA, CLK, STROBE)
Attenuator Control 0 dB setting (DATA, CLK, STROBE)
On a pulsed VNA, Pulsed Sij parameters of Rx path with above conditions
are recorded over 600 MHz bandwidth around 9600 MHz with 10 MHz step
size. Data is analyzed to calculate:
Rx Path Gain Response
Rx Path Phase response
Rx Path i/p & o/p return Loss
This test will represent the S parameters Rx path of TRM and distribution
network.
26
Test Plan for Case-3: During Case-3, when TRBC is being tested standalone, following tests are to be done-
1. TRBC output Data verification w.r.t. Clock and Strobe – TBRC will generate 18 bits data along with clock and strobe (separate 8 lines for 8 TR Modules). One bit will be loaded per clock and strobe will be generated at the end of 18 bits. These data has to be verified w.r.t. clock and strobe through following test cases. a) All data bits high b) All data bits low c) Alternate data bits high/low
2. Pulse_Mod Control Verification TRBC will generate Pulse_Mod_Tx and Pulse_Mod_Rx for each TR Module. There are total eight TR Modules and hence eight Pulse_Mod_Tx and eight Pulse_Mod_Rx signals are to be captured and verified as per following test-cases- a) Pulse_Mod_Tx (1 to 8) sequentially b) Pulse_Mod_Rx (1 to 8) sequentially
3. Tx/Rx_Sw&Prot_sw verification
TRBC will generate Tx_Rx_Sw_control and Prot_Sw_control for each TR Module. There are total eight TR Modules and hence eight Tx_Rx_Sw_control and eight Prot_Sw_control signals are to be captured and verified as per following test-cases- a) Tx_Rx_Sw_control (1 to 8) sequentially b) Prot_Sw_control (1 to 8) sequentially
27
Table-8
PARAMETER VERIFICATION MATRIX for TRMODULE Units
Test
Co
mp
lete
TR M
od
ule
Te
st p
lan
NF o
f R
x p
ath
P1d
B o
f Tx
Pa
th
Ch
ara
cte
riza
tio
n
Da
ta
Vo
lta
ge
& C
urr
en
t
TR M
od
ule
Tem
pe
ratu
re
Vis
ua
l In
spe
ctio
n
Initial bench test √ √ √
Burn-in Test √ √
Post Burn-in test √ √ √
Post Random
Vibration
√
Temp.
Operational test √
√ √ √
Temp.
Operational test
(verification)
√ √ √
Thermo-Vacuum* √ √ √
EMI / EMC √ √ √ √
Final functional
test √
√ √
Note : √ denotes “Test is applicable”
* The ATS shall have capability to monitor and log the Voltage, Current,
output power of Tx and Rx path during temperature transitions.
28
ANNEXURE-III Interface command structure for Case-2 &3
29
ATS to TRBC SERIAL Interface Protocol
Serial Communication between ATS to TRBC is as per following details: ATS to TRBC: RS422 level (Serial_data) TRBC to ATS: RS485 level (TM_RS485) Baud rate: Configurable, default 10172, No Parity, 8 Data bits, 1 Start bit (low) and 1 Stop Bit (high). Typical Protocol:
ATS sends Command to TRBC for start configuration.
Package of variable length (i.e. 4 byte + data) over serial link. Wait for acknowledgment.
Acknowledgement from TRBC will be sent through RS485 line output
If no response received from TRBC in 200 milliseconds (max data length 127 bytes at 10172 baud rate) then there is error in communication. This is worst-case time in which channel communication will break.
Command Format:
Table-9
Sr. No.
No of Byte
Command Description Value Range In Hex(decimal)
1 1 Id Id address of TRBC (MSB=1)
81-88, 8F for broadcast mode
2 1 Command Command number* 1-Tile Address 2-Operation Mode 3-CAL Mode 4-Config Data Mode 5-debug Mode 6-Self ID Change 7-Telemetry
1-7
3 1 Data Length Data Length 0-7F (127)
4 (0-127) Variable
DATA Bytes 7 bit Data. (Variable depending upon Command)
0-7F (127)
5 1 Checksum byte 7bit resultant of sum of Sr.No.2 -4
0-7F
* command details along with command files will be provided at the time of PDR
30
Programming of EEPROM of TRBC in-circuit through SERIAL commands ATS will program EEPROM of TRBC in-circuit. Selection of monitor mode will be done through enabling the Monitor_Enable line for programming the EEPROM. Serial commands will be sent through serial_data interface and returned echo will be captured through Monitor_txd line. Data collected through TRM characterization has to be processed and a LUT file will be created. This LUT file will be merged with program file to fuse the EEPROM. Serial command will consist of command word and data from file. After programming complete EEPROM, it will be readback through command and will be verified w.r.t. programmed file. Note: Modifications, if any, will be intimated at the time of PDR.
31
ANNEXURE-IV ATS Software Requirements
32
ATS Software shall have following requirements: 1. Documents:
a) Vendor should provide Software Requirement Specification (SRS), Software Design Document (SDD), User manual for software and offer them for review.
2. Source Code and Installation Kit containing actual deliverable software
shall be provided.
3. Code walk-through is to be conducted by SAC team along with vendor at the time of ATP.
4. Software Audit to be conducted by SAC team before final delivery.
5. Software should have following quality attributes: (1) Security:
a. Login and password facility with user registration and password recovery mechanism.
b. All important configuration files and code files should be protected with separate administrative password.
c. Session time out facility. (2) Software should be maintainable which includes modification,
corrections, improvements or adaptation of the software to changes in environment. To achieve this modularity of software is compulsory.
(3) GUI of ATS shall have following features display, preferably:
User id and DUT, Instrument connectivity status, Input parameters entry, Test result and test condition selection, Test result status, Test completion time and error message display.
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