November 2014EB95_1.0
MachXO3L Starter Kit
User Guide
2
MachXO3L Starter Kit User Guide
IntroductionThank you for choosing the Lattice Semiconductor MachXO3L Starter Kit!
This user’s guide describes how to start using the MachXO3L Starter Kit, an easy-to-use platform for evaluating and designing with the MachXO3L ultra-low density FPGA. Along with the board and accessories, this kit includes a pre-loaded demonstration design. You may also reprogram the on-board MachXO3L device to review your own custom designs.
The MachXO3L Starter Kit currently features the MachXO3L-6900C device in the 256-ball 0.8 mm pitch caBGA package.
See the Ordering Information section for more information.
Note: Static electricity can severely shorten the lifespan of electronic components. See the Storage and Handlingsection of this document for handling and storage tips.
FeaturesThe MachXO3L Starter Kit includes:
• MachXO3L Board – The board is a 3” x 3” form factor that features the following on-board components and cir-cuits:
— MachXO3L FPGA – LCMXO3L-6900C-5BG256C— USB mini-B connector for power and programming— Eight LEDs— 4-position DIP switch— Momentary push button switch— 40-hole prototype area— Four 2 x 20 expansion header landings for general I/O, JTAG, and external power— 1 x 8 expansion header landing for JTAG— 1 x 6 expansion header landing for SPI/I2C— 3.3 V and 1.2 V supply rails
• Pre-loaded Demo – The kit includes a pre-loaded counter design that highlights use of the embedded MachXO3L oscillator and programmable I/Os configured for LED drive.
• USB Connector Cable – The board is powered from the USB mini-B socket when connected to a host PC. The USB channel also provides a programming interface to the MachXO3L JTAG port.
• Lattice Development Kits and Boards Web Page – Visit www.latticesemi.com/breakoutboards for the latest documentation (including this guide) and drivers for the kit.
The content of this user’s guide includes demo operation, programming instructions, top-level functional descrip-tions of the Starter Kit, descriptions of the on-board connectors, and a complete set of schematics.
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MachXO3L Starter Kit User Guide
Figure 1. MachXO3L Board, Top Side
Two 2 x 20 Header Landings (J3, J4)
Two 2 x 20 Header Landings (J6, J8)
JTAG Header Landing (J1)
SPI/I2C Header Landing (J7)
MachXO3L PLD (U5)
USB Mini-BSocket (J2)
Power LED, Blue (D1)
FTDI USB to UART/FIFO IC (U1)
Push Button Switch (SW1)
4-Position DIP Switch (SW2)
4 x 10 40-Hole Prototype array
LED array (D9-D2)
Storage and HandlingStatic electricity can shorten the lifespan of electronic components. Please observe these tips to prevent damage that could occur from electro-static discharge:
• Use anti-static precautions such as operating on an anti-static mat and wearing an anti-static wrist-band.
• Store the evaluation board in the packaging provided.
• Touch a metal USB housing to equalize voltage potential between you and the board.
Software RequirementsYou should install the following software before you begin developing new designs for the Starter Kit:
• Lattice Diamond® design software
• FTDI Chip USB hardware drivers (installed as an option within the Diamond installation program)
MachXO3L DeviceThis board currently features the MachXO3L-6900C FPGA which offers embedded Non-Volatile Configuration Memory (NVCM) technology for instant-on operation in a single chip. Numerous system functions are included, such as two PLLs and 256 kbits of embedded RAM plus hardened implementations of I2C and SPI. Flexible, high performance I/Os support numerous single-ended and differential standards including LVDS. The 256-ball BGA package provides up to 206 user I/Os in a 14 mm x 14 mm form factor. A complete description of this device can be found in the MachXO3 Family Data Sheet.
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MachXO3L Starter Kit User Guide
Demonstration DesignLattice provides a simple, pre-programmed demo to illustrate basic operation of the MachXO3L device. The design integrates an up-counter with the on-chip oscillator.
Note: To restore the factory default demo and program it with other Lattice-supplied examples see the Download Demo Designs section of this document.
Run the Demonstration DesignUpon power-up, the preprogrammed demonstration design automatically loads and drives the LED array in a 1-hertz pattern. The program shows a clock divider driven either by the MachXO3L internal oscillator or the external FTDI clock chip. The divider modules (heartbeat.v and kitcar.v) are clocked at the default frequency of 12 MHz which divides the clock to cycle the LED display approximately once per second. The resulting light pattern is determined by the DIP Switch (SW2) setting as shown in Table 1.
Figure 2. Demonstration Design Block Diagram
MachXO3L
X112.0 MHz
OSCH12.09 MHz Kitcar.v
Heartbeat.v
SW24-Position DIPSW
1 x 8 LEDArray
XO3L_SK_blink.v
SW1Momentary PB Async Reset
Table 1. DIP Switch Setting and LED Behavior
Switch Setting LED Behavior
DIP_SW[1] 0 (Down) External 12.0 MHz (X1)
1 (Up) Internal 12.09 MHz (OSCH)
DIP_SW[2:4] 001 1 Hz Sweep
011 1 Hz Left-Right
111 1 Hz Blink
Others 1 Hz Alternating
WARNING: Do not connect the board to your PC before you follow the driver installation procedure of this section.
Communication between the board and a PC via the USB connection cable requires installation of the FTDI chip USB hardware drivers. Loading these drivers enables the computer to recognize and program the board. Drivers can be loaded as part of the installation of Lattice Diamond design software or Diamond Programmer, or as a stand-alone package.
To load the FTDI Chip USB hardware drivers as part of the Lattice Diamond installation:
1. Select Programmer Drivers in the Product Options of Lattice Diamond Setup.
2. Select FTDI Windows USB Driver or All Drivers in the LSC Drivers Install/Uninstall dialog box.
3. Click Finish to install the USB driver.
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MachXO3L Starter Kit User Guide
4. After the driver installation is complete, connect the USB cable from a USB port on your PC to the board’s USB mini-B socket (J2). After the connection is made, a blue Power LED (D1) will light indicating the board is pow-ered on.
5. The demonstration design will automatically load and drive the LED array in a repeating pattern.
To load the FTDI chip USB hardware drivers via the stand-alone package on a Windows system:
1. Browse to www.latticesemi.com/breakoutboards and download the FTDI Chip USB Hardware Drivers package.
2. Extract the FTDI chip USB Hardware driver package to your PC hard drive.
3. Connect the USB cable from a USB port on your PC to the board’s USB mini-B socket (J2). After the connec-tion is made, a blue Power LED (D1) will light indicating the board is powered on.
4. If you are prompted, “Windows may connect to Windows Update” select No, not this time from available options and click Next to proceed with the installation. Choose the Install from specific location (Advanced) option and click Next.
5. Search for the best driver in these locations and click the Browse button to browse to the Windows driver folder created in the Download Windows USB Hardware Drivers section. Select the CDM 2.04.06 WHQL Certified folder and click OK.
6. Click Next. A screen will display as Windows copies the required driver files. Windows will display a message indicating that the installation was successful.
7. Click Finish to install the USB driver.
8. The demonstration design will automatically load and drive the LED array in a repeating pattern.
See the Troubleshooting section of this guide if the board does not function as expected.
Download Demo DesignsThe counter demo is preprogrammed into the board, however over time it is likely your board will be modified. Lat-tice distributes source and programming files for demonstration designs compatible with the Starter Kit. The demo design for the board is available on the web.
To download demo designs:
1. Browse to the Lattice Development Kits and Boards web page (www.latticesemi.com/breakoutboards) of the Lattice web site. Select MachXO3L Starter Kit Demo Source and save the file.
2. Extract the contents of MachXO3L_Starter_Kit.zip to an accessible location on your hard drive.
3. Open the Blink.ldf project file in the Lattice Diamond design software.
4. Run the Process Flow and regenerate the Bitstream file.
Continue to Programming a Demo Design with Lattice Diamond Design Software.
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MachXO3L Starter Kit User Guide
Programming a Demo Design with the Lattice Diamond ProgrammerThe demonstration design is pre-programmed into the MachXO3L board by Lattice. If you have changed the design but now want to restore the board to factory settings, use the procedure described below.
To program the MachXO3L device:
1. Install, license and run Lattice Diamond software. See www.latticesemi.com/latticediamond for download and licensing information.
2. Connect the USB cable to the host PC and the MachXO3L board.
3. From Diamond, open the Blink.ldf project file.
4. Click the Programmer icon.
5. Click Detect Cable. The Programmer will detect the cable (Cable: USB2, Port: FTUSB-0). If the cable is not detected, see the Troubleshooting section.
6. Click Device Properties.
7. Change Access Mode to SPI Flash Programming.
8. Choose SPI Flash Background Erase, Program, Verify operation.
9. Select Blink_impl1.bit programming file.
10. Under SPI Flash Options, change Vendor to SPANSION and change Device to SPI-S25FL004D or SPI-S25FL204K. Click OK.
11. Click the Program icon. When complete, PASS is displayed in the Status column.
12. Change Access mode to NVCM Programming Mode and NVCM Refresh, then click Program (or power-cycle the Starter Kit board) to initiate a re-boot from the SPI flash.
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MachXO3L Starter Kit User Guide
MachXO3L Starter KitThis section describes the features of the MachXO3L Starter Kit in detail.
OverviewThe Starter Kit is a complete development platform for the MachXO3L FPGA. The board includes a prototyping area, a USB program/power port, an LED array, switches, and header landings with electrical connections to most of the FPGA’s programmable I/O, power, and configuration pins. The board is powered by the PC’s USB port or optionally with external power. You may create or modify the program files and reprogram the board using Lattice Diamond software.
Figure 3. MachXO3L-6900C Block Diagram
MachXO3L-6900C device
2 x 20 Header Landing (J6)
LEDArray
GPIO
8
2 x 20 Header Landing (J3)
GPIO 2 x 20 Header Landing (J4)
Bank 1
Bank 2
Bank 0
2 x 20 Header Landing (J8)
Bank 3, 4 and 5
GPIO
GPIO
USB Controller
USB Mini B Socket
1 x 8 HeaderLanding (J1, Optional JTAGInterface)
JTAG Programming
1 x 6 Header Landing (J7,Optional SPI,I2C Intrfaces)
Bank 0, 2
DIP_SW 4
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MachXO3L Starter Kit User Guide
Table 2 describes the components on the board and the interfaces it supports.
Table 2. Starter Kit Components and Interfaces
Component/Interface TypeSchematic Reference Description
Circuits
USB Controller Circuit U1: FT2232H USB-to-JTAG interface and dual USB UART/FIFO IC
USB Mini-B Socket I/O J2:USB_MINI_B Programming and debug interface
Components
LCMXO3L FPGA U5: LCMXO3L-6900C-5BG256C
6900-LUT device packaged in a 14 mm x14 mm, 256-ball caBGA
Interfaces
LED Array Output D9-D2 Red LEDs
Push Button Switch Input SW1 Momentary User Input
4-position DIP Switch Input SW2 User inputs
Four 2 x 20 Header Landings I/O
J3: header_2x20J4: header_2x20J6: header_2x20J8: header_2x20
User-definable I/O
1 x 8 Header Landing I/O J1: header_1x8 Optional JTAG interface
1 x 6 Header Landing I/O J7: header_1x6 Optional SPI/I2C interfaces
4 x 10 40-Hole Prototype Area Prototype area 100 mil centered holes.
Test Points PowerTP1: +3.3 VTP2: +1.2 V TP3: GND
Power and ground reference points
SubsystemsThis section describes the principle sub systems for the Starter Kit in alphabetical order.
Clock SourcesClock sources for the LED demonstration designs originate from the MachXO3L on-chip oscillator or the 12 MHz crystal X1. You may use an expansion header landing to drive a FPGA input with an external clock source.
Expansion Header LandingsThe expansion header landings provide access to user GPIOs, primary inputs, clocks, and VCCO pins of the MachXO3L. The remaining pins serve as power supplies for external connections. Each landing is configured as one 2 x 20 100 mil.
Table 3. Expansion Connector Reference
Item Description
Reference Designators J3, J4, J6, J8
Part Number header_2x20
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MachXO3L Starter Kit User Guide
Table 4. Expansion Header Pin Information (J3)
Header Pin Number –6900C Function MachXO3L Ball
1 VCCIO0 D5,D12,G8,G9
2 VCCIO0 D5,D12,G8,G9
3 PT36C/INITn A13
4 PT36D/DONE C13
5 PT22A F8
6 PT35B B12
7 PT35A C12
8 PT26B E11
9 PT27B E10
10 PT27A D10
11 GND —
12 GND —
13 PT26A F9
14 PT27C/JTAGENB C10
15 PT17B E8
16 PT21B E9
17 PT14B E7
18 PT21A D8
19 PT16B D7
20 PT15B C7
21 GND —
22 GND —
23 PT10B C5
24 PT14A D6
25 PT16A E6
26 PT9A C4
27 PT25B A10
28 PT17A F7
29 PT22B D9
30 PT25A B9
31 GND —
32 GND —
33 PT11B B6
34 PT15A B7
35 PT9B B5
36 PT11A A5
37 PT12B B4
38 PT10A A4
39 GND —
40 PT12A A3
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MachXO3L Starter Kit User Guide
Table 5. Expansion Header Pin Information (J4)
Header Pin Number –6900C Function MachXO3L Ball
1 VCCIO1 E13,H10,J10,M13
2 VCCIO1 E13,H10,J10,M13
3 PR19D K12
4 PR19C K13
5 PR23A M14
6 PR24B N14
7 PR18B L14
8 PR24A N16
9 PR23B M15
10 PR21B M16
11 GND —
12 GND —
13 PR21A L15
14 PR18A L16
15 PR17A K14
16 PR16B K16
17 PR17B K15
18 PR15B J14
19 PR12A/PCLKT1_0 H14
20 PR16A J15
21 GND —
22 GND —
23 PR15A J16
24 PR11B H15
25 PR12B/PCLKC1_0 H16
26 PR9A G15
27 PR11A G16
28 PR5B F15
29 PR7B F16
30 PR2B/R_GPLLC_FB E15
31 GND —
32 GND —
33 PR5A E16
34 PR3B/R_GPLLC_IN E14
35 PR3A/R_GPLLT_IN D16
36 PR2C C15
37 PR2A/R_GPLLT_FB D14
38 PR7A F14
39 PR9B G14
40 PR2D B16
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MachXO3L Starter Kit User Guide
Table 6. Expansion Header Pin Information (J6)
Header Pin Number –6900C Function MachXO3L Ball
1 VCCIO2 K8,K9,N5,N12
2 VCCIO2 K8,K9,N5,N12
3 PB35B T12
4 PB34B T14
5 PB35A R11
6 PB34A R13
7 PB31A T11
8 PB28B M11
9 PB31B P11
10 PB28A N10
11 GND —
12 GND —
13 PB26B T10
14 PB29A P10
15 PB26A R9
16 PB29B R10
17 PB23A/PCLKT2_1 T9
18 PB21B N9
19 PB23B/PCLKC2_1 P9
20 PB21A M8
21 GND —
22 GND —
23 PB18B T8
24 PB15B L8
25 PB18A P8
26 PB15A M6
27 PB13A R7
28 PB16B/PCLKC2_0 R8
29 PB13B P7
30 PB16A/PCLKT2_0 T7
31 GND —
32 GND —
33 PB10B L7
34 PB9B R6
35 PB10A N6
36 PB9A T5
37 PB7B R4
38 PB4A P4
39 PB7A T3
40 PB4B T4
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MachXO3L Starter Kit User Guide
Table 7. Expansion Header Pin Information (J8)
Header Pin Number –6900C Function MachXO3L Ball
1 VCCIO5 E4
2 VCCIO3 M4
3 PL9D H6
4 PL25B N3
5 PL25A M2
6 PL22B/PCLKC3_0 M1
7 PL22A/PCLKT3_0 L2
8 PL19A L1
9 PL19B L3
10 PL19D L5
11 GND —
12 GND —
13 PL19C K4
14 PL12A/PCLKT4_0 J1
15 PL15B K1
16 PL15A J2
17 PL12B/PCLKC4_0 J3
18 PL11A H3
19 PL10B H2
20 PL11B H1
21 GND —
22 GND —
23 PL9A G2
24 PL10A G1
25 PL6B/PCLKC5_0 F2
26 PL8B F1
27 PL4A/L_GPLLT_IN E2
28 PL6A/PCLKT5_0 E1
29 PL4D D2
30 PL3B/L_GPLLC_FB D1
31 GND —
32 PL2D C2
33 PL4C C1
34 PL9B G3
35 PL2C B1
36 PL3A/L_GPLLT_FB D3
37 PL4B/L_GPLLC_IN E3
38 PL8A F3
39 PL9C F5
40 VCCIO4 H7,J7
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MachXO3L Starter Kit User Guide
Figure 4. J3/J4 Header Landing Callout
J3 J4
Top Side
J3 J4
1 2 1 2VCCIO0 VCCIO0 VCCIO1 VCCIO1
A13 C13 K12 K13F8 B12 M14 N14
C12 E11 L14 N16E10 D10 M15 M16GND GND GND GNDF9 C10 L15 L16E8 E9 K14 K16E7 D8 K15 J14D7 C7 H14 J15
GND GND GND GNDC5 D6 J16 H15E6 C4 H16 G15
A10 F7 G16 F15D9 B9 F16 E15
GND GND GND GNDB6 B7 E16 E14B5 A5 D16 C15B4 A4 D14 F14
GND A3 G14 B1639 40 39 40
Figure 5. J6/J8 Header Landing Callout
J6 J8Top Side
J6 J8
1 2 1 2VCCIO2 VCCIO2 VCCIO5 VCCIO3
T12 T14 H6 N3R11 R13 M2 M1T11 M11 L2 L1P11 N10 L3 L5GND GND GND GNDT10 P10 K4 J1R9 R10 K1 J2T9 N9 J3 H3P9 M8 H2 H1
GND GND GND GNDT8 L8 G2 G1P8 M6 F2 F1R7 R8 E2 E1P7 T7 D2 D1
GND GND GND C2L7 R6 C1 G3N6 T5 B1 D3R4 P4 E3 F3T3 T4 F5 VCCIO439 40 39 40
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MachXO3L Starter Kit User Guide
Figure 6. J1 Header Landing and LED Array Callout
LCMXO2-7000HE4TG144C
D9 LED0D8 LED1D7 LED2D6 LED3D5 LED4D4 LED5D3 LED6D2 LED7
H11
LED Net
LED Array
MachXO3LBall
J13J11L12K11L13N15P16
Top Side
TCKGNDTMSncncTDITDO
VCCIO0
8
1
J1 J1
J7
D9
D2
DIP_SW1
DIP_SW4
MCLKSISPISPISO
SNSCLSDA
6
1
J7
DIP_SW1DIP_SW2DIP_SW3DIP_SW4
H11
NetMachXO3L
Ball
J13J11L12
MachXO3L FPGAThe LCMXO3L-6900C-5BG256C is a 256-ball caBGA package FPGA device which provides up to 206 usable I/Os in a 14 mm x 14 mm package. 150 I/Os are accessible from the board headers, switches and LEDs.
Table 8. MachXO3L FPGA Interface Reference
Item Description
Reference Designators U5
Part Number LCMXO3L-6900C-5BG256C
Manufacturer Lattice Semiconductor
Web Site www.latticesemi.com
Programming Interface CircuitsFor power and programming an FTDI USB UART/FIFO IC converter provides a communication interface between a PC host and the JTAG programming chain of the Starter Kit. The USB 5 V supply is also used as a source for the 3.3 V supply rail. A USB mini-B socket is provided for the USB connector cable.
Table 9. USB/JTAG Interface Reference
Item Description
Reference Designators U1
Part Number FT2232HL
Manufacturer Future Technology Devices International (FTDI)
Web Site www.ftdichip.com
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MachXO3L Starter Kit User Guide
Table 10. JTAG Programming Pin Information
Description MachXO3L Pin
Test Data Output C6:TDO
Test Data Input A6:TDI
Test Mode Select B8:TMS
Test Clock A7:TCK
Table 11. SPI Programming Pin Information
Description MachXO3L Pin
Master Clock/Config Clock P6:MCLK/CCLK
Serial Data Input P13: SI/SISPI
Serial Data Output T6: SO/SPISO
SPI Slave Select R12: SN
Table 12. I2C Programming Pin Information
Description MachXO3L Pin
Serial Data C9:SDA
Serial Clock A9:SCL
LEDsA blue LED (D1) is used to indicate USB 5V power. Eight red LEDs are driven by I/O pins of the MachXO3L device.
Table 13. Power and User LEDs Reference
Item Description
Reference Designators Red LEDs (D2, D3, D4, D5, D6, D7, D8, D9)Blue LEDs (D1)
Part Number LTST-C190KRKT (D2-D9) LTST-C190TBKT (D1)
Manufacturer Lite-On It Corporation
Web Site www.liteonit.com
Power Supply3.3 V and 1.2 V power supply rails are converted from the USB 5 V interface when the board is connected to a host PC.
Test PointsIn order to check the various voltage levels used, test points are provided:
• TP1: +3.3 V
• TP2: +1.2 V
• TP3: GND
USB Programming and Debug Interface The USB mini-B socket of the Starter Kit serves as the programming and debug interface.
JTAG Programming: For JTAG programming, a preprogrammed USB PHY peripheral controller is provided on the Starter Kit to serve as the programming interface to the MachXO3L FPGA.
Programming requires the Lattice Diamond or ispVM System software.
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MachXO3L Starter Kit User Guide
Table 14. USB Interface Reference
Item Description
Reference Designators U1
Part Number FT2232HL
Manufacturer Future Technology Devices International (FTDI)
Web Site www.ftdichip.com
Board ModificationsThis section describes modifications to the board to change or add functionality.
Bypassing the USB Programming InterfaceThe USB programming interface circuit (USB Programming and Debug Interface section) may be optionally bypassed by removing the 0 Ohm resistors: R4, R5, R6, R7 (See Appendix A. Schematics, Sheet 2 of 8). Header landing J1 provides JTAG signal access for jumper wires or a 1 x 8 pin header.
Applying External PowerThe Starter Kit is powered by the circuit of Schematic Sheet 3 of 8 based on the 5 V USB power source. You may disconnect this power source by removing the 0 Ohm resistors: R35 (VCC_1.2 V) and R42 (VCC_3.3 V). Power connections are available from the test points, TP1 (+3.3 V) and TP2 (+1.2 V).
Measuring Bank and Core PowerTest points (TP1, TP2) provide access to power supplies of the MachXO3L FPGA. Inline 1 Ohm resistors: R31 (VCCIO0, +3.3 V, Bank 0), R25 (VCCIO1, +3.3 V, Bank 1), R37 (VCCIO2, +3.3 V, Bank 2), R32 (VCCIO3, +3.3 V, Bank 3), R26 (VCCIO4, +3.3 V, Bank 4), R38 (VCCIO5, +3.3 V, Bank 5), R24 (VCC core, +1.2 V) can be used to mea-sure current for the power supplies.
Mechanical SpecificationsDimensions: 3 in. [L] x 3 in. [W] x 1/2 in. [H]
Environmental RequirementsThe evaluation board must be stored between –40° C and 100° C. The recommended operating temperature is between 0° C and 90° C.
The board can be damaged without proper anti-static handling.
GlossaryFPGA: Field Programmable Gate Array
DIP: Dual in-line package
LED: Light Emitting Diode.
LUT: Look Up Table
PCB: Printed Circuit Board
RoHS: Restriction of Hazardous Substances Directive
USB: Universal Serial Bus
WDT: Watchdog Timer
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MachXO3L Starter Kit User Guide
TroubleshootingUse the tips in this section to diagnose problems with the Starter Kit.
LEDs Do Not Flash
If power is applied but the board does not flash according to the preprogrammed counter demonstration then it is likely the board has been reprogrammed with a new design. Follow the directions in the Demonstration Design sec-tion to restore the factory default.
USB Cable Not Detected
If Lattice Diamond Programmer or ispVM System does not recognize the USB cable after installing the Lattice USB port drivers and rebooting, the incorrect USB driver may have been installed. This usually occurs if you attach the board to your PC prior to installing the Lattice-supplied USB driver.
To access the Troubleshooting the USB Driver Installation Guide:
For Diamond software and standalone Diamond Programmer:
1. Start Diamond or Diamond Programmer and choose Help.
2. Search for USB driver or Troubleshooting, then select the Troubleshooting the USB Driver topic.
3. Follow the directions to install the Lattice USB driver.
For ispVM:
1. Start ispVM System and choose Options > Cable and I/O Port Setup.The Cable and I/O Port Setup Dialog appears.
2. Click the Troubleshooting the USB Driver Installation Guide link.The Troubleshooting the USB Driver Installation Guide document appears in your system’s PDF file reader.
3. Follow the directions to install the Lattice USB driver.
Determine the Source of a Pre-Programmed Device
If the Starter Kit has been reprogrammed, the original demo design can be restored. To restore the board to the factory default, see the Download Demo Designs section for details on downloading and reprogramming the device.
Ordering Information
Description Ordering Part NumberChina RoHS Environment-Friendly
Use Period (EFUP)
MachXO3L Starter Kit LCMXO3L-6900C-S-EVN
Technical Support Assistancee-mail: [email protected]
Internet: www.latticesemi.com
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MachXO3L Starter Kit User Guide
Revision HistoryDate Version Change Summary
November 2014 1.0 Initial release.
© 2014 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
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MachXO3L Starter Kit User Guide
Appendix A. SchematicsFigure 7. Block Diagram
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
USB
CONNECTOR
USB to
JTAG / RS232
Power from USB 5V
5-KNAB
1-KNAB
BANK-4
BANK-2
BANK-0
LCMXO3L-6900C-5BG256C
JTAG_I/F
HEADER
HEADER
I/O'SI2C
I/O'S
I/O'S
I/O'S
HEADER I/O'S
I/O'S
BANK-3
HEADER
RS232_I/F
LEDS (1-8)
SPI FLASH
HEADER
SPI
Dat
e:
Size
Sche
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ic R
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eet
Title
Latti
ce S
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ondu
ctor
App
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ions
Emai
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sem
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Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
81
MAC
HXO
3 St
arte
r Kit
- BLO
CK
DIA
GR
AM
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
AD
ate:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
81
MAC
HXO
3 St
arte
r Kit
- BLO
CK
DIA
GR
AM
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
AD
ate:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
81
MAC
HXO
3 St
arte
r Kit
- BLO
CK
DIA
GR
AM
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
A
20
MachXO3L Starter Kit User Guide
Figure 8. USB Interface to JTAG
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
FOR
FUTU
RE R
S232
FUN
CTIO
N
FOR
FUTU
RE I
2C F
UNCT
ION
TDO
TDI
TMS
TCK
FT_E
ECS
FT_E
ECLK
FT_E
EDAT
A
VCC
1_8F
T
VCC
1_8F
T
+3.3
V
+3.3
V
VCC
IO0
+3.3
V
+3.3
V
+3.3
V
+3.3
V
+3.3
V
TCK
Shee
t[4]
TDI
Shee
t[4]
RS2
32_R
x_TT
LSh
eet[4
]R
S232
_Tx_
TTL
Shee
t[4]
RTS
nSh
eet[4
]
DTR
nSh
eet[4
]C
TSn
Shee
t[4]
DSR
nSh
eet[4
]D
CD
nSh
eet[4
]
TDO
Shee
t[4]
TMS
Shee
t[4]
DM
Shee
t[3]
DP
Shee
t[3]
12M
HZ
Shee
t[4]
RI
Shee
t[4]
FTD
I_SC
LSh
eet[6
]
FTD
I_SD
ASh
eet[6
]
USB
_I2C
_EN
Shee
t[6]
Dat
e:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
82
USB
to J
TAG
I/F
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
AD
ate:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
82
USB
to J
TAG
I/F
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
AD
ate:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
82
USB
to J
TAG
I/F
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
A
R27
0D
NI
C4
0.1u
F
R15
0D
NI
X1 12M
HZ
11
33
G1
2G
24
FTDI
Hig
h-Sp
eed
USB
F
T223
2H
FT22
32H
LU
1
VREG
IN50
VREG
OU
T49
DM
7
DP
8
REF
6
RES
ET#
14
EEC
S63
EEC
LK62
EED
ATA
61
OSC
I2
OSC
O3
TEST
13
ADBU
S016
ADBU
S117
ADBU
S218
ADBU
S319
VPHY4
VPLL9
VCORE12
VCORE37
VCORE64
VCCIO20
VCCIO31
VCCIO42
VCCIO56
AGND10
GND1
GND5
GND11
GND15
GND25
GND35
GND47
GND51PW
REN
#60
SUSP
END
#36
ADBU
S421
ADBU
S522
ADBU
S623
ADBU
S724
ACBU
S026
ACBU
S127
ACBU
S228
ACBU
S329
ACBU
S430
ACBU
S532
ACBU
S633
ACBU
S734
BDBU
S038
BDBU
S139
BDBU
S240
BDBU
S341
BDBU
S443
BDBU
S544
BDBU
S645
BDBU
S746
BCBU
S048
BCBU
S152
BCBU
S253
BCBU
S354
BCBU
S455
BCBU
S557
BCBU
S658
BCBU
S759
C11
0.1u
F
R21
0D
NI
R62
0D
NI
R2
4.7K
C7
0.1u
F
C14
0.1u
F
R6
0
R12
10K
R82
0D
NI
L2
600o
hm 5
00m
A12 C
5
10uF
R8
2.2K
R16
0D
NI
C3
4.7u
F
1 2
R4
0
J1
Hea
der 1
x8 DN
I
11
22
33
44
55
66
77
88
C9
18pF
R19
12K
C1
4.7u
F
1 2
R1
4.7K
L1
600o
hm 5
00m
A12 C8 18pF
R17
0D
NI
R3
4.7K
R11
10K
93LC
56C
-I/SN
U2
CS
1
CLK
2
DI
3
DO
4VS
S5
OR
G6
NU
7VC
C8
R14
0D
NI
C2
0.1u
F
C12
0.1u
F
R22
0D
NI
R23
0
R18
0D
NI
R10
12K
C10
0.1u
F
R7
0
C6
0.1u
F
R13
10K
R5
0
C13
0.1u
F
R20
0D
NI
R9
2.2K
21
MachXO3L Starter Kit User Guide
Figure 9. FPGA
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
NOTE : Boot from external SPI Flash (U6)
requires VCCIO2 set to 3.3V. Use caution
when setting VCCIO2 to any other voltage.
VBU
S_5V
+3.3
V
+1.2
V
VBU
S_5V
+3.3
VVC
CIO
0
+1.2
V
+3.3
VVC
CIO
3
+1.2
V
+3.3
VVC
CIO
1
+1.2
V
+3.3
VVC
CIO
4
+1.2
V
+3.3
VVC
CIO
2
+1.2
V
+3.3
VVC
CIO
5
+1.2
V
+3.3
VVC
C_C
OR
E
+3.3
V
VCC
IO3
VCC
IO4
VCC
IO5
VCC
_CO
RE
VCC
IO0
VCC
IO1
VCC
IO2
+3.3
V+1
.2V
+1.2
V
DM
Shee
t[2]
DP
Shee
t[2]
Dat
e:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
83
POW
ER R
EGU
LATO
RS
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
AD
ate:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
83
POW
ER R
EGU
LATO
RS
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
AD
ate:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
83
POW
ER R
EGU
LATO
RS
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
A
R42
0
R26
1
TP6 1
L3 600o
hm 5
00m
A
1 2
R31
1
L4
600o
hm 5
00m
A12
C18
22uF
C62
1uF
R37
1
C20
22uF
TP9 1
TP7 1
R29
1
DN
I
TP1 1
U4
NC
P111
7
GN
D
1
IN3
OU
T2
TAB
4
C17
10uF
L5
600o
hm 5
00m
A12
TP10 1
D1
Blue
1 2
R33
1
DN
I
TP8 1
R86
1
DN
I
R39
1
DN
I
C21
0.1u
F
TP3 1
C15
0.1u
F
TP5 1
TP11 1
R32
1
TP2 1
R25
1
C64
0.01
uFU
3FA
N11
12
GND1
Out
put
2In
put
3
Tab
4
J2
SKT_
MIN
IUSB
_B_R
A
VCC
1
D-
2
D+
3
ID4
GN
D5
R41
1K
C61
10uF
R38
1
C16
0.1u
F
R35
0
C19
10uF
C63
0.1u
F
R30
0
R34
1
DN
I
R36
100
R28
1
DN
I
R24
1
R40
1
DN
I
22
MachXO3L Starter Kit User Guide
Figure 10. FPGA
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
NOTE
: M
AKE
PWR
TRAC
ESCA
PABL
E OF
1A
IO_C
4IO
_B5
CR
EST
IO_A
4IO
_C5
IO_A
5IO
_B6
IO_B
4IO
_A3
IO_E
7IO
_D6
TDO
TDI
IO_B
7IO
_C7
IO_E
6IO
_D7
IO_F
7
TCK
IO_E
8
12M
HZ
TMS
IO_D
8IO
_E9
IO_F
8IO
_D9
IO_B
9IO
_A10
IO_F
9
IO_D
10
IO_E
11
JTAG
ENB
IO_E
10
RS2
32_R
x_TT
LR
S232
_Tx_
TTL
RTS
nD
TRn
CTS
nD
SRn
INIT
ND
ON
E
CR
EST
IO_C
12
RI
DC
Dn
IO_B
12
IO_B
4IO
_B5
IO_B
6
IO_A
10IO
_D9
IO_E
6IO
_C5
IO_D
7IO
_E7
IO_F
9IO
_E8
IO_E
10IO
_C12
INIT
NIO
_F8
IO_A
5IO
_B7
IO_F
7IO
_B9
IO_C
4IO
_D6
IO_D
8IO
_C7
JTAG
ENB
IO_E
9
IO_E
11IO
_D10
DO
NE
IO_B
12
PRO
GR
AMN
IO_A
3IO
_A4
SCL_
1SD
A_1
VCC
IO0
VCC
IO0
VCC
IO0
VCC
IO0
VCC
IO0
VCC
IO0
TMS
Shee
t[2]
TCK
Shee
t[2]
TDO
Shee
t[2]
TDI
Shee
t[2]
CTS
nSh
eet[2
]
RS2
32_R
x_TT
LSh
eet[2
]
RTS
nSh
eet[2
]D
TRn
Shee
t[2]
DSR
nSh
eet[2
]
DC
Dn
Shee
t[2]
RI
Shee
t[2]
RS2
32_T
x_TT
LSh
eet[2
]
12M
HZ
Shee
t[2]
SDA
Shee
t[6]
SCL
Shee
t[6]
Dat
e:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
84
BAN
K0 I/
0
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
AD
ate:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
84
BAN
K0 I/
0
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
AD
ate:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
84
BAN
K0 I/
0
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
A
C25
0.1u
F
J3 Hea
der 2
x20
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
C66
150p
FD
NI
C24
0.1u
F
C23
0.1u
F
C65
150p
FD
NI
TP4 1
C22
0.01
uF
R44
2K
R87
49.9
C27
0.1u
F
SW1
SYS_
RST
* =
TRUE
LVD
S Ou
tput
BANK
0
1K-2
K/4K
/7K
|| 2
nd_F
n.
LCM
XO3L
-690
0C-5
BG25
6C
U5A
VCC
IO0/
VCC
IO0/
VCC
IO0
D5
VCC
IO0/
VCC
IO0/
VCC
IO0
D12
VCC
IO0/
VCC
IO0/
VCC
IO0
G8
VCC
IO0/
VCC
IO0/
VCC
IO0
G9
PT9A
*/PT9
A*/P
T9A*
C4
PT9B
*/PT9
B*/P
T9B*
B5
PT9C
/PT9
C/P
T9C
B3
PT10
A*/P
T10A
*/PT1
0A*
A4
PT10
B*/P
T10B
*/PT1
0B*
C5
PT11
A*/P
T11A
*/PT1
1A*
A5
PT11
B*/P
T11B
*/PT1
1B*
B6
PT11
C/P
T12A
*/PT1
2A*
A3
PT11
D/P
T12B
*/PT1
2B*
B4
PT12
A*/P
T13A
*/PT1
4A*
D6
PT12
B*/P
T13B
*/PT1
4B*
E7
PT12
C/P
T13C
/PT1
4C ||
TD
OC
6
PT12
D/P
T13D
/PT1
4D ||
TD
IA6
PT13
A*/P
T14A
*/PT1
5A*
B7
PT13
B*/P
T14B
*/PT1
5B*
C7
PT13
C/P
T14C
/PT1
6A*
E6
PT13
D/P
T14D
/PT1
6B*
D7
PT16
A*/P
T15A
*/PT1
7A*
F7
PT16
B*/P
T15B
*/PT1
7B*
E8
PT16
C/P
T15C
/PT1
7C ||
TC
KA7
PT16
D/P
T15D
/PT1
7D ||
TM
SB8
PT17
A*/P
T18A
*/PT1
8A* |
| PC
LKT0
_1C
8
PT17
B*/P
T18B
*/PT1
8B* |
| PC
LKC
0_1
A8
PT17
C/P
T19A
*/PT2
1A*
D8
PT17
D/P
T19B
*/PT2
1B*
E9
PT18
A*/P
T20A
*/PT2
2A*
F8
PT18
B*/P
T20B
*/PT2
2B*
D9
PT18
C/P
T20C
/PT2
2C ||
SC
L/PC
LKT0
_0A9
PT18
D/P
T20D
/PT2
2D ||
SD
A/PC
LKC
0_0
C9
PT19
A*/P
T21A
*/PT2
5A*
B9
PT19
B*/P
T21B
*/PT2
5B*
A10
PT19
C/P
T22A
*/PT2
6A*
F9
PT19
D/P
T22B
*/PT2
6B*
E11
PT20
A*/P
T23A
*/PT2
7A*
D10
PT20
B*/P
T23B
*/PT2
7B*
E10
PT20
C/P
T23C
/PT2
7C ||
JTA
GEN
BC
10
PT20
D/P
T23D
/PT2
7D ||
PR
OG
RAM
NB1
0
PT21
A*/P
T24A
*/PT2
8A*
A11
PT21
B*/P
T24B
*/PT2
8B*
C11
PT21
C/P
T24C
/PT3
2A*
F10
PT21
D/P
T24D
/PT3
2B*
D11
PT22
A*/P
T25A
*/PT3
3A*
B11
PT22
B*/P
T25B
*/PT3
3B*
A12
PT22
C/P
T26A
*/PT3
4A*
B13
PT22
D/P
T26B
*/PT3
4B*
A14
PT23
A*/P
T27A
*/PT3
5A*
C12
PT23
B*/P
T27B
*/PT3
5B*
B12
PT24
A*/P
T28A
*/PT3
6A*
B14
PT24
B*/P
T28B
*/PT3
6B*
A15
PT24
C/P
T28C
/PT3
6C ||
INIT
NA1
3
PT24
D/P
T28D
/PT3
6D ||
DO
NE
C13
R88
49.9
C28
0.1u
F
R89
150
C26
0.1u
F
R90
150
R43 2K
R45
4.7K
23
MachXO3L Starter Kit User Guide
Figure 11. Power LEDs
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
PROTOTYPE AREA
FILL AVAILABLE AREA
NOTE
: M
AKE
PWR
TRAC
ESCA
PABL
E OF
1A
IO_C
15IO
_B16
IO_J
16IO
_J14
IO_D
14IO
_E15
IO_D
16IO
_E14
IO_E
16IO
_F15
IO_F
14IO
_F16
IO_G
15IO
_G14
IO_G
16IO
_H15
IO_H
14IO
_H16
IO_J
15IO
_K16
IO_N
16IO
_N14
LED
0LE
D1
LED
2LE
D3
LED
4LE
D5
LED
6LE
D7
IO_K
14IO
_K15
IO_L
16IO
_L14
IO_K
13IO
_K12
IO_L
15IO
_M16
IO_M
14IO
_M15
IO_K
13IO
_N14
IO_N
16IO
_M16
IO_L
16IO
_K16
IO_J
14IO
_J15
IO_H
15IO
_G15
IO_F
15IO
_E15
IO_E
14IO
_C15
IO_F
14IO
_B16
IO_L
14IO
_M15
IO_L
15IO
_K14
IO_K
15IO
_H14
IO_J
16IO
_H16
IO_G
16IO
_F16
IO_K
12IO
_M14
IO_E
16IO
_D16
IO_D
14IO
_G14
VCC
IO1
VCC
IO1
VCC
IO1
VCC
IO1
LED
0Sh
eet[8
]LE
D1
Shee
t[8]
LED
2Sh
eet[8
]LE
D3
Shee
t[8]
LED
4Sh
eet[8
]LE
D5
Shee
t[8]
LED
6Sh
eet[8
]LE
D7
Shee
t[8]
Dat
e:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
85
BAN
K1 I/
O
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
AD
ate:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
85
BAN
K1 I/
O
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
AD
ate:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
85
BAN
K1 I/
O
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
A
C34
0.1u
F
C30
0.1u
F
J5
Prot
o Ty
pe A
rea,
Hol
es o
n 0.
1 in
ch C
ente
rsD
NI
Prot
o Ty
pe A
rea
1
BANK
1 DQ1
DQ0
** =
2nd
_Fn.
app
lica
ble
for
4K a
nd 7
K de
vice
s on
ly.
1K-2
K/4K
/7K
|| 2
nd_F
n.
LCM
XO3L
-690
0C-5
BG25
6C
U5B
PR10
C/P
R14
C/P
R17
CJ1
1
PR10
D/P
R14
D/P
R17
DL1
2
PR6A
/PR
9A/P
R11
A D
QS0
G16
PR6B
/PR
9B/P
R11
B D
QS0
NH
15
PR12
C/P
R16
C/P
R21
CK1
1
PR12
D/P
R16
D/P
R21
DL1
3
PR7A
/PR
10A/
PR12
A ||
PCLK
T1_0
H14
PR7B
/PR
10B/
PR12
B ||
PCLK
C1_
0H
16
PR13
C/P
R18
C/P
R23
CN
15
PR13
D/P
R18
D/P
R23
DP1
6
PR14
A/PR
19A/
PR24
AN
16
PR14
B/PR
19B/
PR24
BN
14
PR14
C/P
R20
C/P
R25
CP1
5
PR14
D/P
R20
D/P
R25
DR
16
PR13
A/PR
18A/
PR23
AM
14
PR13
B/PR
18B/
PR23
BM
15
PR12
A/PR
16A/
PR21
AL1
5
PR12
B/PR
16B/
PR21
BM
16
PR11
C/P
R15
C/P
R19
CK1
3
PR11
D/P
R15
D/P
R19
DK1
2
PR11
A/PR
15A/
PR18
AL1
6
PR11
B/PR
15B/
PR18
BL1
4
PR10
A/PR
14A/
PR17
AK1
4
PR10
B/PR
14B/
PR17
BK1
5
PR9A
/PR
13A/
PR16
A D
QS1
J15
PR9B
/PR
13B/
PR16
B D
QS1
NK1
6
PR1A
/PR
2A/P
R2A
|| R
_GPL
LT_F
B**
D14
PR1B
/PR
2B/P
R2B
|| R
_GPL
LC_F
B**
E15
PR1C
/PR
2C/P
R2C
C15
PR1D
/PR
2D/P
R2D
B16
PR2A
/PR
3A/P
R3A
|| R
_GPL
LT_I
N**
D16
PR2B
/PR
3B/P
R3B
|| R
_GPL
LC_I
N**
E14
PR2C
/PR
4C/P
R4C
C16
PR2D
/PR
4D/P
R4D
D15
PR3C
/PR
5C/P
R6C
F13
PR3D
/PR
5D/P
R6D
G12
PR4C
/PR
6C/P
R7C
F12
PR4D
/PR
6D/P
R7D
G13
PR3A
/PR
5A/P
R5A
E16
PR3B
/PR
5B/P
R5B
F15
PR5C
/PR
8C/P
R10
CG
11
PR5D
/PR
8D/P
R10
DH
12
PR4A
/PR
6A/P
R7A
F14
PR4B
/PR
6B/P
R7B
F16
PR6C
/PR
9C/P
R11
CH
13
PR6D
/PR
9D/P
R11
DJ1
2
PR7C
/PR
10C
/PR
15A
J16
PR7D
/PR
10D
/PR
15B
J14
PR9C
/PR
13C
/PR
16C
H11
PR9D
/PR
13D
/PR
16D
J13
PR5A
/PR
8A/P
R9A
G15
PR5B
/PR
8B/P
R9B
G14
VCC
IO1/
VCC
IO1/
VCC
IO1
M13
VCC
IO1/
VCC
IO1/
VCC
IO1
J10
VCC
IO1/
VCC
IO1/
VCC
IO1
E13
VCC
IO1/
VCC
IO1/
VCC
IO1
H10
J4 Hea
der 2
x20
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
C33
0.1u
F
C32
0.1u
F
C29
0.01
uF
C31
0.1u
F
24
MachXO3L Starter Kit User Guide
Figure 12. Bank 2 I/O
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
SPI
FLAS
H
NOTE
: M
AKE
PWR
TRAC
ESCA
PABL
E OF
1A
NOTE
: P
LACE
SPI
FLA
SH I
N TH
E BO
TTOM
SID
E
NOTE
: P
LACE
ALL
THE
LVD
S DI
FF T
ERMI
NATI
ONRE
SIST
ORS
IN T
OP A
ND C
LOSE
TO
U5
NOTE
: P
LACE
J7
NEAR
J1
NOTE
: R
OUTE
J6
TRAC
ES A
S 10
0OHM
S, L
ENGT
H MA
TCHE
DDI
FFER
ENTI
AL P
AIRS
NOTE
: P
LACE
R84
,R81
,R83
,R85
CLO
SE T
O U5
NOTE
: P
LACE
TES
T PO
INTS
NEA
R PI
N 1
OF J
7 AN
D TH
E SA
ME L
INE
IO_P
4IO
_T4
CSS
PIN
IO_T
3IO
_R4
IO_T
5IO
_R6
IO_N
6IO
_L7
SPIS
O
IO_R
7IO
_P7
IO_M
6IO
_L8
IO_T
7IO
_R8
IO_P
8IO
_T8
IO_M
8IO
_N9
IO_T
9IO
_P9
IO_R
9IO
_T10
IO_N
10IO
_M11
IO_P
10IO
_R10
IO_T
11IO
_P11
IO_R
13IO
_T14
IO_R
11IO
_T12
SISP
I
CSS
PIN
MC
LKSP
ISO
SISP
IM
CLK
SN
SN
MC
LK
SPIS
OSI
SPI
IO_M
11IO
_N10
IO_T
3IO
_R4
IO_P
10IO
_R10
IO_T
5IO
_R6
IO_N
9IO
_M8
IO_N
6IO
_L7
IO_L
8IO
_M6
IO_R
8IO
_T7
IO_M
6IO
_L8
IO_R
7IO
_P7
IO_R
6IO
_T5
IO_T
7IO
_R8
IO_P
4IO
_T4
IO_P
8IO
_T8
IO_T
12IO
_R11
IO_T
11IO
_P11
IO_T
10IO
_R9
IO_T
9IO
_P9
IO_T
8IO
_P8
IO_R
7IO
_P7
IO_L
7IO
_N6
IO_R
4IO
_T3
IO_M
8IO
_N9
IO_T
9IO
_P9
IO_R
9IO
_T10
IO_N
10IO
_M11
IO_P
10IO
_R10
IO_T
11IO
_P11
IO_R
13IO
_T14
IO_R
11IO
_T12
IO_T
14IO
_R13
IO_P
4IO
_T4
SDA
SCL
FTD
I_SD
A
FTD
I_SC
L
+3.3
V
VCC
IO2
VCC
IO2
VCC
IO2
VCC
IO2
VCC
IO2
SCL
Shee
t[4]
SDA
Shee
t[4]
FTD
I_SC
LSh
eet[2
]
FTD
I_SD
ASh
eet[2
]
USB
_I2C
_EN
Shee
t[2]
Dat
e:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
86
BAN
K2 I/
O
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
AD
ate:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
86
BAN
K2 I/
O
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
AD
ate:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
86
BAN
K2 I/
O
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
A
R67
0
BANK
2
1K-2
K/4K
/7K
|| 2
nd_F
n.
LCM
XO3L
-690
0C-5
BG25
6C
U5C
PB9C
/PB1
0C/P
B13C
M7
PB9D
/PB1
0D/P
B13D
N7
PB11
C/P
B12A
/PB1
5AM
6
PB11
D/P
B12B
/PB1
5BL8
PB11
A/PB
13A/
PB16
A ||
PCLK
T2_0
T7
PB11
B/PB
13B/
PB16
B ||
PCLK
C2_
0R
8
PB12
A/PB
15A/
PB18
AP8
PB12
B/PB
15B/
PB18
BT8
PB12
C/P
B15C
/PB1
8CN
8
PB12
D/P
B15D
/PB1
8DL9
PB16
C/P
B18A
/PB2
1AM
8
PB16
D/P
B18B
/PB2
1BN
9
PB16
A/PB
20A/
PB23
A ||
PCLK
T2_1
T9
PB16
B/PB
20B/
PB23
B ||
PCLK
C2_
1P9
PB18
A/PB
21A/
PB26
AR
9
PB18
B/PB
21B/
PB26
BT1
0
PB18
C/P
B21C
/PB2
6CM
9
PB18
D/P
B21D
/PB2
6DL1
0
PB19
C/P
B23C
/PB2
8AN
10
PB19
D/P
B23D
/PB2
8BM
11
PB19
A/PB
23A/
PB29
AP1
0
PB19
B/PB
23B/
PB29
BR
10
PB21
A/PB
24A/
PB31
AT1
1
PB21
B/PB
24B/
PB31
BP1
1
PB21
C/P
B24C
/PB3
1CM
10
PB21
D/P
B24D
/PB3
1DN
11
PB22
C/P
B26A
/PB3
4AR
13
PB22
D/P
B26B
/PB3
4BT1
4
PB22
A/PB
27A/
PB35
AR
11
PB22
B/PB
27B/
PB35
BT1
2
PB24
A/PB
29A/
PB37
AP1
2
PB24
B/PB
29B/
PB37
BT1
3
PB25
A/PB
30A/
PB38
A ||
SNR
12
PB25
B/PB
30B/
PB38
B ||
SI/S
ISPI
P13
PB25
C/P
B30C
/PB3
8CT1
5
PB25
D/P
B30D
/PB3
8DR
14
PB3A
/PB3
A/PB
4AP4
PB3B
/PB3
B/PB
4BT4
PB3C
/PB3
C/P
B4C
T2
PB3D
/PB3
D/P
B4D
R3
PB5A
/PB4
A/PB
6A ||
CSS
PIN
R5
PB5B
/PB4
B/PB
6BP5
PB6C
/PB6
A/PB
7AT3
PB6D
/PB6
B/PB
7BR
4
PB6A
/PB7
A/PB
9AT5
PB6B
/PB7
B/PB
9BR
6
PB8C
/PB9
C/P
B10A
N6
PB8D
/PB9
D/P
B10B
L7
PB8A
/PB9
A/PB
12A
|| M
CLK
/CC
LKP6
PB8B
/PB9
B/PB
12B
|| SO
/SPI
SOT6
PB9A
/PB1
0A/P
B13A
R7
PB9B
/PB1
0B/P
B13B
P7
VCC
IO2/
VCC
IO2/
VCC
IO2
K8
VCC
IO2/
VCC
IO2/
VCC
IO2
K9VC
CIO
2/VC
CIO
2/VC
CIO
2N
12VC
CIO
2/VC
CIO
2/VC
CIO
2N
5
R80
10K
R81
0
R53
100
DN
I
R61
100
DN
I
R65
10K
R56
100
DN
I
TP14
1
R91
0D
NI
TP15
1
U6
S25F
L204
K0TM
FI04
1
CS
1
SDI
5
SCK
6
WP
3
HO
LD7
VCC8
GND4
SDO
2
C39
0.1u
F
R84
0
R63
1K
R57
100
DN
I
R48
100
DN
I
C35
0.01
uF
R92
0D
NI
J7
CO
N6
DN
I
1 2 3 4 5 6
C37
0.1u
F
R66
10K
C38
0.1u
F
R58
100
DN
I
R50
100
DN
I
R85
0
C36
0.1u
F
J6 Hea
der 2
x20
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
R51
100
DN
I
TP13
1
R54
100
DN
I
C40
0.1u
F
R47
100
DN
I
R59
100
DN
I
TP12
1
R64
10K
R83
0
R49
100
DN
I
R52
100
DN
I
R55
100
DN
I
R60
100
DN
I
C41
100n
F10
V
R46
100
DN
I
25
MachXO3L Starter Kit User Guide
Figure 13. Bank 3, 4, 5 I/O
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
MAKE
PWR
TRA
CES
CAPA
BLE
OF 1
A
MAKE
PWR
TRA
CES
CAPA
BLE
OF 1
A
PLAC
E TH
E RE
SIST
ORS
IN T
HE T
OP
IO_L
1IO
_L3
IO_K
4IO
_L5
IO_L
2IO
_M1
IO_M
2IO
_N3
IO_G
1IO
_H2
IO_H
3IO
_H1
IO_J
1IO
_J3
IO_J
2IO
_K1
IO_B
1IO
_C2
IO_D
3IO
_D1
IO_E
2IO
_E3
IO_C
1IO
_D2
IO_E
1IO
_F2
IO_F
3IO
_F1
IO_G
2IO
_G3
IO_F
5IO
_H6
DIP
_SW
1D
IP_S
W2
DIP
_SW
3D
IP_S
W4
DIP
_SW
1D
IP_S
W2
DIP
_SW
3D
IP_S
W4
IO_N
3IO
_M1
IO_L
1IO
_L5
IO_J
1IO
_J2
IO_H
3IO
_H1
IO_G
1IO
_F1
IO_E
1IO
_D1
IO_C
2IO
_G3
IO_D
3IO
_F3
IO_H
6IO
_M2
IO_L
2IO
_L3
IO_K
4IO
_K1
IO_J
3IO
_H2
IO_G
2IO
_F2
IO_E
2IO
_D2
IO_C
1IO
_B1
IO_E
3IO
_F5
VCC
IO3
VCC
IO4
VCC
IO5
VCC
IO3
VCC
IO5
VCC
IO4
VCC
IO3
Dat
e:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
87
BAN
K3,4
,5 I/
O
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
AD
ate:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
87
BAN
K3,4
,5 I/
O
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
AD
ate:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
87
BAN
K3,4
,5 I/
O
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
A
C45
0.1u
F
C42
0.1u
F
SW2 SW
-DIP
4
11
22
33
44
55
66
77
88
R68
4.7K
C47
0.1u
F
C44
0.1u
F
C49
0.1u
F
J8 Hea
der 2
x20
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39C
48
0.1u
F
R71
4.7K
BANK
4
1K-2
K/4K
/7K
|| 2
nd_F
n.
LCM
XO3L
-690
0C-5
BG25
6C
U5E
PL6A
/PL9
A/PL
10A
G1
PL6B
/PL9
B/PL
10B
H2
PL6C
/PL9
C/P
L10C
H4
PL6D
/PL9
D/P
L10D
J6
PL7A
/PL1
0A/P
L11A
H3
PL7B
/PL1
0B/P
L11B
H1
PL7C
/PL1
0C/P
L12A
|| P
CLK
T4_0
J1
PL7D
/PL1
0D/P
L12B
|| P
CLK
C4_
0J3
PL10
C/P
L14C
/PL1
6CJ5
PL10
D/P
L14D
/PL1
6DK6
PL10
A/PL
14A/
PL17
AK3
PL10
B/PL
14B/
PL17
BK2
PL9A
/PL1
3A/P
L15A
J2
PL9B
/PL1
3B/P
L15B
K1
PL9C
/PL1
3C/P
L15C
H5
PL9D
/PL1
3D/P
L15D
J4
VCC
IO4/
VCC
IO4/
VCC
IO4
H7
VCC
IO4/
VCC
IO4/
VCC
IO4
J7C
50
0.1u
F
R69
4.7K
BANK
3
1K-2
K/4K
/7K
|| 2
nd_F
n.
LCM
XO3L
-690
0C-5
BG25
6C
U5D
PL11
A/PL
16A/
PL19
AL1
PL11
B/PL
16B/
PL19
BL3
PL11
C/P
L16C
/PL1
9CK4
PL11
D/P
L16D
/PL1
9DL5
PL12
C/P
L17C
/PL2
1CK5
PL12
D/P
L17D
/PL2
1DL4
PL12
A/PL
17A/
PL22
A ||
PCLK
T3_0
L2
PL12
B/PL
17B/
PL22
B ||
PCLK
C3_
0M
1
PL14
A/PL
20A/
PL25
AM
2
PL14
B/PL
20B/
PL25
BN
3
PL14
C/P
L20C
/PL2
5CR
1
PL14
D/P
L20D
/PL2
5DP2
VCC
IO3/
VCC
IO3/
VCC
IO3
M4
PL13
C/P
L18C
/PL2
3CN
2
PL13
D/P
L18D
/PL2
3DP1
PL13
A/PL
19A/
PL24
AM
3
PL13
B/PL
19B/
PL24
BN
1
BANK
5
1K-2
K/4K
/7K
|| 2
nd_F
n.
LCM
XO3L
-690
0C-5
BG25
6C
U5F
PL1C
/PL2
C/P
L2C
B1
PL1D
/PL2
D/P
L2D
C2
PL1A
/PL3
A/PL
3A ||
L_G
PLLT
_FB
D3
PL1B
/PL3
B/PL
3B ||
L_G
PLLC
_FB
D1
PL2A
/PL4
A/PL
4A ||
L_G
PLLT
_IN
E2
PL2B
/PL4
B/PL
4B ||
L_G
PLLC
_IN
E3
PL2C
/PL4
C/P
L4C
C1
PL2D
/PL4
D/P
L4D
D2
PL3A
/PL6
A/PL
6A ||
PC
LKT5
_0E1
PL3B
/PL6
B/PL
6B ||
PC
LKC
5_0
F2
PL3C
/PL6
C/P
L6C
F4
PL3D
/PL6
D/P
L6D
G6
PL5A
/PL8
A/PL
9AG
2
PL5B
/PL8
B/PL
9BG
3
PL5C
/PL8
C/P
L9C
F5
PL5D
/PL8
D/P
L9D
H6
VCC
IO5/
VCC
IO5/
VCC
IO5
E4
PL4C
/PL7
C/P
L7C
G5
PL4D
/PL7
D/P
L7D
G4
PL4A
/PL7
A/PL
8AF3
PL4B
/PL7
B/PL
8BF1
R70
4.7K
C46
0.1u
F
C43
0.1u
F
26
MachXO3L Starter Kit User Guide
Figure 14. Power Decoupling and LEDs
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
LEDs
LAYO
UT L
EDs
IN A
SIN
GLE
ROW
PLAC
E DE
COUP
LING
CAP
ACIT
ORS
CLOS
E TO
THE
U5
POWE
R PI
NS
Note : LEDs are controlled by XO3L I/O Bank 1. When
VCCIO1 is set to a voltage less than 3.3V, observe all I/O
overdrive requirements. Refer to Lattice TN1280
"MachXO3L sysIO Usage Guide" for more information.
VCC
_CO
RE
VCC
_CO
RE
+3.3
V
LED
0Sh
eet[5
]LE
D1
Shee
t[5]
LED
2Sh
eet[5
]LE
D3
Shee
t[5]
LED
4Sh
eet[5
]LE
D5
Shee
t[5]
LED
6Sh
eet[5
]LE
D7
Shee
t[5]
Dat
e:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
88
POW
ER D
ECO
UPL
ING
AN
D L
ED'S
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
AD
ate:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
88
POW
ER D
ECO
UPL
ING
AN
D L
ED'S
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
AD
ate:
Size
Sche
mat
ic R
ev
ofSh
eet
Title
Latti
ce S
emic
ondu
ctor
App
licat
ions
Emai
l: te
chsu
ppor
t@La
ttice
sem
i.com
Phon
e (5
03) 2
68-8
001
-or-
(800
) LAT
TIC
E
Boar
d R
ev
Proj
ect
12-S
EP-1
4
B1.
0
88
POW
ER D
ECO
UPL
ING
AN
D L
ED'S
MAC
HXO
3 St
arte
r Kit
- LC
MXO
3L-6
900C
A
C53
0.1u
F
D5
Red
1 2
R75
1K
C60
0.01
uF
C57
0.01
uF
1K-2
K/4K
/7K
LCM
XO3L
-690
0C-5
BG25
6C
U5G G
ND
/GN
D/G
ND
B2
GN
D/G
ND
/GN
DB1
5
GN
D/G
ND
/GN
DC
3
GN
D/G
ND
/GN
DC
14
GN
D/G
ND
/GN
DD
4
GN
D/G
ND
/GN
DD
13
GN
D/G
ND
/GN
DE5
GN
D/G
ND
/GN
DE1
2
GN
D/G
ND
/GN
DF6
GN
D/G
ND
/GN
DF1
1
GN
D/G
ND
/GN
DH
8
GN
D/G
ND
/GN
DH
9
GN
D/G
ND
/GN
DJ8
GN
D/G
ND
/GN
DJ9
GN
D/G
ND
/GN
DL6
GN
D/G
ND
/GN
DL1
1
GN
D/G
ND
/GN
DM
5
GN
D/G
ND
/GN
DM
12
GN
D/G
ND
/GN
DN
4
GN
D/G
ND
/GN
DN
13
GN
D/G
ND
/GN
DP3
GN
D/G
ND
/GN
DP1
4
GN
D/G
ND
/GN
DR
2
GN
D/G
ND
/GN
DR
15
NC
/NC
/NC
A2
VCC
/VC
C/V
CC
T16
VCC
/VC
C/V
CC
T1VC
C/V
CC
/VC
CK1
0VC
C/V
CC
/VC
CK7
VCC
/VC
C/V
CC
G10
VCC
/VC
C/V
CC
G7
VCC
/VC
C/V
CC
A16
VCC
/VC
C/V
CC
A1
C54
0.1u
F
D6
Red
1 2
R73
1K
C58
0.1u
F
C55
0.1u
F
R78
1K
D7
Red
1 2
C59
0.1u
F
C56
0.1u
F
D8
Red
1 2
R72
1KR
761K
D2
Red
1 2
R74
1K
C52
1uF
D3
Red
1 2
R79
1K D9
Red
1 2
D4
Red
1 2
R77
1K
C51
10uF
27
MachXO3L Starter Kit User Guide
Appendix B. Bill of MaterialsTable 15. MachXO3L Starter Kit Bill of Materials
Item Quantity Reference Value Manufacturer MFG Pin
1 2 C1,C3 4.7 uF Panasonic ECJ-1VB0J475K
2 44 C2,C4,C6,C7,C10,C11,C12,C13,C14,C15,C16,C21,C23,C24,C25,C26,C27,C28,C30,C31,C32,C33,C34,C36,C37,C38,C39,C40,C42,C43,C44,C45,C46,C47,C48,C49,C50,C53,C54,C55,C56,C58,C59,C63
0.1 uF Kemet C0402C104K4RACTU
3 5 C5,C17,C19,C51,C61 10 uF Taiyo Yuden LMK107BJ106MALTD
4 2 C8,C9 18 pF Kemet C0402C180K3GACTU
5 2 C18,C20 22 uF Taiyo Yuden LMK212BJ226MG-T
6 6 C22,C29,C35,C57,C60,C64 0.01 uF Kemet C0402C103J4RACTU
7 1 C41 100 nF Murata GRM155R61A104KA01D
8 2 C52,C62 1 uF Kemet C0402C105K9PACTU
9 2 C65,C66 150 pF Kemet C0402C104K4RACTU
10 1 D1 Blue LITE-On INC LTST-C190TBKT
11 8 D2,D3,D4,D5,D6,D7,D8,D9 Red LITE-On INC LTST-C190KRKT
12 1 J1 Header 1 x 8 Molex 0022284081
13 1 J2 Mini USB-B Neltron 5075BMR-05-SM-CR
14 4 J3,J4,J6,J8 Header 2 x 20 Samtec TSW-120-07-G-D
16 1 J7 Header 1 x 6 Samtec TSW-106-07-F-S-ND
17 5 L1,L2,L3,L4,L5 600 Ohm 500 mA
Murata BLM18AG601SN1D
18 8 R1,R2,R3,R45,R68,R69,R70,R71 4.7 K Vishay CRCW06034K70FKEA
19 13 R4,R5,R6,R7,R23,R30,R35,R42,R67,R81,R83, R84,R85
0 Yageo RC0603JR-070RL
20 2 R8,R9 2.2 K Vishay CRCW06032K20FKEA
21 2 R10,R19 12 K Yageo RC0603FR-0712KL
22 7 R11,R12,R13,R64,R65,R66,R80 10 K Stackpole Electronics Inc RMCF0603JT10K0
23 13 R14,R15,R16,R17,R18,R20,R21,R22,R27,R62, R82,R91,R92
0 Yageo RC0603JR-070RL
24 7 R24,R25,R26,R31,R32,R37,R38 1 Vishay CRCW06031R00JNEAHP
25 7 R28,R29,R33,R34,R39,R40,R86 1 Vishay CRCW06031R00JNEAHP
26 1 R36 100 Yageo RC0603FR-07100RL
27 10 R41,R63,R72,R73,R74,R75,R76,R77,R78,R79
1 K Yageo RC0603FR-071KL
28 2 R43,R44 2 K Vishay CRCW06032K00JNEA
29 16 R46,R47,R48,R49,R50,R51,R52,R53,R54,R55,R56,R57,R58,R59,R60,R61
100 Yageo RC0402FR07100RL
30 2 R87,R88 49.9 Vishay CRCW060349R9FKEA
31 2 R89,R90 150 Vishay CRCW0603150RJNEA
32 1 SW1 E-Switch TL1015AF160QG
33 1 SW2 DIP CTS Electrocomponents 195-4MST
35 1 U1 FTDI FT2232HL
36 1 U2 Microchip 93LC56C-I/SN
37 1 U3 Fairchild Semi FAN1112SX
28
MachXO3L Starter Kit User Guide
38 1 U4 On Semi NCP1117ST33T3G
39 1 U5 Lattice semi LCMXO3L-6900C-5BG256C
40 1 U6 Spansion S25FL204K0TMFI041
41 1 X1 12 MHz TXC 7M-12.000MAAJ-T
Table 15. MachXO3L Starter Kit Bill of Materials (Continued)
Item Quantity Reference Value Manufacturer MFG Pin
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