Introduction to AVR ATMega32 Architecture
Plasticcase
Pins
Chip
Module 2
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• Architecture– attributes of a system visible to a programmer
– these attributes have a direct impact on the logical execution of a program
• Instruction set, number of bits used for data representation, I/O mechanisms, addressing techniques
– Design issue: whether a computer will have a specific instruction.
• e.g. Is there a multiply instruction?
Processor Architecture & Organization
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• Organization– the operational units and their interconnections that
realize the architectural specifications • (how features are implemented)
– hardware details that are transparent to the programmers
– Control signals, interfaces, memory technology– Design issue: how this instruction is to be
implemented.• Is there a hardware multiply unit or is it done by
repeated addition?• Split caches or unified cache
Processor Architecture & Organization
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Processor Architecture & Organization
• Many computer manufacturers offer a family of computer models, all with the same architecture but with differences in organization.
• This gives code compatibility (at least backwards)– All Intel x86 family share the same basic architecture– The IBM System/370 family share the same basic
architecture• An architecture may survive many years, but its organization
changes with the changing technology.– E.g. the IBM Systems/370 architecture, with few
enhancements, has survived to this day as the architecture of IBM's mainframe product line.
Introduction to Atmel AVR
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• Atmel Corporation is a manufacturer of semiconductors, founded in 1984.
• Atmel introduced the first 8-bit flash microcontroller in 1993, based on the 8051 core.
• In 1996, a design office was started in Trondheim, Norway, to work on the AVR series of products.
• Its products include microcontrollers (including 8051 derivatives and AT91SAM and AT91CAP ARM-based micros), and its own Atmel AVR and AVR32 architectures.
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Introduction to Atmel AVR• The AVR architecture was conceived by two students at the Norwegian
Institute of Technology (NTH) Alf-Egil Bogen and Vegard Wollan.
• The AVR is a modified Harvard architecture 8-bit RISC single chip microcontroller which was developed by Atmel in 1996. The AVR was one of the first microcontroller families to use on-chip flash memory for program storage, as opposed to one-time programmable ROM, EPROM, or EEPROM used by other microcontrollers at the time.
• The AVR is a modified Harvard architecture machine where program and data is stored in separate physical memory systems that appear in different address spaces, but having the ability to read data items from program memory using special instructions.
• Atmel says that the name AVR is not an acronym and does not stand for anything in particular. The creators of the AVR give no definitive answer as to what the term "AVR" stands for. However, it is commonly accepted that AVR stands for Alf (Egil Bogen) and Vegard (Wollan)'s Risc processor"
Harvard architecture
Address bus
Data bus
Control bus
Address bus
Data bus
Control bus
CPU Address bus
Data bus
Control bus
DataMemory
CodeMemory
CPUCode
MemoryData
Memory
Von Neumann architecture
Von Neumann vs. Harvard architecture
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CISC RISCEmphasis on hardware Emphasis on software
Include multi-clock complex instructions Include single-clock reduce instruction only
Memory-to-memory: “Load” and “Store” incorporated in instructions
Register-to-register: “Load” and “Store” are independent instructions
Small code sizes, high cycles per second Low cycles per second, large code sizes
Transistors used for storing complex instructions
Spends more transistors on memory registers
• RISC vs. CISC is a topic quite popular on the Net. Every time Intel (CISC) or Apple (RISC) introduces a new CPU, the topic pops up again.
• Most PC's use CPU based on CISC architecture. For instance Intel and AMD CPU's are based on CISC architectures.
• Many claim that RICS is the architecture of the future.
• But even though RISC has been in the market since 1980, it hasn’t managed to kick CISC out of the picture, some argue that if it is really the architecture of the future it should have been able to do this by now.
Processor ISA: RISC versus CISC
AVR different groups
• Classic AVR– e.g. AT90S2313, AT90S4433
• Mega– e.g. ATmega8, ATmega32, ATmega128
• Tiny– e.g. ATtiny13, ATtiny25
• Special Purpose AVR– e.g. AT90PWM216,AT90USB1287
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ATmega128
ATtiny44
Atmel group Flash =128K
Atmel Flash =4K
AT90S4433
Atmel Classic
groupFlash =4KTiny
group
Let’s get familiar with the AVR part numbers
ATMega32 Pin out & Descriptions
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These pins are used to connect
external crystal or RC oscillator
Provides supply voltage to the
chip. It should be connected to +5
Supply voltage for ADC and portA.
Connect it to VCC
Clears all the registers and
restart the execution of
program
Reference voltage for ADC
Port APort B
Port DPort C
ATMega32 Pin out & Descriptions
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ATMega32 Pin out & Descriptions
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ATMega32 Pin out & Descriptions
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Digital IO is the most fundamental mode of connecting a MCU to external world. The interface is done using what is called a PORT. A port is the point where internal data from MCU chip comes out or external data goes in. They are present is form of PINs of the IC. Most of the PINs are dedicated to this function and other pins are used for power supply, clock source etc . ATMega32 ports are named PORTA, PORTB, PORTC, and PORTD.
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ATMega32 Pin out & Descriptions
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Mega32/Mega16
(XCK/T0) PB0(T1) PB1
(INT2/AIN0) PB2(OC0/AIN1) PB3
(SS) PB4(MOSI) PB5(MISO) PB6(SCK) PB7
RESETVCC
XTAL2GND
XTAL1(RXD) PD0(TXD) PD1(INT0) PD2(INT1) PD3
(OC1B) PD4(OC1A) PD5
(ICP) PD6
PA0 (ADC0)PA1 (ADC1)PA2 (ADC2)PA3 (ADC3)PA4 (ADC4)PA5 (ADC5)PA6 (ADC6)PA7 (ADC7)AREFAGND
PC7 (TOSC2)AVCC
PC6 (TOSC1)PC5 (TDI)PC4 (TDO)PC3 (TMS)PC2 (TCK)PC1 (SDA)PC0 (SCL)PD7 (OC2)
DDRAPORTA
PINA
DD
RB
PIN
B
PO
RT
B
DDRCPORTC
PINC
ATMega32 Pin out & Descriptions
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ATMega32 Pin out & Descriptions
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Defining a pin as either Input or Output – The DDRx Registers
LDI R20,0xFF ;R20 = 0b01110101 (binary)OUT PORTx,R20 ;PORTA = R20OUT DDRx,R20 ;DDRA = R20
DDRx = 0b01110101; /* Configuring I/O pins of portb */
ATMega32 Pin out & Descriptions
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Case 1 : To make a pin go high or low ( if it is an output pin)- Data Register PORTx
ATMega32 Pin out & Descriptions
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Pull-up resistors are used in electronic logic circuits to ensure that inputs to logic systems settle at expected logic levels if external devices are disconnected or high-impedance
PINx.n
vcc
PORTx.n1 = Close
0 = Open
pin n of port x
Inside the AVR chip
Outside the AVR chip
ATMega32 Pin out & Descriptions
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Case 2 : To activate / Deactivate pull up resistors-Data Register PORTx
Out 0
pull-up
high impedance
PORTx
Out 1
0
1
DD
Rx
0 1
PORTx.n
PINx.n
DDRx.n
ATMega32 Pin out & Descriptions
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The PINx register gets the reading from the input pins of the MCU
AVR Architecture
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ATMega32 Architecture
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• Native data size is 8 bits (1 byte).
• Uses 16-bit data addressing allowing it to address 216 = 65536 unique addresses.
• Has three separate on-chip memories
• 2KB SRAM• 8 bits wide used
to store data• 1KB EEPROM
• 8 bits wide used for persistent data storage
• 32KB Flash• 16 bits wide
used to store program code
• I/O ports A-D• Digital input/output• Analog input• Serial/Parallel• Pulse accumulator
ATMega32 Programmer Model: Memory
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1. 2KB SRAM – For temporary data storage– Memory is lost when power is shut
off (volatile)– Fast read and write
2. 1KB EEPROM – For persistent data storage– Memory contents are retained
when power is off (non-volatile)– Fast read; slow write– Can write individual bytes
3. 32KB Flash Program Memory – Used to store program code– Memory contents retained when
power is off (non-volatile)– Fast to read; slow to write– Can only write entire “blocks” of
memory at a time– organized in 16-bit words
(16KWords)
ATMega32 Programmer Model: Memory
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Type Flash RAM EEPROMF_END Size, kB RAMEND Size, kB E_END Size, kB
Atmega8 $0FFF 8 $045F 1 $1FF 0.5Atmega32 $3FFF 32 $085F 2 $3FF 1Atmega64 $7FFF 64 $10FF 4 $7FF 2Atmega128 $FFFF 128 $10FF 4 $FFF 4
• AVR microcontrollers are Harvard architecture. This means, that in this architecture are separate memory types (program memory and data memory) connected with distinct buses. Such memory architecture allows processor to access program memory and data memory at the same time. This increases performance of MCU comparing to CISC architecture, where CPU uses same bus for accessing program memory and data memory.
• Each memory type has its own address space:
ATMega32 Programmer Model: Program Memory
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Flash Memory Layout
ATMega32 Programmer Model: Data Memory
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• ATmega32 contains 1024 bytes of data EEPROM memory.• It is organized as a separate data space, in which single
bytes can be read and written.• The EEPROM has an endurance of at least 100,000
write/erase cycles.• Different chip have different size of EEPROM memory
Chip Bytes Chip Bytes Chip Bytes
ATmega8 512 ATmega16 512 ATmega32 1024ATmega64 2048 ATmega128 4096 ATmega256RZ 4096
ATmega640 4096 ATmega1280 4096 ATmega2560 4096
EEPROM
ATMega32 Programmer Model: Data Memory
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• GPRs (general purpose registers),
• Special Function Registers (SFRs), and
• Internal data SRAM.
The data memory is composed of three parts:
ATMega32 Programmer Model: Internal SRAM
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• Internal data SRAM is widely used for storing data and parameters by AVR programmers and C compilers.
• Each location of the SRAM can be accessed directly by its address.
• Each location is 8 bit wide and can be used to store any data we want.
• Size of SRAM is vary from chip to chip, even among members of the same family.
ATMega32 Programmer Model: Registers
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ATMega32 Programmer Model: Registers (GPRs)
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The fast-access Register file contains 32 x 8-bit general purpose working registers with a single clock cycle access time. This allows single-cycle Arithmetic Logic Unit (ALU) operation. In a typical ALU operation, two operands are output from the Register file, the operation is executed, and the result is stored back in the Register file –in one clock cycle.”
ATMega32 Programmer Model: Registers (GPRs)
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“Six of the 32 registers can be used as three 16-bit indirect address register pointers for Data Space addressing –enabling efficient address calculations. One of the these address pointers can also be used as an address pointer for look up tables in Flash Program memory. Theseadded function registers are the 16-bit X-register, Y-register and Z-register, described later.”
ATMega32 Programmer Model: Registers (GPRs)
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The R26..R31 registers have some added functions to their general purpose usage. These registers are 16-bit address pointers for indirect addressing of the Data Space. The three indirect address registers X, Y, and Z are shown above.
In the different addressing modes these address registers have functions as fixed displacement, automatic increment, and automatic decrement
ATMega32 Programmer Model: I/O Registers (SFRs)
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• The I/O memory is dedicated to specific functions such as status register, timers, serial communication, I/O ports, ADC and etc.
• Function of each I/O memory location is fixed by the CPU designer at the time of design. (because it is used for control of the microcontroller and peripherals)
• AVR I/O memory is made of 8 bit registers.
• All of the AVRs have at least 64 bytes of I/O memory location. (This 64 bytes section is called standard I/O memory)
• In other microcontrollers, the I/O registers are called SFRs (Special Function Registers)
NameAddressI/O Mem.$00 $20 TWBR$01 $21 TWSR
$04 $24 ADCL$05 $25 ADCH
$02 $22 TWAR$03 $23 TWDR
$06 $26 ADCSRA$07 $27 ADMUX$08 $28 ACSR$09 $29 UBRRL$0A $2A UCSRB$0B $2B UCSRA$0C $2C UDR$0D $2D SPCR$0E $2E SPSR$0F $2F
PIND$10 $30DDRD$11 $31
PORTD$12 $32PINC$13 $33DDRC$14 $34
PORTC$15 $35
PINB$16 $36DDRB$17 $37
PORTB$18 $38PINA$19 $39DDRA$1A $3A
PORTA$1B $3BEECR$1C $3CEEDR$1D $3DEEARL$1E $3EEEARH$1F $3F
SPDR
NameAddressI/O Mem.
NameAddressI/O Mem.
UBRRC$20 $40
UBRRH$21 $41 WDTCR$22 $42 ASSR$23 $43 OCR2$24 $44 TCNT2$25 $45 TCCR2$26 $46 ICR1L$27 $47 ICR1H$28 $48 OCR1BL$29 $49 OCR1BH
OCR1AH$2B $4B
SFIOR$30 $50OCDR
$31 $51OSCCAL
$32 $52TCCR0$33 $53
MCUCSR$34 $54MCUCR$35 $55TWCR$36 $56
SPMCR$37 $57TIFR$38 $58
TIMSK$39 $59
TCNT1L$2C $4CTCNT1H$2D $4DTCCR1B$2E $4ETCCR1A$2F $4F
TCNT0
$3A $5AGICR$3B $5BOCR0$3C $5CSPL$3D $5DSPH$3E $5E
GIFR
OCR1AL$2A $4A SREG$3E $5E
ATMega32 Programmer Model: Registers (SP)
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ATMega32 Programmer Model: Registers (SP)
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ATMega32 Programmer Model: Registers (PC)
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Program counter (PC, 16-bit)
Holds address of next program instruction to be executed
Automatically incremented when the ALU executes an instruction
ATMega32 Programmer Model: Registers (SR)
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ATMega32 Programmer Model: Registers (SR)
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ATMega32 Programmer Model: Registers (SR)
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ATMega32 Programmer Model: Registers (SR)
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ATMega32 Programmer Model: Registers (SR)
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ATMega32 Programmer Model: Registers (SR)
CPUPC
ALU
registers
R1R0
R15
R2…
R16R17…
R30R31
Instruction Register
Instruction decoder
SREG: I T H S V N CZ
$0000$0001
$0020
General purpose
RAM(SRAM)
$001F
$005F
TWBRTWSR
SPHSREG
...
General Purpose Registers
Standard IORegisters
$00$01
$3E$3F
$0060
......
Data Address Space
IO Address
...
$FFFF
SREG:
CarryZero
Negative
oVerflow
SignN+VHalf carry
Temporary
Interrupt
H S V N CZTI
Example: Show the status of the C, H, and Z flags after the addition of 0x38 and 0x2F in the following instructions: LDI R16, 0x38 ;R16 = 0x38 LDI R17, 0x2F ;R17 = 0x2F ADD R16, R17 ;add R17 to R16
Solution: 1 $38 0011 1000
+ $2F 0010 1111 $67 0110 0111 R16 = 0x67C = 0 because there is no carry beyond the D7 bit.H = 1 because there is a carry from the D3 to the D4 bit.Z = 0 because the R16 (the result) has a value other than 0 after the addition.
Example: Show the status of the C, H, and Z flags after the addition of 0x9C and 0x64 in the following instructions:
LDI R20, 0x9CLDI R21, 0x64ADD R20, R21 ;add R21 to R20
Solution: 1 $9C 1001 1100
+ $64 0110 0100 $100 1 0000 0000 R20 = 00C = 1 because there is a carry beyond the D7 bit.H = 1 because there is a carry from the D3 to the D4 bit.Z = 1 because the R20 (the result) has a value 0 in it after the addition.
Example: Show the status of the C, H, and Z flags after the subtraction of 0x23 from 0xA5 in the following instructions:
LDI R20, 0xA5LDI R21, 0x23SUB R20, R21 ;subtract R21 from R20
Solution: $A5 1010 0101
- $23 0010 0011$82 1000 0010 R20 = $82
C = 0 because R21 is not bigger than R20 and there is no borrow from D8 bit.Z = 0 because the R20 has a value other than 0 after the subtraction.H = 0 because there is no borrow from D4 to D3.
Example: Show the status of the C, H, and Z flags after the subtraction of 0x73 from 0x52 in the following instructions:
LDI R20, 0x52LDI R21, 0x73SUB R20, R21 ;subtract R21 from R20
Solution: $52 0101 0010
- $73 0111 0011$DF 1101 1111 R20 = $DF
C = 1 because R21 is bigger than R20 and there is a borrow from D8 bit.Z = 0 because the R20 has a value other than zero after the subtraction.H = 1 because there is a borrow from D4 to D3.
Example: Show the status of the C, H, and Z flags after the subtraction of 0x9C from 0x9C in the following instructions:
LDI R20, 0x9CLDI R21, 0x9CSUB R20, R21 ;subtract R21 from R20
Solution: $9C 1001 1100
- $9C 1001 1100$00 0000 0000 R20 = $00
C = 0 because R21 is not bigger than R20 and there is no borrow from D8 bit.Z = 1 because the R20 is zero after the subtraction.H = 0 because there is no borrow from D4 to D3.
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