Chapter 12
IMPLEMENTATION OF COMBINATIONAL LOGIC BY
STANDARD ICs and PROGRAMMABLE ROM
MEMORIES
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 2
Lesson 1
STANDARD ICs FOR DESIGN IMPLEMENTATION
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 3
Outline
• Design by standard ICs• Adder/Subtractor IC• Decoder IC• Encoder IC • Multiplexer IC• Magnitude Comparator
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 4
Standard ICs for a combinational circuit• Binary arithmetic circuits, • Decoders, • Encoders, • Multiplexers, • Code converters, • Digital comparator for magnitude and equality,• Parity generators and checkers • Bit wise ‘AND’, ‘OR’, ‘NOT’ logic processing
circuits.
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 5
Outline
• Design by standard ICs• Adder/Subtractor IC• Decoder IC• Encoder IC • Multiplexer IC
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 6
IC for addition /subtraction
• CMOS based 74HC 83 and TTL 7483 family other ICs —four bits full adders
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 7
Full Adder/Subtractor• 7483 4-bit Full Adder
74834-bit
Full Adder
Vcc
B0-B3
A0-A3
S0-S3
CyCy-1
GND
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 8
Outline
• Design by standard ICs• Adder/Subtractor IC• Decoder IC• Encoder IC • Multiplexer IC• Magnitude Comparator
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 9
IC for Decoder• MSI chip 74138 is 3-line to 8-line (1 of 8)
decoder IC with three control pins G0, G1, and G2. G0, and G1 control pins are activated by '0' and G2 pin is activated by '1'.
• Output logic active state 0• Inactive output state tristate
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 10
Decoder• 74138— 3 to 8 decoder with active output 0 and
tristate remaining pins
74384-bit
Full Adder
Vcc
G0
A0-A2 -A3 Y0-Y7
G2
GND
G1
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 11
Outline
• Design by standard ICs• Adder/Subtractor IC• Decoder IC• Encoder IC • Multiplexer IC• Magnitude Comparator
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 12
IC for encoder
• CMOS based 74HC148 and TTL 74148 family other ICs —8:3 encoder with one active ‘0’ gate enable pin and one active ‘0’ out enable pin
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 13
8:3 Encoder• 74148
741484-bit
Encoder
Vcc
I0-I7F0-F2
OEG
GND
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 14
Outline
• Design by standard ICs• Adder/Subtractor IC• Decoder IC• Encoder IC • Multiplexer IC• Magnitude Comparator
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 15
IC for Multiplexer
• CMOS based 74HC 156 and TTL 74156 family other ICs —4 to 1 multiplexer
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 16
Multiplexer• 74156 MUX Vcc
I0-I3 F
A1GND
Strobe
A0
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 17
Outline
• Design by standard ICs• Adder/Subtractor IC• Decoder IC• Encoder IC • Multiplexer IC • Magnitude Comparator
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 18
IC for Magnitude Comparator
• 7485 4-bit Digital Magnitude Comparator
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 19
Full Adder/Subtractor• 7485 Digital Comparator
7485Digital
MagnitudeComparator
Vcc
B0-B3
A0-A3A>B
GND
A>BA=B
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 20
Summary
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 21
We learnt ICs for • Full adder/subtractor• Decoder• Encoder• Multiplexer• Magnitude comparator
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 22
End of Lesson 1
STANDARD ICs FOR DESIGN IMPLEMENTATION
Ch12L1-"Digital Principles and Design", Raj Kamal, Pearson Education, 2006 23
THANK YOU
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