EASWARI ENGINEERING COLLEGEDEPARTMENT ofELECTRONICS AND COMMUNICATION ENGINEERING
LABORATORY MANUAL
AY(2014-15)
Lab Name: CIRCUITS & SIMULATION INTEGRATED LABLab Code: EC6411Semester : IVYear: 2nd Year
Prepared By Approved ByJayasanthi Sambbandam,S.Sridharan,R.Vidhya HOD/ECE
EC 6411 CIRCUITS & SIMULATION INTEGRATED LAB L T P C0 0 3 2DESIGN OF FOLLOWING CIRCUITS1. Series and Shunt feedback amplifiers: Frequency response, Input and output impedance 2. RC Phase shift oscillator, Wien Bridge Oscillator3. Hartley Oscillator, Colpitts Oscillator4. Single tuned Amplifier5. RC Integrators, Differentiators6. Astable and monostable multivibrators7. Clippers and Clampers8. Free running blocking oscillator
SIMULATION USING PSPICE:1. Tuned collector oscillator2. Wien Bridge Oscillator3. Double and stagger tuned amplifier4. Bistable multivibrators5. Schmitt trigger with predictable hysteresis6. Monostable multivibrators with emitter and base timing7. Voltage and current time base circuits.Lab requirements for a batch of 30 studentsCRO- 15 Nos.Signal generator/Function generator- 15 Nos.Dual Regulated power supply- 15 NosDigital multimeter- 15 Nos.Digital LCR meter- 2 Nos.Stanalone desktops PC- 15 Nos.Transistor/FET (BJT-NPN-PNP and NMOS / PMOS)- 50 Nos.
Components and Accessories:Transistors,Resistors,Capacitors,Inductors,Diodes,Zenerdiodes,Bread Boards,Transformers,SPICE Circuit Simulation software (any public domain or Commercial software)EC 6411 - Circuits and Simulation Integrated LabLIST OF EXPERIMENTS
CYCLE I
1. Feed Back Amplifiers (Series and Shunt)2. Transistor RC Phase Shift Oscillator3. Hartley Oscillator and Colpitts Oscillator4. Single Tuned Amplifier5. a. RC Integrators, Differentiatorsb. Clippers And Clampers6. Astable Multivibrator.SIMULATION USING PSPICE:7. Double and stagger tuned amplifier8. Schmitt trigger with predictable hysteresis9. Voltage and current time base circuits.
CYCLE II10. Weinbridge Oscillator11. Free running blocking oscillator 12. Monostable multivibratorsSIMULATION USING PSPICE:13. Tuned collector oscillator and Wien Bridge Oscillator14. Bistable multivibrator and Monostable multivibrators with emitter and base timing INDEX
S.noDate
Experiment namePage no.Marks obtainedFaculty sigN
1. Feed Back Amplifiers
Aim: To design and construct the Current Series and Voltage Shunt feedback amplifiers. To plot the frequency response and To calculate the following parameters.1. Mid Band Gain. 2. Bandwidth and Cutoff Frequencies. 3. Input and Output Impedance
Apparatus Required:
S.NoItemRangeQty
1TransistorBC 1471
2Resistor1
3Capacitor
4CRO (0-30) MHz1
5RPS (0-30) V1
6Function Generator (0 1) MHz1
7Ammeters(0-5) mA (ac), (0-200) A (ac)1 each
Theory:
Circuit Diagram:
CURRENT SERIES FEEDBACK AMPLIFIER+VCC
R1 RC Co Cin + - B- BC107
CRO ERLVo CE Vin R2 RE F.G
Current Series Feedback Design: Design specification:
VCC = , = , f = ,RL = , Ic =, hie= ,VBE = 0.7 V S= Assume IE = IC VCE = VCC / 2 = VE = VCC / 10 =RE = VE / IE =RC = (VCC - VCE - VE)/ IC =VB = VBE + VE =VB = VCC * R2 /( R1+R2 )R2 /( R1+R2 )= VB / VCCS=1+ RB / RERB =R1* R2 /( R1+R2 ) = RBR1=R2=Input Impedance Zin = ( RBhie ) = Coupling and bypass capacitors can be thus found out.Input coupling capacitor is given by XCin = Z in/ 10 =XCin = 1/ 2fCin=Cin = 1/ 2f XCin =output coupling capacitor is given by , Zo = (Rc RL) =Xco= Zo / 10 =XCo = 1/ 2 f Co =Co = 1/ 2 f XCo =By-pass capacitor is given by , XCE = hie / 1+ hfeXCE = 1/ 2fCECE = 1/ 2f XCE =Av=hfe * RL eff/hieRL eff =(Rc RL) =Design (With feedback):
Remove the emitter capacitance (CE) = -1 / RE =Gm = - hfe/ [(hie + RE ) RB] =D = 1+ Gm =Gmf = Gm / D =Voltage gain=Avf= -hfeRc hie+ hfeRE Zif = Z iD =Zof = ZoD =
Observation: Vin = mV
Frequency(Hz)
Output voltage Vo (volts)Gain Av=20 log (Vo/Vi)(dB)
Without F/BWith F/BWithout F/BWith F/B
Input Impedance : Output Impedance :
Voltage Shunt Feedback Amplifier Design (With Feedback):Connect the feedback resistance (Rf) and feedback capacitor (Cf) as shown in the figure.Assume, Rf = 68 KXCf = Rf / 10 =Cf = Rf / 2f XCf = = -1 / Rf =Transresistance=Rm=(Rc RL Rf) (Rs Rf) (Rs RB Rf)D = 1+ Rm =Rmf = Rm / D =Voltage gain=Avf= Rmf/RsZif = Z i/D =Zof = Zo/D =Circuit Diagram:VOLTAGE SHUNT FEEDBACK AMPLIFIER+VCC
R1 Rf Cf Rc Co Cin B
RsBC107
CRO ERLVo CE Vin R2 RE f = 1 KHzObservation: Vin =mV
Frequency(Hz)
O/P voltage Vo (volts)Gain Av=20 log(Vo/Vi)(dB)
Without F/BWith F/BWithout F/BWith F/B
Input Impedance (with feedback) :Output Impedance (with feedback) :Model Graph (With & Without Feedback)
Without feedback 3 dB gain (dB)3dB With feedback
f3 f1 f2 f4 f(Hz)
f2 f1 = Bandwidth without feedback circuit f4 f3 = Bandwidth with feedback circuitProcedure: The connections are made as shown in the circuit. The amplifier is checked for its correct operation .Set the input voltage to a fixed value. Keeping the input voltage Vary the input frequency from 0Hz to 1MHz and note down the corresponding output voltage. plot the graph : gain (dB) Vs frequency .Calculate the bandwidth from the graph. Remove RE and follow the same procedure. To find out input impedance: Connect DRB in the input side in series with the base of the transistor Initially keep the resistance as 0 Vary F.G to get maximum output Increase the resistance of the DRB such that output reduces to one half of the maximum outputTo find out output impedance: Connect DRB in the output side in shunt with the load resistor Initially keep the resistance as MAX Vary F.G to get maximum output Decrease the resistance of the DRB such that output reduces to one half of the maximum output
Result:
Thus the feedback amplifier was designed, constructed, tested,frequency response was plotted and the following parameters were calculated.
TYPE OF FEEDBACKPARAMETERBANDWIDTHINPUT IMPEDANCEOUTPUT IMPEDANCE
CURRENT SERIESWITH OUT FEEDBACK
WITH FEEDBACK
VOLTAGE SHUNT
2. Transistor RC Phase Shift Oscillator
Aim:To design, construct and test the transistor RC Phase shift oscillator and to obtain its output waveform for the given frequency.
Apparatus Required:
S.NoApparatus NameRangeQty
1TransistorBC 1471
2Resistor
3Capacitor
4CRO( 0 30 ) MHz1
5RPS(0-30) V1
6FunctionGenerator(0-1 )MHz1
Design :
VCC = , = , f = ,RL = , Ic =, hie= ,VBE = 0.7 V S=fT= IE = ICAssume, VCE = VCC / 2 =VE = VCC / 10 =RE = VE / IE =RC = (VCC - VCE - VE)/ IC =VB = VBE + VE =VB = VCC * R2 /( R1+R2 )R2 /( R1+R2 )= VB / VCCS=1+ RB / RERB =R1* R2 /( R1+R2 ) = RBR1=R2=
Input Impedance , Zin = ( RBhie ) = Coupling and bypass capacitors can be thus found out.Input coupling capacitor is given by XCin = Z in/ 10 =XCin = 1/ 2fCin=Cin = 1/ 2f XCin =output coupling capacitor is given by , Zo = (Rc RL) =Xco= Zo / 10 =XCo = 1/ 2 f Co =Co = 1/ 2 f XCo =By-pass capacitor is given by , XCE = hie / 1+ hfeXCE = 1/ 2fCECE = 1/ 2f XCE =
Oscillator DesignFrequency fT = ____________HzfT = 1/ 2 6 RC Assume C = 0.1FR = 1/26 f TC
Circuit Diagram:
Model Graph: Theory:
Procedure:
1. The circuit is constructed as per the given circuit diagram.2. Switch on the power supply and observe the output on the CRO( sine wave)3. Note down the practical frequency and compare it with the theoretical frequency.
Observation:
Amplitude = Time period T = Frequency f p = 1/T = Theoretical frequency fT=Practical frequency fP=
Result:
Thus the RC Phase shift Oscillator designed, constructed, tested, Simulated using Pspice and the output sine waveform is drawn.
Theoretical frequency =
Practical frequency =3a. Hartley Oscillator
Aim :
To design, construct and test the Hartley oscillator and to obtain its output waveform for the given frequency.
Apparatus Required:
S.NoApparatus NameRangeQty
1TransistorBC 1071
2Resistor1
3Capacitor
4CRO(0 30)MHZ1
5
RPS(0-30) V1
6Function Generator(0- 1 ) MHz1
7DLB, DRB1
Theory:
Circuit Diagram:
Design :
VCC = , = , f = ,RL = , Ic =, hie= ,VBE = 0.7 V S= IE = ICAssume, VCE = VCC / 2 =VE = VCC / 10 =RE = VE / IE =RC = (VCC - VCE - VE)/ IC =VB = VBE + VE =VB = VCC * R2 /( R1+R2 )R2 /( R1+R2 )= VB / VCCS=1+ RB / RERB =R1* R2 /( R1+R2 ) = RBR1=R2=Input Impedance , Zin = ( RBhie ) = Coupling and bypass capacitors can be thus found out.Input coupling capacitor is given by XCin = Z in/ 10 =XCin = 1/ 2fCin=Cin = 1/ 2f XCin =output coupling capacitor is given by , Zo = (Rc RL) =Xco= Zo / 10 =XCo = 1/ 2 f Co =Co = 1/ 2 f XCo =By-pass capacitor is given by , XCE = hie / 1+ hfeXCE = 1/ 2fCECE = 1/ 2f XCE =
Hartley Oscillator DesignFrequency f = ____________Hzf = 1/ 2 LC
Assume,C = 0.1microFL = L1 + L2 L1=L2=Model Graph:
Procedure:
1. The circuit connection is made as per the circuit diagram. 2. Switch on the power supply and observe the output on the CRO (sine wave). 3. Note down the practical frequency and compare it with the theoretical frequency.
Observation:
Amplitude = Time period T = Frequency f p = 1/ T = Theoretical frequency fT=Practical frequency fP=
Result:
Thus the Hartley Oscillator was designed, constructed and the output sine waveform was observed.
Theoretical frequency =
Practical frequency =
3 b. Colpitts Oscillator Aim :
To design, construct and test the Colpitts Oscillator and to obtain its output waveform for the given frequency.
Apparatus Required: S.NoApparatus NameRangeQty
1TransistorBC 1071
2Resistor1
3Capacitor
4CRO(0 30)MHZ1
5
RPS(0-30) V1
6Function Generator(0- 1 ) MHz1
7DLB, DRB1
Theory:
Circuit Diagram:
Design :
VCC = , = , f = ,RL = , Ic =, hie= ,VBE = 0.7 V S= Assume IE = IC VCE = VCC / 2 =VE = VCC / 10 =RE = VE / IE =RC = (VCC - VCE - VE)/ IC =VB = VBE + VE =VB = VCC * R2 /( R1+R2 )R2 /( R1+R2 )= VB / VCCS=1+ RB / RERB =R1* R2 /( R1+R2 ) = RBR1=R2=Input Impedance , Zin = ( RBhie ) = Coupling and bypass capacitors can be thus found out.Input coupling capacitor is given by XCin = Z in/ 10 =XCin = 1/ 2fCin=Cin = 1/ 2f XCin =output coupling capacitor is given by , Zo = (Rc RL) =Xco= Zo / 10 =XCo = 1/ 2 f Co =Co = 1/ 2 f XCo =By-pass capacitor is given by , XCE = hie / 1+ hfeXCE = 1/ 2fCECE = 1/ 2f XCE =
Colpitts Oscillator Design:
Frequency f = ____________Hzf = 1/ 2 LCAssume C1 = 0.1microF, C2 = 0.1microFC = C1C2 /(C1+C2)L =Model Graph:
Observation:
Amplitude = Time period T = Frequency f p = 1/T = Theoretical frequency fT=Practical frequency fP=Result:
Thus the Colpitts Oscillator was designed, constructed and the output sine waveform was observed.
Theoretical frequency =
Practical frequency =4. Single Tuned AmplifierAim:To design, construct and test the operation of Single Tuned Amplifier and to obtain its frequency response.Apparatus Required:S.NoApparatus NameRangeQty
1TransistorBC 1071
2Resistor1
3Capacitor21
4CRO-1
5RPS(0-30) V1
6FunctionGenerator-1
Theory:
Circuit Diagram
Design :
VCC = , = , f = ,RL = , Ic =, hie= ,VBE = 0.7 V S= FT = IE = ICAssume, VCE = VCC / 2 =VE = VCC / 10 =RE = VE / IE =VB = VBE + VE =VB = VCC * R2 /( R1+R2 )R2 /( R1+R2 )= VB / VCCS=1+ RB / RERB =R1* R2 /( R1+R2 ) = RBR1=R2=Input Impedance , Zin = ( RBhie ) = Coupling and bypass capacitors can be thus found out.Input coupling capacitor is given by XCin = Z in/ 10 =XCin = 1/ 2fCin=Cin = 1/ 2f XCin =output coupling capacitor is given by , Zo = QL *XLRL As QL *XL is largeZo = RL
Xco= Zo / 10 =XCo = 1/ 2 f Co =Co = 1/ 2 f XCo =By-pass capacitor is given by , XCE = hie / 1+ hfeXCE = 1/ 2 fCECE = 1/ 2 f XCE =Theoretical frequency, f T= 1/(2 LC) C=0.1uF
L=
Model Graph:
Procedure:1.The connections are given as per the circuit diagram.2.Connect the CRO in the output and trace the waveform.3.Calculate the practical frequency and compare with the theoretical frequency4.Plot the waveform obtained and calculate the bandwidth
Observation:
Vin =
Frequency(Hz)Output Voltage,Vo(Volts)GainAv=20 log (Vo/Vi)(dB)
Bandwidth = f 2 f 1
Result:Thus the Single Tuned Amplifier is designed, constructed, tested and the frequency response was plotted.
Theoretical bandwidth =
Practical bandwidth =
5a. Integrator and Differentiator5b. Clipper and Clamper
Aim:
To construct and verify the operation of Integrator, Differentiator, Clippers and Clampers.
Apparatus Required:
Apparatus NameRangeQuantity
Audio OscillatorCROResistorsCapacitorBreadboardRPS
11111
Theory:
Integrator and differentiator:
Clipper and Clamper:
Circuit Diagram:
Design for Integrator:TRCFor R = 1K and C =0.1 uFT>> 10-4 sIf T = 10us,,then the above condition is satisfiedf = 1/T = 1/ 10*10-6 = 100KHz
Model Graph
Integrator
ClippersNegative Clipper Positive Clipper
Model Graph
Positive Clipper Negative Clipper
ClampersNegative Clamper Positive Clamper.
VinCROD6120.1 FVinCROD6120.1 F
Model Graph Positive Clamper Negative Clamper
Procedure:
1.Connections are given as per the circuit diagram. 2.The resistance Rcomp is also connected to the (+) input terminal to minimize the effect of the input bias circuit.3.It is noted that the gain of the integrator decreases with increasing frequency. 4.Thus the integrator circuit does not have any high frequency problem.
Result :Thus the integrator, differentiator, clipper and clamper circuits were constructed and their outputs were observed.
6. Astable MultivibratorAim :To design, construct and test an astable multivibrator for the given frequency and to obtain its output waveforms.
Apparatus Required : S.NoItemRangeQty
1TransistorBC1072
2Resistor22
3Capacitor2
4RPS(0-30) V1
5CRO-1
Theory :
Circuit Diagram: +VCC
RC R R RC C CVC1 BC147 BC147 VC2
Design Specification:Given VCC = ; IC =; h FE = ; f = VCE(sat) = 0.2 VRC = VCC VCE(sat) / IC RC = T= 1/f =Choose C = 0.01fT = 1.38 RC = R =Procedure:
1. The connections are given as per the circuit diagram. 2. Switch on the power supply.3. Observe the waveform both at bases and collectors of Q1 and Q2.4. Connect the CRO in the output of Q1 and Q2 and trace the square waveform.Model Graph :
Result: Thus the Astable multivibrator circuit is designed, constructed, tested, Simulated using Pspice and the output waveforms are drawn
Theoretical frequency =Practical frequency =
7. Double and stagger tuned amplifierAim : To simulate Double and stagger tuned amplifier using PSPICE and to study its frequency response.
Apparatus required:PC with ORCAD suiteTheory:
Circuit diagram for Double tuned amplifier
Simulation output
Circuit diagram for stagger tuned amplifier
Simulation output
Procedure:1. Open a new project in capture CIS.2. Draw the schematic.3. Do AC sweep analysis.4. Assign start and end frequencies.5. Run simulation6. Observe the frequency response
Result:
Thus the Double and stagger tuned amplifier using PSPICE was simulated and its frequency response was observed.
8. Schmitt trigger with predictable hysteresis
Aim :To simulate Schmitt trigger with predictable hysteresis using PSPICE and to study its time response.
Apparatus required:PC with ORCAD suiteTheory:
Circuit diagram for Schmitt Trigger:
LTP = [ VCC + R1 / R3 (VBEcut in ]*R4 - VBE cut in + VBE [[R12R4/R3] + R3+R4]
UTP = [R4 /(R1+R3 +R4 )] *VCC- VBE cut in + VBE
Hysteresis = UTP - LTP
OUTPUT
Procedure:
1. Open a new project in capture CIS.2. Draw the schematic.3. Do transient analysis.4. Assign run time and step size.5. Run simulation.6. Observe the transient response.
Result:
Thus the Schmitt Trigger using PSPICE was simulated and its output was observed.
9. Voltage and Current time base generators
Aim :To simulate Voltage and Current timebase generators using PSPICE and to study its time response.
Apparatus required:PC with ORCAD suiteTheory:
Circuit diagram for Voltage time base generators:
OUTPUT
Circuit diagram for Current time base generators:
OUTPUT
Procedure:
1. Open a new project in capture CIS.2. Draw the schematic.3. Do transient analysis.4. Assign run time and step size.5. Run simulation.6. Observe the transient response.
Result:
Thus the Voltage and Current timebase generators using PSPICE was simulated and its output was observed.
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