© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 1
Rochester Institute of TechnologyMicroelectronic Engineering
ROCHESTER INSTITUTE OF TECHNOLOGYMICROELECTRONIC ENGINEERING
CMOS Integrated Circuit Test Results
Dr. Lynn Fuller, Ellen Sedlack Microelectronic Engineering
Rochester Institute of Technology 82 Lomb Memorial Drive Rochester, NY 14623-5604 Tel (585) 475-2035 Fax (585) 475-5041
Dr. Fuller’s Webpage: http://www.rit.edu/~lffeee Email: [email protected]
Dept Webpage: http://www.microe.rit.edu
1-16-2009 CMOS_IC_Test.ppt
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 2
Rochester Institute of TechnologyMicroelectronic Engineering
OUTLINE
LayoutSummary of Completed Factory WafersRing OscillatorOperational AmplifierTwo Phase Non-Overlapping Clock2-Input NAND2-Input NOR3-Input NAND3-Input NORFull Adder1 to 4 DeMUX4 to 1 MUXVoltage Doubler
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 3
Rochester Institute of TechnologyMicroelectronic Engineering
MIXED ANALOG DIGITAL CMOS TESTCHIP
Voltage Doubler
EllipticFilter
3 bit D/A
BiQuad Filter
OpAmp 1&22 Phase Clock
Full Adder
Ring Oscillators
4:1 Mux
DeMux
D Master/slave
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
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Rochester Institute of TechnologyMicroelectronic Engineering
SUMMARY OF COMPLETED FACTORY WAFERS
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 5
Rochester Institute of TechnologyMicroelectronic Engineering
RING OSCILLATOR
+V
td = T/2NT = period of oscillationN = number of stagestd = gate delayT = period of oscillation
Vout
Odd # of Stages
Vout
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 6
Rochester Institute of TechnologyMicroelectronic Engineering
RING OSCILLATOR
td = gate delay= 90ns/2/17= 2.6ns
No buffer17 StageL/W = 4/16Vdd = 5V
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 7
Rochester Institute of TechnologyMicroelectronic Engineering
RING OSCILLATOR
73 Stage Ring at 6V, td = 0.228ns
73 Stage Ring at 5V, td = 0.712ns
SMFL CMOS Process
4x buffer
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 8
Rochester Institute of TechnologyMicroelectronic Engineering
OPERATIONAL AMPLIFIER
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 9
Rochester Institute of TechnologyMicroelectronic Engineering
OPERATIONAL AMPLIFIER
+V
-V
Vin+Vout
Vin-
M1 M2
M3
M5
M4
M7
M6
M8
M9
M10
M11
40/10
40/10
L/W40/10
10/20
10/15
10/20 10/20
10/20
10/20
10/15 10/15
dimensions L/W(µm/µm)
p-well CMOS
8
7
6
5
1
2
3
9
4
20
10
Vout
+V=+6
-V=-6
Vin
+
-
Vin-20mV +20mV0
Vos
Slope = Gain
Vout
-6
+6
Set up the HP 4145 to sweep the Vin from -20 mV to +20 mVin 0.001V steps. Measure Gain and Input offset voltage.
Old Version SchematicNew Version has L and W
twice as large
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 10
Rochester Institute of TechnologyMicroelectronic Engineering
AC TEST RESULTS
ROCHESTER INSTITUTE OF TECHNOLOGYMICROELECTRONIC ENGINEERING LFF OPAMP.XLS FILE3B
LOT F960319 OPAMP TEST RESULTS - 1-29-97
Frequency Gain Vout VinhZ dB V mV1 73.9794 10 25 73.53387 9.5 2
100 73.33036 9.28 2200 70.31748 6.56 2300 67.53154 4.76 2400 65.48316 3.76 2500 63.97314 3.16 2600 62.41148 2.64 2700 61.51094 2.38 2800 60.34067 2.08 2900 59.46256 1.88 2
1000 58.68997 1.72 21100 58.0618 1.6 21200 57.50123 1.5 21300 57.14665 1.44 21400 56.5215 1.34 21500 56.1236 1.28 21600 55.56303 1.2 2
50000 20 0.02 2500000 0 0.002 2
10000000 -20 0.0002 2
Op Amp Frequency Response
-20
-10
0
10
20
30
40
50
60
70
80
1 10 100 1000 10000 100000 1000000 10000000
Frequency Hz
Gai
n d
B
GBP = 500,000 Hz
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 11
Rochester Institute of TechnologyMicroelectronic Engineering
CMOS OPERATIONAL AMPLIFIER
SUB-CMOS Process
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 12
Rochester Institute of TechnologyMicroelectronic Engineering
TWO-PHASE CLOCK GENERATORS
CLOCKBAR
Φ1
Φ2
CLOCK Φ1
Φ2
CLOCKBAR
CLOCK
t1
t3
t2
t1
t3
t1
QS
0 0 Qn-10 1 11 0 01 1 INDETERMINATE
RCB
0 0 10 1 01 0 01 1 0
A
S
RQ
t2
=
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
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Rochester Institute of TechnologyMicroelectronic Engineering
TRANSISTOR LEVEL SCHEMATIC OF 2 PHASE CLOCK
+V
Φ1 Φ2
+V
Clock
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 14
Rochester Institute of TechnologyMicroelectronic Engineering
LAYOUT OF TWO PHASE CLOCK
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
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Rochester Institute of TechnologyMicroelectronic Engineering
TWO PHASE NON OVERLAPPING CLOCK
Clock
Φ1
Φ2
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 16
Rochester Institute of TechnologyMicroelectronic Engineering
CMOS 2 INPUT NAND
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 17
Rochester Institute of TechnologyMicroelectronic Engineering
CMOS 2-INPUT NOR
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 18
Rochester Institute of TechnologyMicroelectronic Engineering
CMOS 3-INPUT NAND
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 19
Rochester Institute of TechnologyMicroelectronic Engineering
CMOS 3-INPUT NOR
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 20
Rochester Institute of TechnologyMicroelectronic Engineering
FULL ADDER DESIGN
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
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Rochester Institute of TechnologyMicroelectronic Engineering
FULL ADDER BROKEN VDD CONNECTION
Broken Vdd Connections
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 22
Rochester Institute of TechnologyMicroelectronic Engineering
FULL ADDER TEST RESULTS
A
B
C
SUM
COUT
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 23
Rochester Institute of TechnologyMicroelectronic Engineering
FULL ADDER MISSING N-SELECT ON SOME INVERTERS
Gnd
Vdd
Missing N-Select
PMOS NMOS
N-SELECT
Vdd Connection Broken
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 24
Rochester Institute of TechnologyMicroelectronic Engineering
DISCUSSION ON N-SELECT AND P-SELECT
The designer needs only one of n-select or p-select to make the masks needed for CMOS. The design rule checkers can also be made to work with only one of the two select layers. At RIT we use both n-select and p-select in the design to make the design rule checks easier to implement. Thus at RIT both should be available for making the masks. On the next page you find that both n-select and p-select are used in making the masks for the sub-micron CMOS process. On the following page you see that only p-select is used to make the masks. It does not matter how it is done but it has to be done correctly.
RIT SUB-CMOS PROCESS
11 PHOTOLEVELS
POLY
METAL
N-WELL
P SELECTCC
ACTIVE
0.75 µm Aluminum
N-type Substrate 10 ohm-cm
P-well N-well
6000 ÅField Oxide
NMOSFET PMOSFETN+ Poly
Channel Stop
P+ D/SN+ D/S LDDLDD n+ well
contactp+ wellcontact
LVL 1 – n-WELL
LVL 9 - METAL
LVL 4 - PMOS VT
LVL 9 - N+ D/S
LVL 2 - ACTIVE
LVL 8 - P+ D/S
LVL 3 - STOP
LVL 8 - CC
LVL 5 - POLY
LVL 7 – N-LDD
LVL 6 – P-LDD
N SELECT
RIT ADVANCED CMOS PROCESS
POLY
METAL
N-WELL
P SELECTCC
ACTIVE
N SELECT
LVL 2 - NWell
LVL 3 - Pwell
LVL 6 - POLY
LVL 8 - NLDD
LVL 11 - CC
LVL 12 – METAL 1
LVL 9 – N+D/S
LVL 10 – P+D/S
LVL 7 - PLDD
LVL 4 - VTP
NMOSFET PMOSFET
N-wellP-well
N+ Poly
P+ D/SN+ D/S
LDDLDD
n+ wellcontact
p+ wellcontact
P+ PolyLVL 1 - STI
12 PHOTOLEVELS
LVL 5 - VTN
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 27
Rochester Institute of TechnologyMicroelectronic Engineering
1 TO 4 DEMUX DESIGN
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 28
Rochester Institute of TechnologyMicroelectronic Engineering
MISSING P-SELECT ON SOME NOR GATES
P-Select
Missing p-Select
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 29
Rochester Institute of TechnologyMicroelectronic Engineering
1 TO 4 DEMUX TEST RESULTS
Missing p-Select on some 3-NORs
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 30
Rochester Institute of TechnologyMicroelectronic Engineering
4 to 1 MUX
Missing Vdd Pad
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 31
Rochester Institute of TechnologyMicroelectronic Engineering
VOLTAGE DOUBLER
© January 16, 2009 Dr. Lynn Fuller
CMOS IC Test Results
Page 32
Rochester Institute of TechnologyMicroelectronic Engineering
VOLTAGE DOUBLER TEST RESULTS
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