CMOS Analog Design Using All-Region MOSFET Modeling
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CMOS Analog Design Using All-Region MOSFET Modeling
Chapter 1
Introduction to analog CMOS design
CMOS Analog Design Using All-Region MOSFET Modeling
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Important differences between BJTs and MOSFETs
A)BJTs are three-terminal devices and MOSFETs are four-terminal devices
B) Differences in the internal symmetries of the most commonly used BJTs and MOSFETs
C) BJT exponential current law vs. MOS current law
D) The geometric degrees of freedom for MOSFETs in analog design
E) Quality of BJT and MOSFET models
CMOS Analog Design Using All-Region MOSFET Modeling
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Ebers-Moll equivalent circuit of an npn transistor
E
B
RIRFIF
IF IR
IE IC
IB
CDE DC
C F F RI I I
E R R FI I I
( ) (1 ) (1 )B C E F F R RI I I I I
Forward and reverse currents
CMOS Analog Design Using All-Region MOSFET Modeling
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The capacitive model of the MOS structure
1s ox
GB ox b
d C
dV C C n
s
VGB
p- type neutral region
depletion
region
s
VGB
oxC
bC
CMOS Analog Design Using All-Region MOSFET Modeling
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MOSFET: symmetric strong and weak inversion models
strong inversion weak inversion
VDB
p-type substrate
n+ n+
VSB VGBID
D F RI I I
2
( ) ( ) 02F R GB SB DB TI V nV Vn
0 ( ) /
( ) 0GB T SB DB tV V nV n
F R
WI I e
L
ox
WC
L
CMOS Analog Design Using All-Region MOSFET Modeling
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Intrinsic gain stages: common-source and common-emitter amplifiers
CMOS Analog Design Using All-Region MOSFET Modeling
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Small-signal circuit and frequency response of the CS and CE amplifiers
; mo i b
L
gv v
j C
mu
L
g
C
CMOS Analog Design Using All-Region MOSFET Modeling
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Design of the CE and CS amplifiers
BJT
1v uA
2C m t L tI g GB C /BE tVC SI I e
2
0
1
2Dsi ox GB T SB
WI C V V nV
n L
2
2 /m
Dsiox
ngI
C W L
2m u L Lg C GB C
MOSFET
CMOS Analog Design Using All-Region MOSFET Modeling
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Example: GB = 10 MHz, CL = 10 pF = 80·10-6 A/V2, n = 1.35oxC
2 628 A/Vm Lg GB C
1 Strong inversion model. 2 Accurate all-region MOSFET model
W/L IDsi (A)1 ID (A)2
0 22
500 6.6 28.6
100 33.2 55.2
50 66.4 88.4
10 332 354
CMOS Analog Design Using All-Region MOSFET Modeling
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All-region “empirical” model of the MOSFET
6 31.35 628 10 .26 10 22 μWI m tI ng A
1
2 /m
D WI Dsi m tox t
gI I I ng
C W L
/1
/th
D WI
W LI I
W L
/ 2m ox tth
g W L C
22 μD DsiI A I
CMOS Analog Design Using All-Region MOSFET Modeling
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Aspect ratio vs. current excess in a MOSFET design
/1
/th
D WI
W LI I
W L
CMOS Analog Design Using All-Region MOSFET Modeling
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Consistent modeling of MOSFETs and the series association
/ //
/ /S D
eqS D
W L W LW L
W L W L
/ , ,D G S G DeqI W L g V V g V V
CMOS Analog Design Using All-Region MOSFET Modeling
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Series-parallel association of MOSFETs
CMOS Analog Design Using All-Region MOSFET Modeling
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Series association of MOSFETs vs. long-channel MOSFETs
Series association Long-channel
Nominal VT L-dependent VT
Characterize one transistor ( performance of the shortest transistor is “optimized”)
L-dependent characterization
(halo/pocket implants effects)
“Accurate” for current mirrors
L-dependent accuracy
Gate current more predictable
Extrinsic capacitors at intermediate nodes
CMOS Analog Design Using All-Region MOSFET Modeling
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Application of series parallel associations of MOSFETs - M:1 current mirrors
N
M
IO
M : 1
N
N
Iin
Iin
IO
M : 1
M
Iin
IO
M : 1/ M
M
M
CMOS Analog Design Using All-Region MOSFET Modeling
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Current mismatch of two M:1 current mirrors
Arnaud, JSSC Sep. 06
Iin
IO
100 : 1
100
N
100
IO100 : 1
10
Iin
10
CMOS Analog Design Using All-Region MOSFET Modeling
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M-2M Digital-to-Analog converter (1):
A set of 4 transistors can be used as substitute for Mbb
VG
ID1 ID2
ID
ID2a ID2bID1
Ma MbbMba
MbdMbc
MdMc
CMOS Analog Design Using All-Region MOSFET Modeling
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M-2M Digital-to-Analog converter (2):8 bit DAC with M-2M ladder
Q0Q6
DoD Q
ck
Q1
D Q
ck
Q7
D Q
ck
Di
Ck
D Q
ck
M72
M71
M73
Q7
-Q7
-Q7
Q7
M62
M61 M64
M63
Q6
-Q6
-Q6
Q6
M02
M01 M04
M03
Q0
-Q0
-Q0
Q0
MB2
MB1
I0
V0
IG
VG
M00
VR IRIB VB
GB
CMOS Analog Design Using All-Region MOSFET Modeling
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M-2M Digital-to-Analog converter (3):Model of the normalized current mismatch for a 10 μm x 10 μm transistor
CMOS Analog Design Using All-Region MOSFET Modeling
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M-2M Digital-to-Analog converter (4):
CMOS Analog Design Using All-Region MOSFET Modeling
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Top area is the M-2M ladder and the bottom area is the serial register. Klimach, ISCAS 08
M-2M Digital-to-Analog converter (5):
CMOS Analog Design Using All-Region MOSFET Modeling
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Similar approaches to CMOS design
Paul G. A. Jespers; The gm/ID Design Methodology for CMOS Analog Low Power Integrated Circuits 2009, ISBN: 978-0-387-47100-6 D. M. Binkley; Tradeoffs and Optimization in Analog CMOS Design ISBN: 978-0-470-03136-0, Wiley 2008.Danica Stefanovic and Maher Kayal; Structured Analog CMOS Design Series: Analog Circuits and Signal Processing 2009, ISBN: 978-1-4020-8572-7
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