Download - CAVITY LOCK ELECTRONICS Dan Sexton, Sirish Nanda, and Abdurahim Rakhman.

CAVITY LOCK ELECTRONICS

Dan Sexton, Sirish Nanda, and Abdurahim Rakhman

Design Goals

Lock-In on Cavity Resonance Slow and Fast Laser Frequency Scan Slow and Fast Error Compensation Incorporate on board micro-controller Compatible with Stanford Research

SIM900 Crate

Pound-Drever-Hall Locking Scheme Photo

detector

Beam Splitter Cavity

Oscillator

Phase Shifter

MixerLow Pass Filter

0

Tunable Laser

PID-Regulator

Error signal

•Detect phase of the resonance from reflected light

•Feedback to tunable element to stay “locked” to resonance

● Keep the cavity resonate forever

● It is very hard to stabilize the cavity length in nm level

System Schematic

Electronics Overview

Slow and Fast Laser Frequency Scan Search for Signal of Interest

Slow Scan Rate – 0.01 Hz – 1Hz Fast Scan Rate – 3 Hz – 30Hz

External Modulation 10-30 mV @ 1MHz Signal

Error Input and Output Polarity Selection (+/-)

Electronics Overview (cont’d)

Slow and Fast Error Feedback Integration and Gain Control Loops

(PI) Gain Range – x0.1 – x1 Integration Time – 1mS – 10mS

Optional Features Trigger Monitor or Input Threshold Monitor or Input


Analog Devices ADuC-70xx series Micro-Controller 32-Bit 44MHz ARM processor 8 ADC CHs and 4 DAC CHs Drop in module in two different

packages Option A – OLIMEX Evaluation Card

ADuC-7026 (3” x 3”) Option B – OLIMEX DIP Socket

ADuC-7020 (1” x 2”)


Stanford Research SIM900 Crate Off the shelf “Modular System” GPIB and RS-232 interface Regulated Power Supply

More Electronics Overview

Current Status

PCB and enclosure in hand and assembled

Bench Testing completed In System Calibration Beginning