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2011 te1.com.br
2011 te1.com.br
2011 te1.com.br
TDA2030V
NE5532NNE5532N
4700F/35v
4700F/35v
7812
7912
100nF
100nF
10F/25v
10F/25v
GND
V+
V-
10F/25v
10k
10k
GND
GND
33k
10k
10k
GND
2n2
100n
100n
GND
GND
GND
10F/25v
10F/25v
GND
GND
10F/25v
GND GND
33k
GND
10k 10k
100n
220n
GND
10F/25v
10k
V+
V-
4.7
k
10
470
10k
4.7
k
470
100n
GND
VDD
VDD
VSS
VS
S
2
1
4
IC65
3
2
31
IC4A
6
5
7
IC4B8
4
AC1
AC2
- +
B1
C4
C3
IC2
GND
IN OUT
IC1
GND
OUTIN
C2
C1
C5
C6
-IN-1
-IN-2 C20
1-1
1-3
1-2
P2/1
2-1
2-3
2-2
P2/2
R17
R15
R19
C22
C23
C14
C18
R-IN-1
R-IN-2 C19
C 1 6
C12
R6
R5 R3
C10
C9
C8
P1
R18
R20
R16
R10
R7
R8
C21
AC-1
AC-2
AC-3
L-OUT-1
L-OUT-2
+
+
+
+
+
+
+
+
+
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1 2 1 2
1
2
1
2
- IO
+
I
O
IC6
IC4
IC2
IC1
C5
C6
L-INC20
P2
R17
R15
R19
C22
C23
C14
C18
IC5
R-IN
C19
R12
C16
C17
C13
C12
R6
R5
R3
C10C9
C8
P1
IC3
R2 R
1R4
C7
C11
J6
J7
J4
J5
J1
R18
R20
R16
R13
R9
R14
R10
R11
R7
R8C15C21
J3
J2
L-OUT
R-OUT
TDA2030V
NE55
32N
4700F/35v
4700F
7812
7912
10F/25v
10F/25v
10F/25v
10k
33k
10k10k
2n2
100n
100n
10F/25v
TDA2030V
10F/25v
33k
2n2
100n
10F/25v
10F/25v
33k
10k
10k
100n
220n
10F/25v
10k
TDA2030V
22k
10470
100n
47F/25v
4.7
k10
470
4.7
k470
10
10k
10k
4.7
k
470
100n100n
LIN RIN
LOUT
R-OUT
2011 te1.com.br
2011 te1.com.br
TDA
+
+ +- -
--
+
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LIN RIN
LOUT
R-OUT
2011 te1.com.br
2011 te1.com.br
TDA
+
+ +- -
--
+
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LIN RIN
LOUT
R-OUT
2011 te1.com.br
2011 te1.com.br
TDA
+
+ +- -
--
+
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TDA2030
14W Hi-Fi AUDIO AMPLIFIER
DESCRIPTION
The TDA2030 is a monolithic integrated circuit inPentawatt package, intended for use as a lowfrequency class AB amplifier. Typically it provides14W output power (d = 0.5%) at 14V/4; at 14Vor 28V, the guaranteed output power is 12W on a4 load and 8W on a 8 (DIN45500).TheTDA2030 provideshigh outputcurrentandhasvery low harmonic and cross-over distortion.Further the device incorporates an original (andpatented) short circuit protection system compris-ing an arrangement for automatically limiting thedissipated power so as to keep the working pointof the output transistors within their safe operatingarea. A conventional thermalshut-downsystem isalso included.
June 1998
Symbol Parameter Value Unit
Vs Supply voltage 18 (36) V
Vi Input voltage Vs
Vi Differential input voltage 15 V
Io Output peak current (internally limited) 3.5 A
Ptot Power dissipation at Tcase = 90C 20 W
Tstg, Tj Stoprage and junction temperature -40 to 150 C
ABSOLUTE MAXIMUM RATINGS
TYPICAL APPLICATION
Pentawatt
ORDERING NUMBERS : TDA2030HTDA2030V
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PIN CONNECTION (top view)
TEST CIRCUIT
+VS
OUTPUT
-VS
INVERTING INPUT
NON INVERTING INPUT
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Symbol Parameter Test conditions Min. Typ. Max. Unit
Vs Supply voltage 612
1836
V
Id Quiescent drain current
Vs = 18V (Vs = 36V)
40 60 mA
Ib Input bias current 0.2 2 A
Vos Input offset voltage 2 20 mV
Ios Input offset current 20 200 nA
Po Output power d = 0.5% Gv = 30 dBf = 40 to 15,000 HzRL = 4RL = 8
128
149
WW
d = 10%f = 1 KHzRL = 4RL = 8
Gv = 30 dB
1811
WW
d Distortion Po = 0.1 to 12WRL = 4 Gv = 30 dBf = 40 to 15,000 Hz 0.2 0.5 %
Po = 0.1 to 8WRL = 8 Gv = 30 dBf = 40 to 15,000 Hz 0.1 0.5 %
B Power Bandwidth(-3 dB)
Gv = 30 dBPo = 12W RL = 4
10 to 140,000 Hz
Ri Input resistance (pin 1) 0.5 5 M
Gv Voltage gain (open loop) 90 dB
Gv
Voltage gain (closed loop) f = 1 kHz 29.5 30 30.5 dB
eN Input noise voltage B = 22 Hz to 22 KHz 3 10 V
iN Input noise current 80 200 pA
SVR Supply voltage r ejection RL = 4 Gv = 30 dBRg = 22 kVripple = 0.5 Vefffripple = 100 Hz
40 50 dB
Id Drain current Po = 14WPo = W
RL = 4RL = 8
900500
mAmA
ELECTRICAL CHARACTERISTICS (Refer to the test circuit, Vs = 14V , Tamb = 25C unlessotherwisespecified) for single Supply refer to fig. 15 Vs= 28V
Symbol Parameter Value Unit
Rth j-case Thermal resistance junction-case max 3 C/W
THERMAL DATA
TDA2030
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Figure 1. Output power vs.supply voltage
Figure 2. Output power vs.supply voltage
F i g u re 3 . D i s t o rt i on v s .output power
F i g u r e 4 . D i s t o rt i on v s .output power
F i g u re 5 . D i s t o r ti o n v s .output power
F i g u re 6 . D i s t o rt i on v s .frequency
F i g u r e 7 . D i s t o r t i o n v s .frequency
Figure 8. Frequency re-sponse with different valuesof the rolloff capacitor C8(see fig. 13)
Figure 9. Quiescent currentvs. supply voltage
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Figure 10. Supply voltagerejection vs. voltage gain
Figure 11. Power dissipa-tion and efficiency vs.outputpower
Figure 12. Maximum powerdissipation vs. supply volt-age (sine wave operation)
APPLICATION INFORMATION
Figure 13. Typical amplifierwith split power supply
Figure 14. P.C.board and component layout forthe circuit of fig. 13 (1 : 1 scale)
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APPLICATION INFORMATION (continued)
Figure 15. Typical amplifierwith single power supply Figure 16. P.C.board and component layout forthe circuit of fig. 15 (1 : 1 scale)
Figure 17. Bridge amplifier configuration with split power supply (Po = 28W,Vs = 14V)
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PRACTICAL CONSIDERATIONS
Printed circuit board
The layout shown in Fig. 16 should be adopted bythe designers. If different layouts are used, theground points of input 1 and input 2 must be welldecoupled from the ground return of the output inwhich a high current flows.
Assembly suggestion
No electri cal isolation is needed between the
packageand the heatsinkwithsinglesupplyvoltage
configuration.
Application suggestions
The recommended values of the components arethoseshown on applicationcircuit of fig.13.Different values can be used. The following tablecan help the designer.
ComponentRecomm.
valuePurpose
Larger thanrecommended value
Smaller thanrecommended value
R1 22 k Closed loop gainsetting
Increase of gain Decrease of gain (*)
R2 680 Closed loop gainsetting
Decrease of gain (*) Increase of gain
R3 22 k Non inverting inputbiasing
Increase of inputimpedance
Decrease of inputimpedance
R4 1 Frequency stability Danger of osccilat. athigh frequencieswith induct. loads
R5 3 R2 Upper frequencycutoff
Poor high frequenciesattenuation
Danger ofoscillation
C1 1 F Input DCdecoupling
Increase of lowfrequencies cutoff
C2 22 F Inverting DCdecoupling
Increase of lowfrequencies cutoff
C3, C4 0.1 F Supply voltagebypass
Danger ofoscillation
C5, C6 100 F Supply voltagebypass
Danger ofoscillation
C7 0.22 F Frequency stability Danger of oscillation
C8
1
2 B R1Upper frequencycutoff
Smaller bandwidth Larger bandwidth
D1, D2 1N4001 To protect the deviceagainst output voltage spikes
(*) Closed loop gain must be higher than 24dB
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SINGLE SUPPLY APPLICATION
ComponentRecomm.
valuePurpose
Larger thanrecommended value
Smaller thanrecommended value
R1 150 k Closed loop gainsetting
Increase of gain Decrease of gain (*)
R2 4.7 k Closed loop gainsetting
Decrease of gain (*) Increase of gain
R3 100 k Non inverting inputbiasing
Increase of inputimpedance
Decrease of inputimpedance
R4 1 Frequency stability Danger of osccilat. athigh frequencieswith induct.loads
RA/RB 100 k Non inverting input Biasing Power Consumption
C1 1 F Input DCdecoupling
Increase of lowfrequencies cutoff
C2 22 F Inverting DCdecoupling
Increase of lowfrequencies cutoff
C3 0.1 F Supply voltagebypass
Danger ofoscillation
C5 100 F Supply voltagebypass
Danger ofoscillation
C7 0.22 F Frequency stability Danger of oscillation
C8
1
2 B R1
Upper frequency
cutoff
Smaller bandwidth Larger bandwidth
D1, D2 1N4001 To protect the device against output voltage spikes
(*) Closed loop gain must be higher than 24dB
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SHORT CIRCUIT PROTECTION
TheTDA2030has an originalcircuit whichlimits thecurrent of the output transistors.Fig. 18 shows thatthe maximum output current is a function of thecollector emitter voltage; hence the output transis-tors work within their safe operating area (Fig. 2).This functioncan thereforebe consideredas being
peak power limiting rather than simple current lim-iting.It reduces the possibilitythat the device gets dam-aged during an accidental short circuit from ACoutput to ground.
F i g ur e 1 8 . M a x i mu mou tpu t c u rr en t v s.voltage [VCEsat] acrosseach output transistor
Figure 19. Safe operating area andcollector characteristics of theprotected power transistor
THERMAL SHUT-DOWN
The presence of a thermal limiting circuit offers thefollowing advantages:
1. An overload on the output (even if it is perma-nent),oran abovelimitambienttemperaturecanbe easily supported since the Tj cannot behigher than 150C.
2. Theheatsinkcan have a smaller factorof safetycompared with that of a conventional circuit.Thereis no possibilityof devicedamage due tohigh junction temperature.If for any reason, the
junction temperatureincreasesup to 150C, thethermal shut-down simply reduces the powerdissipationat the current consumption.
The maximum allowable power dissipation de-pendsupon the size of theexternalheatsink (i.e.itsthermal resistance); fig. 22 shows this dissipablepower as a function of ambient temperature fordifferent thermal resistance.
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Figure 20. Output power andd r ai n c u rr e nt v s . c a s etemperature (RL = 4)
Figure 21. Output power andd r ai n c u rr e nt v s . c a s etemperature (RL = 8)
Fi gur e 22. Max imumallowable power dissipationvs. ambient temperature
Figure 23. Example of heat-sink Dimension : suggestion.
The following table shows the length thattheheatsinkin fig.23 must haveforseveralvalues of Ptot and Rth.
Ptot (W) 12 8 6
Length of heatsink(mm)
60 40 30
Rth of heatsink( C/W)
4.2 6.2 8.3
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DIM.mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.8 0.189C 1.37 0.054
D 2.4 2.8 0.094 0.110
D1 1.2 1.35 0.047 0.053
E 0.35 0.55 0.014 0.022
E1 0.76 1.19 0.030 0.047
F 0.8 1.05 0.031 0.041
F1 1 1.4 0.039 0.055
G 3.2 3.4 3.6 0.126 0.134 0.142
G1 6.6 6.8 7 0.260 0.268 0.276
H2 10.4 0.409
H3 10.05 10.4 0.396 0.409
L 17.55 17.85 18.15 0.691 0.703 0.715L1 15.55 15.75 15.95 0.612 0.620 0.628
L2 21.2 21.4 21.6 0.831 0.843 0.850
L3 22.3 22.5 22.7 0.878 0.886 0.894
L4 1.29 0.051
L5 2.6 3 0.102 0.118
L6 15.1 15.8 0.594 0.622
L7 6 6.6 0.236 0.260
L9 0.2 0.008
M 4.23 4.5 4.75 0.167 0.177 0.187
M1 3.75 4 4.25 0.148 0.157 0.167
V4 40 (typ.)
Dia 3.65 3.85 0.144 0.152
PENTAWATT PACKAGE MECHANICAL DATA
L
L1
A
C
L5
D1 L2
L3
E
M1
MD
H3
Dia.
L7
L6
F1H2
F
G G1
E1
F
E
L9V4
R
R
R
RESIN BETWEEN
LEADS
H1
V3
H2
L8
V VV1
B
V V
V4
V4
TDA2030
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Information furnished is believedto be accurate andreliable. However, STMicroelectronics assumes no responsibility for theconsequences ofuse of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is grantedby implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subjecttochange without notice. This publication supersedes and replaces all i nformation previous ly supplied. STMicroelectronics products are notauthorized foruse as critical components in life support devicesor systems withoutexpress written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
1998 STMicroelectronics Printed in Italy All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
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