Zxc10-Bscb System v3.0

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ZXC10-BSSB System Unit 2

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OutlineZXC10-BSCB Overview Control Subsystem Primary Switching Subsystem Resource Subsystem

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ZXC10-BSCB OverviewBSCPCFSPBS

PDSN MSC

CPSCPS

PSN

DTSDTS

SDU......

MSC MSC

s

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ZXC10-BSCB Overview (Cont.)DTS (Digital Trunk Subsystem) terminates lowspeed links (like E1) on the Abis interface and A interfaces. CPS (Call Processing Subsystem) performs CDMA call control. PCF (Packet Data Control Subsystem) performs data service processing. SDU (Selector Digital Subsystem) is in charge of reverse frame selection and the corresponding protocol processing. VCS (VoCoder Subsystem) performs voice encoding/decoding. PSN (Packet Switching Network) performs media stream switching.ZTE University univ.zte.com.cn univ.zte.com.cn

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BSC Physical Architecture

Three subsystems Primary Switching Subsystem Control Subsystem. Resource Subsystem One BSC rack/cabinet has 4 shelves, each of which has 17 front and rear slots. Every front/rear slot is for one front/rear board

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BSCB Physical Architecture (Cont.)

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BSCB Physical Architecture(Cont.)Primary Switching Subsystem Consisting of one primary switching shelf normally whose backplane is BPSN so that primary switching shelf is referred to as BPSN shelf. Control Subsystem Consisting of one control shelf normally whose backplane is BCTC so that control shelf is referred to as BCTC shelf. Resource subsystem Consisting of one or more resource shelves whose backplane is BUSN so that resource shelf is referred to as BUSN shelf.

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BSCB Hardware Architecture-Front ViewPrimary Switching shelf (BPSN) 1 G L I Q V 2 G L I Q V 3 G L I Q V 4 G L I Q V 5 G L I Q V 6 G L I Q V 7 P S N 4 V 8 P S N 4 V 9 G L I Q V 10 G L I Q V 11 G L I Q V 12 G L I Q V 13 G L I Q V 14 G L I Q V 15 U I M C 16 U I M C 17 N C

Control shelf (BCTC) 1 M P 2 M P 3 M P 4 M P 5 M P 6 M P 7 M P 8 M P 9 U I M C 10 U I M C 11 O M P 12 O M P 13 C L K G 14 C L K G 15 C H U B 16 C H U B 17 N C

Resource shelf (BUSN) 1 D T B 2 D T B 3 D T B 4 S D U 5 I P C F 6 I P C F 7 A B P M 8 A B P M 9 U I M U 10 U I M U 11 U P C F 12 U P C F 13 S D U 14 S D U 15 S D U G C M 16 S D U 17 S D U G C M

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BSCB Hardware Architecture -Back ViewPrimary Switching shelf (BPSN) 1 N C 2 N C 3 N C 4 N C 5 N C 6 N C 7 N C 8 9 N C 10 N C 11 N C 12 N C 13 N C 14 N C 15 R U I M 16 R U I M 17 N C

NC

2Control shelf (BCTC) 1 N C 2 N C 3 N C 4 N C 5 N C 6 N C 7 N C 8 N C 9 R U I M 2 10 R U I M 3 11 R M P B 12 R M P B 13 R C K G 1 14 R C K G 2 15 R C H B 1

316 R C H B 2 17 N C

Resource shelf (BUSN) 1 R D T B 2 R D T B 3 R D T B 4 N C 5 6 7 8 9 R U I M 1 10 R U I M 11 N C 12 N C 13 N C 14 N C 15 N C 16 N C 17 N C

RM N I C

RM N I C

RM N I C

RM N I C

1G C M G C M

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OutlineBSC Overview Control Subsystem Resource Subsystem Primary Switching Subsystem

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Control Subsystem (Contd)

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MP and MP Boards

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MP and MP Boards (Contd)

CPU2

CPU1

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iDMeroniitsotrriibnugtoofnde bu gg ing ofZTE University For Monitoring of For debugging of CPU2

Rear Board of OMP (RMPB)

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Clock Generator (CLKG)Clock Generator (CLKG) uses 8KHz clock reference from DTB or GCM (GPS Clock Module); or 2MHz/2Mbits from the BITS system; and PP2S, 16CHIP from the GCM to generate system clock. Adopting phase-locked loop system, which supports four working modes: CATCH, TRACE, HOLD and FREE. One CLKG board can only provides 15 sets of system clocks for 15 shelves respectively.

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CLKG and its Rear BoardsCLKG

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Clock Distributor Board (CLKD)When the number of shelves exceeds 15, a Clock Distributor Board (CLKD) should be configurated. CLKD receives one set of system clock distributed by CLKG and then replicates at most 15 sets of system clocks for use.

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GPS Clock Board (GCM )GCM extracts 1PPS signals from the received GPS signals, which is used as reference to further generate the PP2S, 16CHIPS (19.6608MHz) and Time of Date (TOD) messages. Very high phase accuracy and frequency accuracy Very good GCM holding capability when there is no GPS signals GCM is in active/standby mode, and suitable for both GPS and GLONASS receiver module

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Rear board of GCM

Connect to OMP GPS485

RS 248Output 16chip/pp2s clock signals to CLKG

GCM CLK0

GCM CLK1GLONASS

GNSOutput 8k Clock Signals to CLKG

GCM 8kNot used

DSM 8k

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Universal Interface Module (UIM)Two types of UIM boards: UIMC and UIMU, both of which have UIM mother board. UIMU employs GXS subcard, while UIMC employs GCS subcard. UIMC is used in BCTC and BPSN shelves, while BUSN is used in UIMU. UIMC/UIMU is the control center of within each shelf. UIMC provides switch of control stream within BCTC shelf and BPSN shelf, while UIMU provides switch of control and media stream within BUSN shelf. UIM provides interfaces between different shelves to exchange control and media data. Getting system clock from CLKG and distributing it to other boards with the shelf.

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UIMU

3MIU

Rear Boards of UIMCRUI M

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l

o

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Control Hub (CHUB)CHUB acts like a switch to connect the control streams of all the shelves including BPSN shelves, BUSN shelves and BCTC shelves, when the number of shelves is large. Externally providing 46 100Mbps Ethernet interfaces Internally providing 1G Ethernet interface for the interconnection with the UIMC board in the same shelf

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Rear Boards of CHUB

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BCTC Shelf ConfigurationA BSC is only equipped with one pair of OMP boards (1+1 active/backup) in slots 11 and 12 of BCTC shelf. Other MP boards need be configured according to the requirements. The CLKG/CLKD must plugged in in slots 13 and 14 of the BCTC shelf in active/standby mode. UIMC can only reside in slots 9 and 10, and CHUB in slots 15 and 16.

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BCTC Typical ConfigurationControl shelf (BCTC): Front boards 1 C M P 2 C M P 3 D S M P 4 D S M P 5 R M P 6 R M P 7 H M P 8 H M P 9 U I M C 10 11 12 13 14 15 16 17 U I M C O M P O M P C L K G C L K G C H U B C H U B N C

Control shelf (BCTC): Rear boards 1 N C 2 N C 3 N C 4 N C 5 N C 6 N C 7 N C 8 N C 9 R U I M 2 10 11 12 13 14 15 16 17 R U I M 3 R M P B R M P B R C K G 1 R C K G 2 R C H B 1 R C H B 2 N C

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Control Subsystem Principle

CHUB IBB

UIMC UIM

CLKG CLKG

FE

CMP CMP

OMP OMP

OMC FE

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OutlineBSC Overview Control Subsystem Resource Subsystem Primary Switching Subsystem

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Resource SubsystemResource Subsystem processes relevant bottom-layer protocols as well as provides various access interfaces and various resources processing modules. It includes front boards:UIMU, DTB/DTEC, ABPM, SDU, VTC, IWFB, HGM, IBB, IPCF, UPCF

rear boards:RDTB, RMNIC, RUIM1

Backplane of Resource Subsystem is an universal service backplane BUSN, on which various service data processing modules and control subsystem boards can be plugged in together.

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Resource Subsystem (Contd)

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Universal Interface Module (UIMU)Control center of BUSN Providing switches for control and media stream transmission within BUSN shelf. Getting system clock from CLKG and distributing it to other boards with the shelf. Providing interfaces between different shelves to exchange control and service data: 2 FE ports for control data exchange and 2 optical GE ports for service data exchange.

UIMC

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UIMU Board Panel

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Rear Board of UIMU

e l v e

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Digital Trunk Board (DTB/DTEC)DTB multiplexes data on 32 E1s to 8 HWs of 8Mbps. After this, the data will be distributed to the corresponding processing boards through the UIMU. The only difference between DTB and DTEC lies in the EC function. DTEC can be configured w/o the EC function. Providing 32 E1s physical interfaces, and leading out E1 connection lines from the back board RDTB. Providing 8K clock reference for CLKG use.

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DIP Switches & Jumpers of DTBDTB/DTEC has 12 4-bit DIP switches. a) Eight 4-bit DIP switches (including S1-S6, S9 and S12) are used to set the impedance of each E1 cable to 75 or 120 .ON----75 OFF----120

b)

Two 4-bit DIP switches (S7 and S8) indicate the receiving match impedance of each E1 chip.ON----75 OFF----120

c)

Two 4-bit DIP switches (S10 and S11) are used to indicate the long/short haul working status of each E1 chipuniv.zte.com.cn univ.zte.com.cn

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DTB and RDTB

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Abis Processing Module (ABPM)Designed for protocol processing for the Abis interface Providing cUDP/PPP/PPPmux/ML-PPP processing capability of 63 E1s, i.e., 632Mbps. The maximum number of ML-PPP (MP) bundles supported is 42 MP, each of which contains at most 8 E1s. Supporting at least 256 HDLC Being equipped with rear board RMNIC if debugging is needed.

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Selector Digital Unit (SDU)SDU serves as a selector to process radio voice and data protocols. Selecting and separating voice and packet data. Processing data for A8 interface. With four sets of CPU, which are mutually independent. Providing 480 selector unit (SE).

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Voice Transcoder Card (VTC)VTC, including VTCD and VTCA, providing voice coding/decoding of the circuit switched domain. VTCD is a voice transcoder board based on the DSP array VTCA is a voice transcoder board based on the ASIC array.

Providing 480 voice coding/decoding elements (VE) of QCELP8K, QCELP13K, or EVRC and echo canceller function.

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Internetworking Functional Board (IWFB)IWFB implements the asynchronous data service defined by service option 4100 and 12 and G3 fax service defined by 4101, 13. Adopting sub-card mode for the MODEM pool. Each sub-card has 60 channels and at most four sub-cards can be inserted. I.e., the MODEM pool can be flexibly configured with 60/120/180/240 channels.

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PCF User Data Processing Board (UPCF)

UPCF supports the processing of PCF user data caching, sequencing as well as the processing of some special protocols.

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PCF Interface Module (IPCF)The IPCF module provides PCF subsystem with interfaces to BSC and PDSN. It receives IP data, differentiates the data and distributes them to corresponding internal functional modules, such as SPCF and UPCF. Providing 4 external FE interfaces for the connection with PDSN and AN AAA.

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Narrowband Signaling Process Board (SPB)The narrowband signaling process board is designed to process lower layers of NO.7 signaling. SPB provides 16 channels of E1, four CPUs which constitute a communication processing unit. SPB supports 120 and 75 impedance E1 configurations.

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SPB DIP Switches & JumpersSPB has six 4-bit DIP switches S1~S6. S3~S6 are used to set the impedance-matching resistance of various E1s to 75 or 120 .ON indicates 120ohm while OFF indicates 75ohm.

S1 and S2 are used to indicate the long/short haul status and the receiving match resistance of various E1 chips respectively.

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HIRS Gateway Module (HGM)

The HGM module is a HIRS gateway compatible with ZTE IS95 and CDMA20001x HIRS BTS and BSC.

Supporting HIRS protocol processing capability of 32 E1s for protocol conversion between HIRS and IP

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BSC Interconnection Module (IBB)IBB provides standard A3/A7 and A13 interfaces.IBBA-----providing the standard soft handoff interface between ATM BSC and IP BSC. IBBH-----providing the soft handoff interface between IP BSC and ZTE IS-95/CDMA2000 1x HIRS BSC IBBE-----providing the soft handoff interface between IP BSCs with physical link network cable. IBBC-----providing the soft handoff interface between IP BSCs with E1.

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BUSN Typical ConfigurationResource shelf (BUSN) front boards 1 D T B 2 D T B 3 D T B 4 S D U 5 I P C F 6 7 8 A B P M 9 U I M U 10 11 12 13 14 15 16 17 U I M U U P C F U P C F S I A P B C P F M

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Principle of Resource SubsystemIBB/SDU/ABPM/ UPCF

DTB DTB

IPCF IPCF

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OutlineBSC Overview Control Subsystem Resource Subsystem Primary Switching Subsystem

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Primary Switching SubsystemThe primary switching subsystem serves as the media stream switching center of BSC It includes front boards:PSN, GLI and UIMC

It includes Rear boardRUIM2,RUIM3

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Packet Switching Network (PSN)As the switch of media stream, PSN performs the packet data switching between various line cards, i.e., BUSN shelves.

There 3 types of PSNPSN1V, PSN4V and PSN8V, which provide switching capacities 10G, 40G and 80G respectively.

PSN4V is usually used in our equipment and 1+1 load sharing mode is employed.

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GE Line Interface Board (GLIQV)Providing 8 GE ports configured in 1+1 backup mode. GE ports in adjacent GLIQV boards provide GE port backup. Providing 1100M FE as the communication channel between active and standby GLI. Providing 1100M FE as the control channel.

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GLIQV External Ports

GE optical ports

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Typical ConfigurationThe typical primary switching subsystem consists of one or more primary switching shelves, which contain three modules: UIM, PSN and GLI.UIM, in active/standby mode, is invariably inserted in slots 15 and 16. PSN, also in active/standby mode, is invariably inserted in slots 7 and 8. To configure the primary switching shelf, UIM and PSN are required, and two GLIs must be configured at least.

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BPSN Typical ConfigurationPrimary switching shelf (BPSN): front boards 1 G L I Q V 2 G L I Q V 3 G L I Q V 4 G L I Q V 5 G L I Q V 6 G L I Q V 7 P S N 4 V 8 P S N 4 V 9 G L I Q V 10 G L I Q V 11 G L I Q V 12 G L I Q V 13 G L I Q V 14 G L I Q V 15 U I M C 16 U I M C 17 N C

Primary switching shelf (BPSN): rear boards 1 N C 2 N C 3 N C 4 N C 5 N C 6 N C 7 N C 8 N C 9 N C 10 N C 11 N C 12 N C 13 N C 14 N C 15 R U I M 2 16 R U I M 3 17 N C

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Primary Switching Subsystem(Cont.)ControlStream FE FE

PSN PSN

UIM UIM

ControlCenter (CHUB)

Clock

CLKG CLKG

GLI GLI

GLI GLI

Master

Slave

Master

Slave

BUSN

BUSN

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Flexible Configuration of BSC

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