YCbCr 4:2:2 with Embedded Syncs In / RGB Graphics Out Using an SDTV Generic Setup CSC Setup for HD...
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Transcript of YCbCr 4:2:2 with Embedded Syncs In / RGB Graphics Out Using an SDTV Generic Setup CSC Setup for HD...
YCbCr 4:2:2 with Embedded Syncs In / RGB Graphics Out Using an SDTV Generic Setup
CSC Setup for HD YCbCr to RGB
REG 0x04 = 0x81 // csc_ric1 0x05 = 0xD5 // csc_rfc1 0x06 = 0x00 // csc_ric2 0x07 = 0x00 // csc_rfc2 0x08 = 0x06 // csc_ric3 0x09 = 0x29 // csc_rfc3 0x0A = 0x04 // csc_gic1 0x0B = 0x00 // csc_gfc1 0x0C = 0x04 // csc_gic2 0x0D = 0x00 // csc_gfc2 0x0E = 0x04 // csc_gic3 0x0F = 0x00 // csc_gfc3 0x10 = 0x80 // csc_bic1 0x11 = 0xBB // csc_bfc1 0x12 = 0x07 // csc_bic2 0x13 = 0x42 // csc_bfc2 0x14 = 0x00 // csc_bic3 0x15 = 0x00 // csc_bfc3 0x16 = 0x14 // csc_offset1 0x17 = 0xAE // csc_offset12 0x18 = 0x8B // csc_offset23 0x19 = 0x15 // csc_offset3
CSM Setup to MAP 601 scaling toFull-scale DAC Outputs
0x41 = 0x40 // csm_clip_gy_low 0x42 = 0x40 // csm_clip_bcb_low 0x43 = 0x40 // csm_clip_rcr_low 0x44 = 0x53 // csm_clip_gy_high 0x45 = 0x3F // csm_clip_bcb_high 0x46 = 0x3F // csm_clip_rcr_high 0x47 = 0x40 // csm_shift_gy 0x48 = 0x40 // csm_shift_bcb 0x49 = 0x40 // csm_shift_rcr 0x4A = 0xFC // csm_mult_gy_msb 0x4B = 0x44 // csm_mult_bcb_rcr_msb0x4C = 0xAC // csm_mult_gy_lsb 0x4D = 0x91 // csm_mult_bcb_lsb 0x4E = 0x91 // csm_mult_rcr_lsb 0x4F = 0xFF // csm_mode
Sync Amplitude Settings for no Sync-on-Green
0x1D = 0x00 // dtg_y_sync1 0x1E = 0x00 // dtg_y_sync2 0x1F = 0x00 // dtg_y_sync3 0x20 = 0x00 // dtg_cbcr_sync1 0x21 = 0x00 // dtg_cbcr_sync2 0x22 = 0x00 // dtg_cbcr_sync3 0x23 = 0x2A // dtg_y_sync_upper 0x24 = 0x00 // dtg_cbcr_sync_upper
Operating Mode and Input Format0x1C = 0x53 // dman_cntl 4:2:20x36 = 0x00 // dtg_linecnt_msb 0x38 = 0x89 // dtg_mode = Generic SDTV
These settings can be used for all graphics formats for HD YCbCr 4:2:2 to RGB conversion.
Output Sync Delays
0x71 = 0x00 // dtg_hdly_msb 0x72 = 0x01 // dtg_hdly_lsb 0x74 = 0x00 // dtg_vdly_msb 0x75 = 0x01 // dtg_vdly_lsb 0x76 = 0x00 // dtg_vlength2_lsb 0x77 = 0x07 // dtg_vdly2_msb 0x78 = 0xFF // dtg_vdly2_lsb
Generic Line types
0x68 = 0x00 // BP1 Line type = active video 0x69 = 0x00 // BP2 Line type = active video
YCbCr 4:2:2 with Embedded Syncs In / RGB Graphics Out Using an SDTV Generic Setup
I2C
REG
VGA
60Hz
SVGA
60Hz
XGA
60Hz
SXGA
60Hz
03h 11h 01h 01h 01h CLK and Freq range
25h 60h 80h 88h 70h Dtg1_spec_a (HS width)
28h 90h D8h 28h 68h Dtg1_spec_d (HS+Hor Bp)
2Bh 00h 00h 80h 80h Dtg1_spec_d_msb
2Ch 00h 00h 00h 00h Dtg1_spec_h_msb
2Fh 10h 28h 18h 30h Dtg1_spec_k_lsb (Hor Fp)
30h 00h 00h 00h 00h Dtg1_spec_k_msb
34h 03h 04h 05h 06h Total Pixels
35h 20h 20h 40h 98h per Line
39h 22h 22h 33h 44h Total Lines
3Ah 0Dh 74h 26h 2Ah per Frame
3Bh 0Dh 74h 26h 2Ah and Field
50h 02h 02h 03h 04h BP1 and BP2 MSB (BP2= Total lines +1)
58h 00h 00h 00h 00h BP1 LSB
59h 0Eh 75h 27h 2Bh BP2 LSB
70h 60h 80h 88h 70h HSOUT Width
73h 03h 05h 07h 04h VSOUT Width
79h 00h 00h 00h 00h Dtg_hs_in_dly_msb
7Ah 39h 51h 41h 59h Dtg_hs_in_dly_lsb (41 +Horizontal Fp)
7Bh 00h 00h 00h 00h Dtg_vs_in_dly_msb
7Ch 0Ah 01h 03h 01h Dtg_vs_in_dly_lsb (vertical Fp of the format)
82h 23h 3Bh 23h 3Bh Embedded syncs and Sync Polarities
VGA
60Hz
SVGA
60Hz
XGA
60Hz
SXGA
60Hz
800 1056 1344 1688 Total Pixels
525 628 806 1066 Total Lines
640 800 1024 1280 Active Pixels
480 600 768 1024 Active Lines
N P N P HS Polarity
96 128 136 112 HS Width
N P N P VS Polarity
2 4 6 3 VS Width
25.175 40.0 65.0 108.0 CLKIN (MHz)
16 40 24 48 Horizontal Fp
48 88 160 248 Horizontal Bp
10 1 3 1 Vertical Fp
33 23 69 38 Vertical Bp
From the DMT VESA StandardThese settings change for various formats.
• HSOUT and VSOUT polarities and widths must be set correctly to be displayed properly.• Required dtg_hs_in and vs_in_dly settings depend on the source embedded sync alignment with RGB data. • If embedded syncs are aligned with the start of the front porch, dtg_hs_in_dly can be set based on the front porch. With this configuration, a constant delay of 41 needs to be added to the horizontal Fp when calculating dtg_hs_in_dly.