Xilinx Confidential F. Toth CPLD 10/99 Page1 Configuration Solutions Overview October 1999 Frank...

13
F. Toth CPLD 10/99 Page1 Xilinx Confidential Configuration Solutions Overview October 1999 Frank Toth Xilinx, San Jose

Transcript of Xilinx Confidential F. Toth CPLD 10/99 Page1 Configuration Solutions Overview October 1999 Frank...

F. Toth CPLD 10/99 Page1 Xilinx Confidential

Configuration SolutionsOverview

October 1999

Frank Toth

Xilinx, San Jose

F. Toth CPLD 10/99 Page2 Xilinx Confidential

Agenda

Industry Trends

Mission & Goals

Support for all platforms & devices

ATE & JTAG Tool Alliances

JTAG Instruction Support

Xilinx JTAG Tool Roadmap

F. Toth CPLD 10/99 Page3 Xilinx Confidential

Use of ISP devices and JTAG is increasing dramatically over the past 18 months

PLD manufacturers starting to offer second and third generation (Xilinx) ISP solutions

JTAG is playing and ever increasing role— Fixes the problem of “hard to get at” device test &

programming— Xilinx leading with IEEE 1532 (new JTAG) focus: Adding

instructions and features to JTAG

New system design thinking: Internet Reconfigurable Logic (IRL)- based on networking infrastructure & Java

PLD Industry Trends

F. Toth CPLD 10/99 Page4 Xilinx Confidential

Configuration SolutionsMission & Goals

Bullet Proof Device Programming & Download— Easy to use, debug, deploy: JTAG & Xilinx Serial Modes

Complete Life Cycle Support— Design, Prototyping, Production, Upgrade & IRL

Full Support All Xilinx Devices (FPGA, CPLD, ISP-PROM)

Support All Download Modes— JTAG, Serial Slave & SelectMAP, Embedded Processor

Create and support Industry Standards— 1149.1 (JTAG), 1532 (New ISP Standard), Java, JEDEC

STAPL

F. Toth CPLD 10/99 Page5 Xilinx Confidential

Third Party Tools &Programmers

EmbeddedControllers

ATE

JED

Alliance & Foundation Tools

Alliance & Foundation Tools

SVFSTAPLJava

SVFSTAPLJava

All Cables

Configuration Solutions

Serial and Parallel download cables MultiLINX Cable

JTAGPROG &HARDWAREDEBUGGER

JTAGPROG &HARDWAREDEBUGGER

BIT

All Platforms

SVF / STAPL & Java support for:

HPTeradyneGenrad

C code examplesSTAPL file convertorJava VM support

Alliances with Third Party JTAG Tool Vendors Focus on Data I/O & BP Microsystems programmers Prototype & Production platforms

CPLDCPLD

FPGAFPGA

ISPROMISPROM

All D

evices

F. Toth CPLD 10/99 Page6 Xilinx Confidential

Real-time Operating Systems with JAVA virtual machines

JTAG Debug &Programmers

AutomaticTest Equipment

JTAG Support Across All Platforms

F. Toth CPLD 10/99 Page7 Xilinx Confidential

JTAG Tool Alliances

Customer Benefits: — Timely & complete customer support of all devices— Xilinx FAE support/ familiarity with JTAG concepts & leading JTAG tools— Timely device support & website access / download

Mutual support alliances with JTAG Tool Suppliers that have established relationships with Xilinx Major Customers:— ASSET- (EMC, Cisco)— Goepel- (Alcatel, Barco, Nokia)— Corelis- (Nortel, Boeing, HP)— JTAG Tech (Philips, Bay Networks)

F. Toth CPLD 10/99 Page8 Xilinx Confidential

Configuration Solutions Tool Roadmap

Download Software

MultiLINX

Cables

iMPACT

Parallel Download Cable

Hardware Debugger

JTAG programmer

Xchecker (serial)

Today 1Q00 1Q01

F. Toth CPLD 10/99 Page9 Xilinx Confidential

Configuration SolutionsRoadmap

Silicon

ConfigSoftware

Updates/Web

Today

Update Virtex JTAG

New device updates for JTAG Programmer & Hardware Debugger

1532 Compliant New FPGAs & CPLD

Ease of use enhancements to JTAGPGMR & HWDBGR

iMPACT : New Tool Combining JTAGPGMR & HWDBGR

V2.1 support for Virtex, XC9500XL/XV, & Spartan

“PUSH” email device updates for customers

Programming applets

1Q00 1Q01

F. Toth CPLD 10/99 Page10 Xilinx Confidential

JTAGProgrammer 1Q2000 Enhancements

— No BSDL required for 3rd party devices— Read-back support for all FPGA devices— Enriched system debug operations- chain

integrity and robustness— GUI enhancements including visual success and

failure programming indications

1Q2001— Unified download tool supporting all Xilinx

devices in all modes using one interface.

F. Toth CPLD 10/99 Page11 11Xilinx Confidential

Xilinx ISP/JTAG Silicon: JTAG Instruction Support

DEVI CE J TAG I NSTRUCTI ON COMMANDS

FAMI LY BYPASS SMPL/ PRLD EXTEST I NTEST I DCODE USERCODE HI GHZ CLAMP RUNBI ST

*XC4000E X X X X

*XC4000XL X X X X

*XC4000XLA X X X X X

*XC4000XV X X X X X

*XC5200 X X X X

*SPARTAN X X X X

*SPARTANXL X X X X X

*VI RTEX X X X X X X X

XC9500 X X X X X X X

XC9500XL X X X X X X X X

XC1800 X X X NA X X X X

XILINX MANDATORY (for new products)

* Two user-definable instructions available

F. Toth CPLD 10/99 Page12 Xilinx Confidential

New IEEE Std 1532 IEEE Std 1149.1-based ISP

Standardization- Next generation ISP using JTAG- One tool-all devices— Easy to use ISP regardless of device

architecture (manufacturer)— Concurrent & interleaved programming

Incorporated into future Xilinx product families: Virtex, Spartan and CPLD

Incorporates “enhanced” BSDL-based algorithm description- no other files needed

Xilinx chairs committee: Neil Jacobson

JTAG1149.1

1532 ISP

F. Toth CPLD 10/99 Page13 Xilinx Confidential