External Use

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Working with Live Video and GraphicsFTF-AUT-F0464

M A Y . 2 0 1 4

Oliver Tian | Auto FAE

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External Use 1

Agenda• Trend of Video and Graphics in Vehicle• Roadmap of Cluster • Introduction of Rainbow/Vybrid• Working scenario• Development Ecosystem • Conclusion

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External Use 2

Mobility for Everyone

Securely

Connected

Cleaner world for Everyone

Safety for Everyone

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External Use 3

Camera

Driver and Passenger Mobile Devices

CLOUD

Infotainment Today

Today’s infotainment systems are focused on:• Connectivity to mobile devices (USB, Bluetooth)• Display of analog rear view camera• Sharing HMI information with the instrument cluster

Instrument Clusteri.MX, Vybrid, Qorivva Infotainment

i.MX, Vybrid

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External Use 4

The Connected VehicleInfotainment + Communication + Security

• Consumer electronics trends are dictating features in the car

• Always connected, applications driven, advanced graphics

• Infotainment systems becoming battleground for Auto differentiation

• As more connected systems get introduced into the vehicle, theneed for security is critical− Increasing external communication features

(Bluetooth, TPMS, Ethernet, Wi-Fi, etc).− Future interface for vehicle-to-vehicle

and vehicle-to-infrastructure.

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External Use 5

Mobility for EveryoneAffordable Solutions for Emerging Markets

• 100M vehicles annuallyforecasted before 2020, on top of motorcycle & e-bike growth

• 80% of quantity growth after 2015 happening in emerging markets

• Safety and emissions reduction are key for a sustainable development

Source: IHS Automotive, February 2014

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External Use 6

More, More, More for Less, Less, Less

More performance, more embedded memory, more safety for lesscost, less power and less development effortMore

Less Reuse

• Other markets have less critical applications

• Some automotive specific challenges

• Electronic complexity• ECUs per car (50+)

• MCUs per car (100+)

• In-car Wi-Fi ® (7.2Mbps and 3.7Bpcs by 2017) iSuppli

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External Use 7

Today’s Car

• Complex computerized control− Millions of lines of code, from multiple vendors− Dozens of distinct ECUs, from multiple vendors

• Shared internal networking (e.g., CAN, FlexRay)− Increasing external communications features

Telematics, Bluetooth, TPMS, RDS, XM radio, GPS, keyless start/entry, USB ports, Wi-Fi, etc.

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External Use 8

Tomorrow’s car -> much more of everything

• The Infrastructure− The Intelligent Transportation System (ITS)

V2V/ACAS, V2I, traffic control, autonomous driving, real-time data fusion, pervasive sensing

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External Use 9

Driver Information Systems Roadmap

Applications

Execution

Proposal

S08 Core

Planning

Production

S12 Core

S12z Core (MagniV)

2011 2012 2013

1st Si

High-endBest Graphics,

Performance &

Integration

Mid-range

Optimized Graphics, High Integration

Cost Effective Performance

Low-end

Lowest System Cost, High Integration

2014 2015 2016 2017

ARM Cortex-Dual A7/M4, VSPA, 2D-ACE, GC355

S12ZVH (Lumen-4WL)Aug 12

S12ZVHY (Lumen-2W)Nov 12

SVF5/3R(Faraday/Vybrid)

Jan 13

I.MX 6 DUALLITE

I.MX 6 DUALJan12

MPC5606S(Spectrum)

MPC5645S(Rainbow)

S12XHY(Sea Wasp)

S12HY(Jellyfish)

S08LG32

MACCxx(Corona)

MACHxx(Halo)

Pin CompatibleQFP/BGA’s

Pin CompatibleQFP’s

Power ArchitectureARM Cortex

ARM Cortex-Dual A5/M4, 2D-ACE, GC355

ARM Cortex-A5/M4/M0+, 2D-ACE, 2D-GPU, GC355

ARM Cortex-/M4/M0+, 2D-ACE, 2D-GPU, GC255

ARM Cortex-Dual A7/M4, VSPA, 2D-ACE, GC355

Color Graphics

Q2 15

I.MX 6 SOLOMay12

I.MX53

I.MX 8 SOLOQ3 15

I.MX 6 SLX +VPU

Jun 14

Security

LumenNG512Q1’16

ARM CortexM0+, 2xCANPhy, MagniV

r6 11-Feb-14

I.MX 6 SLX Q1 ‘14

Q1 15

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External Use 10

MPC5645S: Rainbow 2M

CROSSBAR SWITCH

64kSRAM

VReg

Communications I/O System

Crossbar Slaves

Interrupt Controller

NexusClass 3+

JTAG

Debug

2MFlashBoot

AssistModule (BAM)

Memory Protection Unit (MPU)

System Integration

I/OBridge

RTC/32Kosc

FMPLLx2

PITWDOG

Sys Timer

PPCTM

e200z4dCore

(4k I-cache)

MMU

20 chATD10bit

6

SMD

eMIOS016ch

4I2C

3 DSPI

SSD

DCULite

Oscillator

3 FlexCAN

4LINFlex

VIU

16chDMA

EEE

TCONRSDS

eMIOS116ch

Crossbar MastersGeneral Characteritics:• PPC e200z4d Dual Issue core, 5 stage pipeline, 4k I-Cache• 16 entry Memory Management Unit• 2M FLASH with ECC• 64k SRAM with ECC• 16 channel DMA• Memory Protection Unit (16 regions)• QuadSPI Serial Flash Interface• Voltage Regulator with external ballast transistor• Real Time Counter + 32kHz crystal oscillator• Watchdog, Periodic Interrupt Timer, System Timer• 4-16MHz XOSC• Frequency Modulated PLL (x2)• Nexus 3+ / JTAG

Graphics Features:• 2D Graphics Accelerator: AMD z160 OpenVG• 1M Graphics SRAM• Display Control Unit: 4 planes / 16 layers• Display Conrol Unit –Lite: 2 planes / 4 layers• DDR DRAM interface (324BGA only)• Video input Unit (VIU)• RLE Decoder

General Characteristics:• Up to 120MHz operation• Low power modes• -40 to +105C, 3.0V to 5.5V• 176LQFP, 208LQFP, 324BGA package options

Peripherals and Communications:• 6 Stepper Motor Drivers with Stall Detection• Sound Generator Module• 3xCAN, 3xDSPI, 4xI2C, 4xLIN • 32 channel eMIOS (PWM+Timer)• 20 channel, 10bit ADC

Z160

2D

GFX

DCU

1MGraphicsSRAM

SGM

RLEDecode

DDR-2DRAM

Interface

QuadSPI2

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External Use 11

Vybrid F Series SystemKey Functional Characteristics:• Cortex-A5 “value“ processor for best MIPs/mW• On-chip SRAM, 2D-ACE, Quad-SPI and RTOS result

in low system cost (no DRAM)• Flexible memory solution configurable based on

application needs (1.5MB SRAM or 1MB SRAM + 512K L2)

• DDR3 and OpenVG support for performance critical applications

• Synchronous Audio Interface (SAI) supporting independent I2S, TDM, AC97 and Codec/DSP interfaces

• Enhanced Serial Audio Interface (ESAI) with I2S and AC97 modes

Key Electrical Characteristics:• A5 at up to 400MHz, and DDR3-800• -40 to +85C (ambient)• 3.0V to 3.6V supply (3.3V nominal)Package:• 144/176 LQFP; 364MAPBGA

Initial Samples:• Ready

Enablement• Production Software including CODECs, Stacks, RTOS• UI development Tools for 2D-ACE • Radio Reference Design – HW and SW

Cortex-A5Up to 400MHz

NEON/FPU32KB/32KB L1

MultimediaConnectivity

Power Management

- single 3.3V supply- low voltage reset

USB OTG + Phy

USB OTG + Phy

eMMC/SDx2System

ConnectivityCANx2I2Cx4

UART/LINx6SPIx3

Media Local Bus3-wire

10/100 Ethernet

System and General Purpose

DMA

HAB 4.1 SecurityTamper Detect

Watchdog TimerOther Timers (x8)

Display I/O2D-ACE x2

Animation &Comp Engine

Segment Display Controller (4x40)

Camera Input, 18-bit + Composite (4 to 1))

Audio I/OSAI x4 (i2s x4)

ESAI x1 (i2s x6)SP/DIF

Receiver/TransmitterSample Rate

ConvertorRecieverAudio Multiplexer

OpenVG GPU(GC355)

External MemoryDRAM (16-bit)

LPDDR2, DDR3

Dual Quad-SPIFlash (SDR and DDR)

1.5MB SRAM

Real Time Clock

Pulse Width Modulator

GPIO

2x 12-bit SAR ADC with Touchscreen

2x 12-bit DACWith Tone GenerationInternal Temperature

Monitor

NEON optimized CODECS/Libraries

HMI ToolsComm Stacks

Royalty-freeRTOS

NAND/NOR Flash8/16b

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External Use 12

MACHxx Block Diagram

Cortex-A5Up to 320MHz

Power Management

PeripheralsCAN(FD) x3 I2C x2UART/LIN x3

SPI x5MLB 3-wire

10/100 Ethernet + AVB

System and General PurposeDMA

Security-CSE2

Watchdog Timers

Audio / GFx / Video / DisplaySGM (includes I2S)

GC355 OpenVG GPU

External Memory

Autonomous RTCMemory Protection

2D - ACE

SMD / SSD x6IC/OC Timers / PWM

Digital Video In2D-ACE + inline HUD

Warping

NEON / FPU/ MMU32K / 32K L1 cache

Internal Memory

• ARM Core Architecture:- Cortex M4 vehicle processor- Cortex A5 application processor- Cortex M0+ I/O processor

• 4MByte ECC flash• 2x 512KB ECC SRAM• 1.3MB non-ECC SRAM

• Supports 2 x WVGA displays:- OpenVG 1.1 GPU- 2 x 2D-ACE display interfaces

- DigitalRGB, RSDS, LVDS i/f- Hardware HUD warping engine- Digital camera input

• Extensive connectivity :- Ethernet AVB, MLB50, CAN-FD

• I/O Processor (Cortex M0+)- Supports autonomous operation Stepper Motor Drivers

- Peripheral control and Low power operation

• Security (CSE2)- Meets SHE specification - Meets GM’s Global B Cybersecurity

requirements

• Functional Safety- Built in support for ASIL-B

• Software Support- AutoSAR- GC355- I/OP Stepper motor driver

• BGA and QFP package options:- 176/208LQFP + 516MAPBGA -40 to +105C TA

DDR QuadSPI Flash x2

16/32-bit DDR2

1.3MB Non ECC SRAM

4MB ECC Flash

2 x 512KB ECC SRAM

Single 3.3V supplyLow Voltage Detection

Low Power Control

Cortex-M4Up to 160MHz

FPU16K / 16K L1 cache

Open LDI & RSDS 16-bit SDR

64 KB TCM

I/O ProcessorCortex – M0+

Up to 80MHz32K ECC SRAM

12-bit SAR ADC

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External Use 13

MPC56xxS vs MACHxx vs VybridFeature MPC56xxS MACHxx Vybrid

Target Use-Case Spectrum - 1 x WQVGARainbow – 2 x WQVGA

MACCxx– 1 x WVGAMACHxx- 2 x WVGA Up to 2 x WVGA

Core(s) Spectrum - e200z0hRainbow - e200z4d

Corona - ARM CM4Halo - ARM CM4/CA5 ARM CM4/CA5

Security Censorship only CSE2 (encrypted protection) CAAM

Safety Limited features ASIL-B Limited Features

Flash Spectrum-1M, Rainbow-2M Corona-1-2M, Halo-2-4M None – supports XIP QuadSPI Flash

Graphics SRAM Spectum-160kB, Rainbow-1MB Corona-256kBHalo-1.3MB (+1MB ECC RAM)

Up to 1.5MB on-chip SRAM in total(1MB no ECC, 512k ECC)

Stepper Motors SMD/Stall Detect ‘Intelligent’ SMD/SSD None

Head-Up Display None Hardware warping engine on Halo GC355 can support warping

GPU Spectrum - NoneRainbow - Z160-OpenVG

Corona/Halo - 2D-GPUHalo - GC355 OpenVG GC355 OpenVG

High Speed Serial None MLB50, ENET-AVB, CAN-FD MLB50, ENETx2, USB-HS x2

GRAM Expandability

Spectrum – NoneRainbow – SDR/DDR2

Corona – SDRHalo – (SDR)/DDR2 LPDDR2 / DDR3

Enablement EVB, Basic Compiler tools, “Lab Bench” Demos

EVBs, Complete High-Performance Demos, Optimized Graphics Tools

EVBs, Complete High-Performance Demos, Optimized Graphics Tools

r0: 23-Sep-13

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External Use 14

Next Generation Cluster System

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External Use 15

Key Differences

• Next gen Cluster have internal Flash memory while Vybrid doesn’t supports

• Next gen Cluster DDR2 can be 32-bit wide while Vybrid is 16-bit• Vybrid has in addition a L2 cache controller• Vybrid ports for internal SRAM are all AXI while in Next gen Cluster

some are AXI and others are AHB• Vybrid operates the core and some other masters at 400MHz while

Next gen Cluster operates at 320MHz (System Frequency is 166MHz and 160MHz respectively)

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External Use 16

About the Masters

• Masters are the ones that initiate and drive the access to the slaves.

• A5 and M4 can consume a lot of BW but caches reliefs the system from most of the load.

• Most of the opcodes require more than 1 cycle to execute and load is reduced based on the type of encoding used.

• Masters may operate at different frequencies depending whether they are clocked at system frequency or a multiple of it.

• Latencies and peak BW on each master also depends on the slave being accessed

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External Use 17

2D-ACE: Object Management

• BW per Layer = Pixel Clock * Bytes of Pixels• Maximum 6 Layers blend in a single pixel

......

32

0

Priority

Higher

Lower

Arb

itrat

e / p

ixel

24bpp

r0: 23-Sep-13

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External Use 18

2D-ACE layers & the pixel-blend stack

• At each pixel position up to six layers may be blended− User can globally configure the DCU to blend with 2, 3, 4, 5 or 6 layers

• The blend stack determines how each pixel is blended− Layers below the lowest priority pixel are not visible− The blending settings for the lowest priority pixel are ignored

Pixel ignored

Selected pixels in blend stackLayers active at pixel

position (x,y)Blended pixel

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External Use 19

Vybrid working scenario

ARM Cortex-A5400MHz

USB OTG

1.5MByte SRAMCAN

Dual DDR Quad-SPI Interface

2D-ACEPower

Manage-ment Unit

SD/MMC

iPODAuth.

CD drive

I2S

SPI

Single 3.3V Rail

I2S

I2C I2C UART

2xSD Card or

Managed NAND

Color LCDUp to WVGA

24bpp

CAN PHY

RTC

GPIO

OpenVG GPU

DRAM

16-bit DRAM

Interface

MLB-50

MOST INIC

CANCAN PHY

Radio Chipset

USB OTG

Camera Interface

with resizing

RearviewCamera input

SD/MMC

Optional Touch Screen4-ch ADC

32K/32K Caches

Serial FlashSerial

Flash

ASRC

Vybrid F

NEON

364BGA

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External Use 20

Common ARM Core Architecture:- Cortex A5 application processor for high resolution graphics capability*

- Cortex M4 vehicle processor common platform for network communications

- Cortex M0+ I/O processor for stepper motor control, peripheral control, and low power performance

Common GPU Platform:- Common 2D-ACE provides low memory footprint

with advanced graphics capability- Less requirement for external memory

- Scalable vector graphics & font support- Vivante GC355 & GC255

External Components:- 1x WVGA supported without external RAM- 2x WVGA supported with external RAM- High performance DDR Quad SPI interface**- 16/32 Bit DDR2/SDR**

* Product dependent (Halo supports A5)** Package dependent

MACCxx/MACHxx working scenario

LCD

CAN

Regular

Gauges with TFT

Basic

Gauges with LCD

Premium

Gauges w/ High Res TFT & HUD

HUD

Advanced

Gauges w/ High Res TFTʼs

SDRAM

WVGA WVGA/HUD

CAN

FLASH

ENET

ENET

SDRAM

WVGA

CAN

FLASH

WVGA

WQVGA

CAN

Common Family Platform

Common GPU Platform

Sc

ala

blb

eQ

FP

Pin

Co

mp

ati

ble

Additional Use-cases possible with different package & memory options

r0: 23-Sep-13

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External Use 21

Digital and Analog Video

• Video is produced as a series of raster images• The Vybrid family includes digital and analog input sources− Analog source is a composite video source which is converted to digital

format and connected to the digital video source− Digital source allows connection of various different video standards

• In both cases the video data is stored in RAM− This allows the image to be displayed by the 2D-ACE is the same way as

any other graphic• The video images can be automatically scaled to a smaller or larger

size− BUT the aspect ratio of the video is normally respected

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External Use 22

Video signal flow

Analogue Front End (AFE)

Video

Decoder

(VDEC)

VIUGraphics

Memory

YUV888,RGBnnn, or ITU656

The “Video Subsystem”Analogue In: CVBS

Digital Path

2D-ACETFT

LCDMux

Digital out:YUV888

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External Use 23

A note on aspect ratio

• In some cases the format of an incoming video will be different to the LCD panel

• Typical video aspect ratios are 4:3 or 16:9• Some common LCD panels do not conform to this format− 480 x 272 (7:4), 800 x 480 (15:9),

• In cases where the video source does not match the panel aspect ratio it is usual to crop the video or display it as a subset of the panel size

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External Use 24

Synchronizing sources

• The 2D-ACE refreshes the panel at a rate of around 60 Hz• The video input can arrive at one half or less of that− Video sources are often interlaced− Interlaced video can mean a new frame every 25 Hz

• By double-buffering the video it is possible to receive a frame while the previous one is being displayed but unless care is taken it is possible to have uneven video playback

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External Use 25

Development Ecosystem

• CodeWarrior• iAR• GCC• PVG illustrator plug-in• PVG Converter tool• Adobe flash• Photoshop

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External Use 26

Conclusion

Live Video and Graphics

The 2D-ACE can composite multiple sources of data including video and static graphics

Allocation and use of memory is an important consideration in system design

Animation effects are very easy to implement

TM

External Use 27

Designing with FreescaleTailored live, hands-on training in a city near you

2014 seminar topics include • QorIQ product family update• Kinetis K, L, E, V series MCU product training

freescale.com/DwF

TM

© 2014 Freescale Semiconductor, Inc. | External Use

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