Windows Vista-Compliant Class D Speaker Amplifiers with ...€¦ · CLASS D AMP CLASS D AMP...

General DescriptionThe MAX9791 combines a stereo 2W Class D poweramplifier, a stereo 180mW DirectDrive® headphoneamplifier, and a 120mA low-dropout (LDO) linear regu-lator in a single device. The MAX9792 combines amono 3W Class D power amplifier, a stereo 180mWDirectDrive headphone amplifier, and a 120mA LDOlinear regulator in a single device.The MAX9791/MAX9792 feature Maxim’s DirectDriveheadphone amplifier architecture that produces aground-referenced output from a single supply, eliminat-ing the need for large DC-blocking capacitors, savingcost, board space, and component height. High 107dBDC PSRR and low 0.006% THD+N ensure clean, low-distortion amplification of the audio signal.The ground sense feature senses and corrects for thevoltage difference between the output jack ground anddevice signal ground. This feature minimizes head-phone amplifier crosstalk by sensing the impedance inthe ground return trace and correcting for it at the out-put jack. This feature also minimizes ground-loop noisewhen the output socket is used as a line out connectionto other grounded equipment (for example, a PC con-nected to a home hi-fi system).The MAX9791/MAX9792 feature low RF susceptibility,allowing the amplifiers to successfully operate in closeproximity to wireless applications. The MAX9791/MAX9792 Class D amplifiers feature Maxim’s spread-spectrum modulation and active emissions limiting cir-cuitry. Industry-leading click-and-pop suppressioneliminates audible transients during power-up and shut-down cycles.The MAX9791/MAX9792 wake-on-beep feature wakesup the speaker and headphone amplifiers when a qual-ified beep signal is detected at the BEEP input.For maximum flexibility, separate speaker and head-phone amplifier control inputs provide independentshutdown of the speaker and headphone amplifiers.Additionally the LDO can be enabled independently ofthe audio amplifiers.The MAX9791/MAX9792 feature thermal-overload andoutput short-circuit protection. The devices are avail-able in 28-pin TQFN packages and are specified overthe -40°C to +85°C extended temperature range.

ApplicationsNotebook Computers

Tablet PCs

Portable Multimedia Players

Features Windows Vista® Premium Compliant Low EMI Filterless Class D Speaker Amplifiers

Pass EN55022B Emissions Limit with 30cm ofSpeaker Cable

180mW DirectDrive Headphone Amplifier Excellent RF Immunity Integrated 120mA LDO Eliminates Headphone Ground Loop Noise Wake-on-Beep Function Click-and-Pop Suppression Short-Circuit and Thermal-Overload Protection Thermally Efficient, Space-Saving Package

28-Pin TQFN-EP (4mm x 4mm x 0.75mm)

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Windows Vista-Compliant Class D SpeakerAmplifiers with DirectDrive Headphone Amplifiers

________________________________________________________________ Maxim Integrated Products 1

19-4217; Rev 1; 6/10

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,or visit Maxim’s website at www.maxim-ic.com.

Ordering Information

PARTSTEREO/

MONOLDO

OUTPUTPIN-PACKAGE

MAX9791AETI+ Stereo 4.75V 28 TQFN-EP*

MAX9791BETI+ Stereo 3.3V 28 TQFN-EP*

MAX9791CETI+ Stereo 1.8V 28 TQFN-EP*

MAX9792AETI+ Mono 4.75V 28 TQFN-EP*

MAX9792CETI+ Mono 1.8V 28 TQFN-EP*

Note: All devices are specified over the -40°C to +85°Cextended temperature range.+Denotes a lead(Pb)-free/RoHS-compliant package.*EP = Exposed pad.

DirectDrive is a registered trademark of Maxim IntegratedProducts, Inc.

Windows Vista is a registered trademark of Microsoft Corp.

MAX9791

SPKR_ENHP_ENLDO_ENBEEP

SPEAKER AND LDOSUPPLY

2.7V TO 5.5VHEADPHONE SUPPLY

2.7V TO 5.5V

AVDD

LDO 1.8V, 3.3V, OR 4.75V

CLASS DAMP

CLASS DAMP

Simplified Block Diagrams

Simplified Block Diagrams continued at end of data sheet.

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ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS(VAVDD = VPVDD = VHPVDD = 5V, VGND = VPGND = VCPGND = 0, ILDO_OUT = 0, CLDO = 2µF (CLDO = 4µF for 1.8V LDO option),C1 = C2 = 1µF. RL = ∞, unless otherwise specified. RIN1 = 20kΩ (AVSPKR = 12dB), RIN2 = 40.2kΩ (AVHP = 0dB), CIN1 = 470nF,CIN2 = CCOM = 1µF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 3)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functionaloperation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure toabsolute maximum rating conditions for extended periods may affect device reliability.

Supply Voltage(AVDD, PVDD, HPVDD to GND)........................-0.3V to +6.0V(AVDD to PVDD) .............................................................±0.3V

GND to PGND, CPGND......................................................±0.3VCPVSS, C1N to GND............................................-6.0V to + 0.3VHPL, HPR to CPVSS ...........................................-0.3V to lower of

(HPVDD - CPVSS + 0.3V) and +9VHPL, HPR to HPVDD..................................+0.3V to the higher of

(CPVSS - HPVDD - 0.3V) and -9VCOM, SENSE........................................................-0.3V to + 0.3VAny Other Pin ..........................................-0.3V to (AVDD + 0.3V)Duration of Short Circuit between OUT_+, OUT_- and GND,

PGND, AVDD, or PVDD..........................................ContinuousDuration of Short Circuit between LDO_OUT and AVDD,

GND (Note 1) .........................................................ContinuousDuration of Short Circuit between HPR, HPL and

GND .......................................................................ContinuousContinuous Current (PVDD, OUT_+, OUT_-, PGND)............1.7AContinuous Current (C1N, C1P, CPVSS, AVDD, HPVDD,

LDO_OUT, HPR, HPL) ..................................................850mA

Continuous Input Current (All Other Pins) ........................±20mAContinuous Power Dissipation (TA = +70°C)

28-Pin Thin QFN Single-Layer Board (derate 20.8mW/°Cabove +70°C)..........................................................1667mW

Junction-to-Ambient Thermal Resistance (θJA)(Note 2) .....................................................................40°C/W

Junction-to-Case Thermal Resistance (θJC)(Note 2) ....................................................................2.7°C/W

28-Pin Thin QFN Multilayer Board (derate 28.6mW/°Cabove +70°C)..........................................................2286mW

Junction-to-Ambient Thermal Resistance (θJA)(Note 2) .....................................................................35°C/W

Junction-to-Case Thermal Resistance (θJC)(Note 2) ....................................................................2.7°C/W

ESD Protection, Human Body Model ...................................±2kVOperating Temperature Range ...........................-40°C to +85°CJunction Temperature ......................................................+150°CStorage Temperature Range .............................-65°C to +150°CLead Temperature (soldering, 10s) .................................+300°C

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

GENERAL

Supply Voltage VAVDD,VPVDD

Guaranteed by PSRR test (Note 4) 2.7 5.5 V

Headphone Supply Voltage VHPVDD Guaranteed by PSRR test 2.7 5.5 V

Undervoltage Lockout UVLO 2.65 V

SPKR_EN HP_EN LDO_EN

1 0 1 250 400 µA

1 1 0 4.4 6

0 0 0 10.5 15

MAX9791

0 1 0 14.4 21

mA

1 0 1 250 400 µA

1 1 0 4.4 6

0 0 0 10.5 18

Quiescent Current IAVDD +IPVD + IHPVDD

MAX9792

0 1 0 14.4 24

mA

Shutdown Current ISHDN SPKR_EN = 1.8V 3.3 7..3 µA

Bias Voltage VBIAS HP_INR, HP_INL, SPKR_INR, SPKR_INL 0 V

Note 1: If short is present at power-up.Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer

board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.

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Shutdown to Full Operation tON 0.4 ms

Overtemperature Threshold +150 °C

SPEAKER AMPLIFIER

RL = 4(MAX9791)

1.7

RL = 8(MAX9791)

1.2

THD+N = 1%, f = 1kHz, TA = +25°C(Note 5) RL = 3

(MAX9792) 3

RL = 4(MAX9791)

2.2

RL = 8(MAX9791)

1.5

Output Power POUT

THD+N = 10%, f = 1kHz, TA = +25°C(Note 5) RL = 3

(MAX9792) 3.7

W

RL = 8 , POUT = 500mW, f = 1kHz (Note 5) 0.04 Total Harmonic Distortion Plus Noise

THD+N RL = 4 , POUT = 500mW, f = 1kHz (Note 5) 0.03

%

VAVDD = VPVDD = 2.7V to 5.5V, TA = +25°C 60 80

f = 217Hz, 200mVP-P 73

f = 1kHz, 200mVP-P 75 Power-Supply Rejection Ratio PSRR

f = 10kHz, 200mVP-P 62

dB

Feedback Impedance RFSKR Guaranteed by design 20 k

Gain AV RIN1 = 20k 12 dB

Output Offset Voltage VOS Measured between OUT_+ and OUT_-, TA = +25°C

±3 ±10 mV

Into shutdown -52.4

Click-and-Pop Level KCP

RL = 8 ,peak voltage, A-weighted, 32 samples per second (Notes 5, 6, and 7)

Out of shutdown

-54

dBV

A-weighted 98 Signal-to-Noise Ratio SNR

RL = 8POUT = 1.2W fIN = 1kHz, (Note 5) 20Hz to 20kHz 94

dB

Noise VN A-weighted 38 µVRMS

L to R, R to L, RL = 8 , VIN = -20dBFS = 100mVRMS, fIN = 1kHz (Note 5)

78

L to R, R to L, RL = 8 , VIN = -20dBFS = 100mVRMS, fIN = 15kHz (Note 5)

70 Crosstalk

HP to SPKR, RLSPKR = 8 , PHP = 20mW, RLHP = 32 , fIN = 1kHz (Note 5)

77

dB

ELECTRICAL CHARACTERISTICS (continued)(VAVDD = VPVDD = VHPVDD = 5V, VGND = VPGND = VCPGND = 0, ILDO_OUT = 0, CLDO = 2µF (CLDO = 4µF for 1.8V LDO option),C1 = C2 = 1µF. RL = ∞, unless otherwise specified. RIN1 = 20kΩ (AVSPKR = 12dB), RIN2 = 40.2kΩ (AVHP = 0dB), CIN1 = 470nF,CIN2 = CCOM = 1µF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 3)

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Class D Switching Frequency fSPK 948 1158 kHz

Spread-Spectrum Bandwidth ±15 kHz

Efficiency POUT = 1.5W, fIN = 1kHz, RL = 8 (Note 5) 83 %

HEADPHONE AMPLIFIER

RL = 16 100 Output Power POUT

THD+N = 1%, f = 1kHz, TA = +25°C RL = 32 180

mW

RL = 32 , fIN = 6kHz, 20kHz AES17, VIN = -3dBFS = 212mVRMS

-78

RL = 10k , fIN = 6kHz, 20kHz AES17, VIN = -3dBFS = 500mVRMS

-87

dBFS

RL = 32 , POUT = 100mW, f = 1kHz 0.006

Total Harmonic Distortion Plus Noise

THD+N

RL = 16 , POUT = 75mW, f = 1kHz 0.014 %

VHPVDD = 2.7V to 5.5V, TA = +25°C 70 107

f = 1kHz, VRIPPLE = 200mVP-P 91 Power-Supply Rejection Ratio PSRR

f = 10kHz, VRIPPLE = 200mVP-P 80

dB

Feedback Impedance RFHP 38.2 40.2 42.2 k

Gain AV RIN2 = 40.2k 0 dB

Output Offset Voltage VOS TA = +25°C ±0.3 ±3 mV

Into shutdown -81

Click-and-Pop Level KCP

RL = 32 ,peak voltage, A-weighted, 32 samples per second (Notes 6, 7)

Out of shutdown

-72.5 dBV

A-weighted 102 Signal-to-Noise Ratio SNR

RL = 32 , POUT = 40mW, fIN = 1kHz 20Hz to 20kHz 94

dB

Noise VN A-weighted 8 µVRMS

Maximum Capacitive Load CL No sustained oscillations 100 pF

RL = 32 , VIN = -20dBFS = 30mVRMS

82 L to R, R to L, fIN= 1kHz, COM and SENSE connected

RL = 10k , VIN = -20dBFS = 0.7mVRMS

89

RL = 32 , VIN = -20dBFS = 30mVRMS

64 L to R, R to L, fIN= 15kHz, COM and SENSE connected

RL = 10k , VIN = -20dBFS = 70.7mVRMS

70

Crosstalk

SPKR to HP, RLSPKR = 8 , PSPKR = 1W, RLHP = 32 , fIN = 1Hz

80

dB


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COM Input Range VCOM Inferred from CMRR test -300 +300 mV

Common-Mode Rejection Ratio CMRR -300mV < VCOM < +300mV 60 dB

Slew Rate SR 0.38 V/µs

Charge-Pump Frequency fOSC 530 kHz

BEEP INPUT (LDO_EN = 1)

Beep Signal Minimum fBEEP Four-cycle count 215 Hz

Amplifier Turn-On Time tONBEEP 0.4 ms

Amplifier Hold Time tHOLDBEEP 221 246 271 ms LOW-DROPOUT LINEAR REGULATORLDO Ground Current ILDO 0.25 0.4 mA

Output Current IOUT Inferred from load regulation 120 mA

Current Limit ILIM 300 mA

Crosstalk Speaker to LDO, VLDO_OUT = 4.75V, f =1kHz, ILDO_OUT = 10mA, speaker POUT= 1.2W, RL = 8 (Note 6)

-80 dB

VLDO_OUT = 4.75V ±1.5 Output-Voltage Accuracy

VLDO_OUT = 3.3V ±1.5 %

IOUT = 50mA 46 Dropout Voltage VDO

VLDO_OUT = 4.75V, TA = +25°C (Note 8) IOUT = 120mA 106

mV

Startup Time 30 µs

VAVDD = 5V to 5.5V, VLDO_OUT = 4.75V, ILDO_OUT = 1mA, CLDO = 2µF

-4.8 1.5 +4.8

VAVDD = 4.5V to 5.5V, VLDO_OUT = 3.3V, ILDO_OUT = 1mA, CLDO = 2µF

-4 0.2 +4 Line Regulation

VAVDD = 3V to 5.5V, VLDO_OUT = 1.8V, ILDO_OUT = 1mA, CLDO = 4µF

-6.4 2.5 +6.4

mV/V

Load Regulation VLDO_OUT = 4.75V, 1mA < ILDO_OUT < 120mA

0.22 mV/mA

f = 1kHz 56 Ripple Rejection

VRIPPLE = 200mVP-P,VLDO_OUT = 4.75V ILDO_OUT = 10mA f = 10kHz 40

dB

Output-Voltage Noise 20Hz to 20kHz, CLDO_OUT = 2 x 1µF, ILDO_OUT = 120mA

130 µVRMS

DIGITAL INPUTS (SPKR_EN, HP_EN, LDO_EN, BEEP)

Input-Voltage High VINH 1.4 V

Input-Voltage Low VINL 0.4 V

Input Bias Current -1 +1 µA


Typical Operating Characteristics(VAVDD = VPVDD = VHPVDD = 5V, VGND = VPGND = VCPGND = 0, ILDO_OUT = 0, CLDO = 2 x 1µF, C1 = C2 = 1µF. RL = ∞, unless oth-erwise specified. RIN1 = 20kΩ (AVSPKR = 12dB), RIN2 = 40.2kΩ (AVHP = 0dB), CIN1 = 470nF, CIN2 = CCOM = 1µF, measurement BW= 20kHz AES17, TA = +25°C, unless otherwise noted. Speaker mode: SPKR_EN = 0, HP_EN = 0. Headphone mode: SPKR_EN = 1,HP_EN = 1.)

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6 _______________________________________________________________________________________

Note 3: All devices are 100% production tested at room temperature. All temperature limits are guaranteed by design.Note 4: AVDD and PVDD must be tied together. If LDO is enabled, set AVDD and PVDD as specified in the Line Regulation row of

the Electrical Characteristics table.Note 5: Testing performed with a resistive load in series with an inductor to simulate an actual speaker load. For RL = 3Ω, L = 22µH.

For RL = 4Ω, L = 33µH. For RL = 8Ω, L = 68µH.Note 6: Specified at TA = +25°C with an 8Ω + 68µH load connected across BTL output for speaker amplifier. Specified at TA = +25°C

with a 32Ω resistive load connected between HPR, HPL and GND for headphone amplifier. Speaker and headphone modetransitions are controlled by SPKR_EN and HP_EN inputs, respectively.

Note 7: Amplifier Inputs AC-coupled to GND.Note 8: Guaranteed by ATE characterization; limits are not production tested.

TOTAL HARMONIC DISTORTION + NOISEvs. FREQUENCY (MAX9792 SPEAKER MODE)

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FREQUENCY (kHz)

THD+

N (d

BFS)

0.1 1 10

-90

-80

-50

-40

-30

-70

-60

-20

-10

0

-1000.01 100

RL = 3ΩVIN = -3dBFS

FS = 707mVRMS

FS = 1VRMS


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2

FREQUENCY (kHz)

THD+

N (d

BFS)

0.1 1 10

-90

-80

-50

-40

-30

-70

-60

-20

-10

0

-1000.01 100


FS = 707mVRMS

FS = 1VRMS


MAX

9791

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3

FREQUENCY (kHz)

THD+

N (d

BFS)

0.1 1 10

-90

-80

-50

-40

-30

-70

-60

-20

-10

0

-1000.01 100


FS = 707mVRMS

FS = 1VRMS

TOTAL HARMONIC DISTORTION + NOISEvs. OUTPUT POWER (MAX9792 SPEAKER MODE)

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4

OUTPUT POWER (W)

THD+

N (%

)

1.0 2.0 3.0

0.01

0.1

1

10

100

0.0010 4.00.5 1.5 2.5 3.5

RL = 3Ω

f = 6kHz

f = 1kHz

f = 100Hz


MAX

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5

OUTPUT POWER (W)

THD+

N (%

)

2.01.51.0

0.01

0.1

1

10

100

0.0010 3.02.50.5

RL = 4Ω

f = 6kHzf = 1kHz

f = 100Hz


MAX

9791

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6

OUTPUT POWER (W)

THD+

N (%

)

0.5 1.0

0.01

0.1

1

10

100

0.0010 2.01.5

RL = 8Ω

f = 6kHzf = 1kHz

f = 100Hz


SPEAKER

Typical Operating Characteristics (continued)(VAVDD = VPVDD = VHPVDD = 5V, VGND = VPGND = VCPGND = 0, ILDO_OUT = 0, CLDO = 2 x 1µF, C1 = C2 = 1µF. RL = ∞, unless oth-erwise specified. RIN1 = 20kΩ (AVSPKR = 12dB), RIN2 = 40.2kΩ (AVHP = 0dB), CIN1 = 470nF, CIN2 = CCOM = 1µF, measurement BW= 20kHz AES17, TA = +25°C, unless otherwise noted. Speaker mode: SPKR_EN = 0, HP_EN = 0. Headphone mode: SPKR_EN = 1,HP_EN = 1.)

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OUTPUT POWER vs. LOAD RESISTANCE(MAX9792 SPEAKER MODE)

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LOAD RESISTANCE (Ω)

OUTP

UT P

OWER

(W)

10

1.0

2.0

3.0

4.0

5.0

0

1.5

2.5

3.5

4.5

0.5

1 100

f = 1kHz

THD+N = 10%

THD+N = 1%


MAX

9791

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7a


OUTP

UT P

OWER

(W)

10

0.5

1.0

1.5

2.0

2.5

01 100

VPVDD = VAVDD = 3.7V

THD+N = 10%

THD+N = 1%


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OUTP

UT P

OWER

(W)

10

1.0

2.0

3.0

0

1.5

2.5

0.5

1 100

f = 1kHz

THD+N = 10%

THD+N = 1%


MAX

9791

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8a


OUTP

UT P

OWER

(W)

10

0.25

0.50

0.75

1.00

1.25

1.50

01 100

VPVDD = VAVDD = 3.7V

THD+N = 10%

THD+N = 1%

EFFICIENCY vs. OUTPUT POWER(MAX9792 SPEAKER MODE)

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OUTPUT POWER (W)

EFFI

CIEN

CY (%

)

1.0 2.0 3.0

70

80

90

100

110

20

10

30

40

50

60

00 4.00.5 1.5 2.5 3.5

RL = 8Ω

RL = 3Ω

fIN = 1kHz


MAX

9791

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9a

OUTPUT POWER (W)

EFFI

CIEN

CY (%

)

1.20.90.60.3

10

20

30

40

50

60

70

80

90

00 1.5

VPVDD = VAVDD = 3.7VfIN = 1kHz

RL = 8Ω

RL = 3Ω


MAX

9791

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0

OUTPUT POWER (W)

EFFI

CIEN

CY (%

)

1.50.90.6

70

80

90

100

20

10

30

40

50

60

00 1.81.20.3

RL = 8Ω

RL = 4Ω

fIN = 1kHz


MAX

9791

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OUTPUT POWER (W)

EFFI

CIEN

CY (%

)

0.80.60.40.2

10

20

30

40

50

60

70

80

90

00 1.0

VPVDD = VAVDD = 3.7VfIN = 1kHz

RL = 8Ω

RL = 4Ω

SPEAKER

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OUTPUT POWER vs. SUPPLY VOLTAGE(MAX9791 SPEAKER MODE)

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9791

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SUPPLY VOLTAGE (V)

OUTP

UT P

OWER

(W)

5.04.54.03.53.0

0.5

1.0

1.5

2.0

2.5

3.0

02.5 5.5

f = 1kHzRLOAD = 4Ω

THD+N = 10%

THD+N = 1%


MAX

9791

toc1

0cSUPPLY VOLTAGE (V)

OUTP

UT P

OWER

(W)

5.04.54.03.53.0

0.5

1.0

1.5

2.0

02.5 5.5

f = 1kHzRLOAD = 8Ω

THD+N = 10%

THD+N = 1%


MAX

9791

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0d

SUPPLY VOLTAGE (V)

OUTP

UT P

OWER

(W)

5.04.54.03.53.0

0.5

1.0

1.5

2.0

2.5

02.5 5.5

f = 1kHzRLOAD = 8Ω

THD+N = 10%

THD+N = 1%


MAX

9791

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0e

SUPPLY VOLTAGE

OUTP

UT P

OWER

(W)

5.04.54.03.53.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

02.5 5.5

f = 1kHzRLOAD = 3Ω

THD+N = 10%

THD+N = 1%

POWER-SUPPLY REJECTION RATIOvs. FREQUENCY (SPEAKER MODE)

MAX

9791

toc1

1

FREQUENCY (kHz)

PSRR

(dB)

1

-30

-20

-10

-80

-90

-70

-60

-50

-40

-1000.01 100

LEFT

RIGHT

0.1 10

0VRIPPLE = 200mVP-PRL = 8Ω

CROSSTALK vs. FREQUENCY(SPEAKER MODE)

MAX

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2

FREQUENCY (kHz)

CROS

STAL

K (d

B)

1

-30

-20

-10

-80

-90

-100

-70

-60

-50

-40

-1100.01 100

RIGHT TO LEFT

LEFT TO RIGHT

0.1 10

0FS = 1VRMSVIN = -20dBFSRL = 8Ω


SPEAKER


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SPEAKER STARTUP WAVEFORMMAX9791 toc13

SPKR_EN2V/div

SPEAKER OUT

200µs/div

SPEAKER SHUTDOWN WAVEFORMMAX9791 toc14

SPKR_EN2V/div

SPEAKER OUT

200µs/div

WIDEBAND OUTPUT SPECTRUM(SPEAKER MODE)

MAX

9791

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5

FREQUENCY (MHz)

OUTP

UT A

MPL

ITUD

E (d

BV)

101

-110-100-90-80-70-60-50-40-30-20-10

0

-1200 100

RBW = 1kHzINPUT AC GROUNDED

OUTPUT FREQUENCY SPECTRUM(SPEAKER MODE)

MAX

9791

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6

FREQUENCY (kHz)

OUTP

UT M

AGNI

TUDE

(dBV

)

10

-100

-60

0

-140

-80

-40

-20

-120

1 205 15

VOUT = -60dBVf = 1kHzRL = 8ΩUNWEIGHTED

SPEAKER

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10 ______________________________________________________________________________________

TOTAL HARMONIC DISTORTION + NOISEvs. FREQUENCY (HEADPHONE MODE)

MAX

9791

toc1

7

FREQUENCY (kHz)

THD+

N (d

BFS)

1

-80

-90

-70

-60

-1000.01 100

FS = 300mVRMS

FS = 1VRMS

0.1 10

-50RL = 16ΩVIN = -3dBFS


MAX

9791

toc1

8

FREQUENCY (kHz)

THD+

N (d

BFS)

1

-80

-90

-70

-60

-1000.01 100

FS = 300mVRMS

FS = 1VRMS

0.1 10

-50VHPVDD = 3VRL = 16ΩVIN = -3dBFS


MAX

9791

toc1

9

FREQUENCY (kHz)

THD+

N (d

BFS)

1

-80

-90

-70

-60

-1000.01 100

FS = 300mVRMS

FS = 1VRMS

0.1 10

-50RL = 32ΩVIN = -3dBFS


MAX

9791

toc2

0

FREQUENCY (kHz)

THD+

N (d

BFS)

1

-80

-90

-70

-60

-1000.01 100

FS = 300mVRMS

FS = 1VRMS

0.1 10

-50VHPVDD = 3VRL = 32ΩVIN = -3dBFS

TOTAL HARMONIC DISTORTION + NOISEvs. OUTPUT POWER (HEADPHONE MODE)

MAX

9791

toc2

1

OUTPUT POWER (mW)

THD+

N (%

)

160

0.1

0.01

1

10

0.0010 200

f = 6kHz

f = 1kHz

f = 100Hz

12040 80

100RL = 16Ω


MAX

9791

toc2

2

OUTPUT POWER (mW)

THD+

N (%

)

0.1

0.01

1

10

0.0010 50 250

f = 6kHz

f = 1kHz

f = 100Hz

200150100

100RL = 32Ω


MAX

9791

toc2

3

OUTPUT POWER (mW)

THD+

N (%

)

10

0.1

0.01

1

10

0.0010 5040 90

f = 6kHzf = 1kHz

f = 100Hz

8070603020

100VHPVDD = 3VRL = 16Ω


MAX

9791

toc2

4A

OUTPUT POWER (mW)

THD+

N (%

)

10

0.1

0.01

1

10

0.0010 5040 70

f = 6kHz

f = 1kHzf = 100Hz

603020

100VHPVDD = 3VRL = 32Ω

OUTPUT POWER vs. LOAD RESISTANCE(HEADPHONE MODE)

MAX

9791

toc2

5


OUTP

UT P

OWER

(mW

)

10

50

150

250

0

100

200

1 100

f = 1kHz

THD+N = 10%

THD+N = 1%

Typical Operating Characteristics (continued)(VAVDD = VPVDD = VHPVDD = 5V, VGND = VPGND = VCPGND = 0, ILDO_OUT = 0, CLDO = 2 x 1µF, C1 = C2 = 1µF. RL = ∞, unless oth-erwise specified. RIN1 = 20kΩ (AVSPKR = 12dB), RIN2 = 40.2kΩ (AVHP = 0dB), CIN1 = 470nF, CIN2 = CCOM = 1µF, measurement BW= 20kHz AES17, TA = +25°C, unless otherwise noted. Speaker mode: SPKR_EN = 0, HP_EN = 0. Headphone mode: SPKR_EN = 1,HP_EN = 1.) HEADPHONE

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HEADPHONE OUTPUT POWERvs. HPVDD

MAX

9791

toc2

9

HPVDD (V)

HEAD

PHON

E OU

TPUT

POW

ER (m

W)

5.04.54.03.53.0

50

100

150

200

250

02.5 5.5

THD+N = 1%f = 1kHz

RL = 32Ω

RL = 16Ω


______________________________________________________________________________________ 11

OUTPUT POWER vs. LOAD RESISTANCE(HEADPHONE MODE)

MAX

9791

toc2

6


OUTP

UT P

OWER

(mW

)

100

50

70

90

0

60

80

10

30

20

40

10 1000

VHPVDD = 3Vf = 1kHz

THD+N = 10%

THD+N = 1%

POWER DISSIPATION vs. OUTPUT POWER(HEADPHONE MODE)

MAX

9791

toc2

7PER CHANNEL OUTPUT POWER (mW)

POW

ER D

ISSI

PATI

ON P

ER C

HANN

EL (m

W)

50 100 150

200

250

300

50

100

150

350

400

00 20025 75 125 175

RL = 32Ω

RL = 16Ω

POWER DISSIPATION vs. OUTPUT POWER(HEADPHONE MODE)

MAX

9791

toc2

8

PER CHANNEL OUTPUT POWER (mW)

POW

ER D

ISSI

PATI

ON P

ER C

HANN

EL (m

W)

20

100

150

200

50

250

300

00 1008040 60

RL = 32Ω

VHPVDD = 3V RL = 16Ω

POWER-SUPPLY REJECTION RATIOvs. FREQUENCY (HEADPHONE MODE)

MAX

9791

toc3

0

FREQUENCY (kHz)

PSRR

(dB)

0.1 1 10

-90-80

-110-100

-50

-40-30

-70-60

-20

-100

-1200.01 100

VRIPPLE = 200mVP-PRL = 32Ω

LEFT

RIGHT

CROSSTALK vs. FREQUENCY(HEADPHONE MODE)

MAX

9791

toc3

1

FREQUENCY (kHz)

CROS

STAL

K (d

B)

0.1 1 10

-90

-80

-50

-40

-30

-70

-60

-20

-1000.01 100

RIGHT TO LEFTCOM AND SENSEDISABLED


LEFT TO RIGHTCOM AND SENSE

RL = 32ΩFS = 300mVRMSVIN = -20dBFS

RIGHT TO LEFTCOM AND SENSE


HEADPHONE

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12 ______________________________________________________________________________________

OUTPUT FREQUENCY SPECTRUM(HEADPHONE MODE)

MAX

9791

toc3

2

FREQUENCY (kHz)

OUTP

UT F

REQU

ENCY

SPE

CTRU

M (d

B)

5 10 15

-120

-100

-40

-20

0

-80

-60

-1400 20

RIGHT AND LEFTFS = 707mVRMSVIN = -60dBFSRL = 32Ω

MAX9791 toc33

HP_EN2V/div

HP_500mV/div

200µs/div

STARTUP WAVEFORM

MAX9791 toc34

HP_EN2V/div

HP_500mV/div

200µs/div

SHUTDOWN WAVEFORM

-130

-90

-110

-50

-70

-30

-10

500 15001000 2000 2500 3000

HEADPHONE RF IMMUNITYvs. FREQUENCY

MAX

9791

toc3

5

FREQUENCY (MHz)

AMPL

ITUD

E (d

BV)

LEFT

RIGHT

RL = 32Ω

HEADPHONE


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______________________________________________________________________________________ 13


MAX

9791

toc3

6

FREQUENCY (kHz)

THD+

N (d

BFS)

0.1 1 10

-90

-100

-80

-50

-40

-30

-70

-60

-20

-10

0

-1100.01 100

RL = 10kΩVIN = -3dBFS

FS = 707mVRMS FS = 1VRMS


MAX

9791

toc3

7FREQUENCY (kHz)

THD+

N (d

BFS)

0.1 1 10

-90

-100

-80

-50

-40

-30

-70

-60

-20

-10

0

-1100.01 100

VHPVDD = 3VRL = 10kΩVIN = -3dBFS

FS = 707mVRMS FS = 1VRMS


MAX

9791

toc3

8

OUTPUT POWER (mW)

THD+

N (%

)

1.0 2.0 3.0

0.001

0.01

0.1

1

10

100

0.00010 4.00.5 1.5 2.5 3.5

RL = 10kΩ

f = 6kHz

f = 1kHz

f = 100Hz


MAX

9791

toc3

9

OUTPUT POWER (mW)

THD+

N (%

)

2.01.51.0

0.001

0.01

0.1

1

10

100

0.00010 3.02.50.5

VHPVDD = 3VRL = 10kΩ

f = 6kHz

f = 1kHz

f = 100Hz


MAX

9791

toc4

0

FREQUENCY (kHz)

CROS

STAL

K (d

B)

0.1 1 10

-90

-80

-110

-100

-50

-40

-30

-70

-60

-20

-1200.01 100


RL = 10kΩFS = 707mVRMSVIN = -20dBFS


OUTPUT FREQUENCY SPECTRUM(HEADPHONE MODE)

MAX

9791

toc4

1

FREQUENCY (kHz)

OUTP

UT F

REQU

ENCY

SPE

CTRU

M (d

B)

5 10 15

-120

-100

-40

-20

0

-80

-60

-1400 20

RIGHT AND LEFTRL = 10kΩFS = 300mVRMSVIN = -60dBFS


LINE OUT

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14 ______________________________________________________________________________________

SUPPLY CURRENT vs. SUPPLY VOLTAGE

MAX

9791

toc4

2

SUPPLY VOLTAGE (V)

SUPP

LY C

URRE

NT (m

A)

4.75 5.00

0

5

10

15

20

-54.50 5.505.25

LDO_EN = 1, VLDO = 3.3V OR 4.75V

SPKR_EN = 1HP_EN = 0




SUPPLY CURRENT vs. SUPPLY VOLTAGE

MAX

9791

toc4

2aSUPPLY VOLTAGE (V)

SUPP

LY C

URRE

NT (m

A)

5.04.54.03.53.0

0

5

10

15

20

-52.5 5.5

LDO_EN = 1VLDO_OUT = 1.8V

SPKR_EN = 1

SPKR_EN = 1

SPKR_EN = 0

SPKR_EN = 0

SHUTDOWN CURRENT vs. SUPPLY VOLTAGE

MAX

9791

toc4

3

SUPPLY VOLTAGE (V)

SHUT

DOW

N CU

RREN

T (µ

A)

5.04.53.0 3.5 4.0

1

2

3

4

5

6

7

8

02.5 5.5

SPKR_EN = 1HP_EN = 0LDO_EN = 0


GENERAL

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______________________________________________________________________________________ 15

LDO OUTPUT ACCURACYvs. LOAD CURRENT

MAX

9791

toc4

4

LOAD CURRENT (mA)

LDO

OUTP

UT A

CCUR

ACY

(%)

12575

-1.0

-1.5

0

0.5

1.0

-0.5

1.5

2.0

-2.00 15025 10050

LDO OUTPUT ACCURACYvs. AMPLIFIER OUTPUT POWER

MAX

9791

toc4

5AMPLIFIER OUTPUT POWER (mW)

LDO

OUTP

UT A

CCUR

ACY

(%)

300

0.04

0.03

0.02

0.01

0.06

0.07

0.08

0.05

0.09

0.10

00 15001200600 900

LDO OUTPUT ACCURACYvs. TEMPERATURE

MAX

9791

toc4

6

TEMPERATURE (°C)

LDO

OUTP

UT A

CCUR

ACY

(%)

603510-15

-0.5

0

0.5

1.0

-1.0-40 85

VLDO_OUT = 3.3VVLDO_OUT = 1.8V

VLDO_OUT = 4.75V

0

100

50

200

150

250

300

0 100 15050 200 250 300

LDO DROPOUT VOLTAGE vs. LOAD

MAX

9791

toc4

7

ILOAD (mA)

LDO

DROP

OUT

VOLT

AGE

(mV)

LDO_OUT = 4.75V

LDO POWER-SUPPLY REJECTION RATIOvs. FREQUENCY

MAX

9791

toc4

8

FREQUENCY (kHz)

PSRR

(dB)

1010.1

-80

-60

-40

-20

0

20

40

-1000.01 100

VRIPPLE = 200mVP-PILOAD = 10mA

VLDO_OUT = 3.3V

VLDO_OUT = 1.8V

VLDO_OUT = 4.75V

LDO OUTPUT NOISE

MAX

9791

toc4

9

FREQUENCY (kHz)

LDO

OUTP

UT N

OISE

(µV)

1010.1

75

100

125

150

175

200

500.01 100

CLOAD = 2 x 1µFILOAD = 120mA


LDO

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16 ______________________________________________________________________________________

1.00ms/div

LINE-TRANSIENT RESPONSE

CH1 LOW4.560V

CH1 HIGH5.500V

CH2 HIGH1.000mV

CH2 LOW800.0µV

MAX9791 toc50

100ms/div

LOAD-TRANSIENT RESPONSE

ILDO_OUT50mA/div

MAX9791 toc51

AC-COUPLEDVLDO_OUT10mV/div

200µs/div

SHUTDOWN RESPONSE

LDO_EN2V/div

MAX9791 toc52

VLDO_EN2V/div

CROSSTALK vs. FREQUENCYSPEAKER TO LDO

MAX

9791

toc5

3

FREQUENCY (kHz)

CROS

STAL

K (d

B)

1010.1

-120-110-100-90-80-70-60-50-40-30-20-10

0

-1300.01 100

BOTH SPEAKERS WITH SIGNALPSPKR = 1.2WRLSPKR = 8WILDO = 10mA

LEFT CHANNEL TO LDO

RIGHT CHANNEL TO LDO


LDO

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______________________________________________________________________________________ 17

MAX9791 Pin Description PIN NAME FUNCTION

1 SPKR_INL Left-Channel Speaker Amplifier Input

2 HP_INR Right-Channel Headphone Amplifier Input

3 HP_INL Left-Channel Headphone Amplifier Input

4 COM Common-Mode Voltage Sense Input

5 GND Signal Ground. Star connect to PGND.

6 LDO_OUT LDO Output. Bypass the MAX9791A/MAX9791B with two 1µF ceramic low ESR capacitors to GND. Bypass the MAX9791C with two 2µs ceramic low ESR capacitors to GND.

7 AVDD Positive Power-Supply and LDO Input. Bypass with a 0.1µF and two 1µF capacitors to GND.

8 LDO_EN LDO Enable. Connect LDO_EN to AVDD to enable the LDO.

9 HPR Right-Channel Headphone Amplifier Output

10 HPL Left-Channel Headphone Amplifier Output

11 SENSE Headphone Ground Sense

12 CPVSS Headphone Amplifier Negative Power Supply. Connect a 1µF capacitor between CPVSS and PGND.

13 C1N Charge-Pump Flying Capacitor Negative Terminal. Connect a 1µF capacitor between C1P and C1N.

14 CPGND Charge-Pump Ground. Connect directly to PGND plane.

15 C1P Charge-Pump Flying Capacitor Positive Terminal. Connect a 1µF capacitor between C1P and C1N.

16 HPVDD Headphone Amplifier Positive Power Supply. Connect a 10µF capacitor between HPVDD and PGND.

17, 26 PVDD Speaker Amplifier Power-Supply Input. Bypass with a 0.1µF capacitor to PGND.

18 OUTL- Left-Channel Speaker Amplifier Output, Negative Phase

19 OUTL+ Left-Channel Speaker Amplifier Output, Positive Phase

20, 23 PGND Power Ground. Star connect to GND.

21 BEEP PC Beep Input. Connect to GND if beep detection function is disabled.

22 HP_EN Active-High Headphone Amplifier Enable

24 OUTR+ Right-Channel Speaker Amplifier Output, Positive Phase

25 OUTR- Right-Channel Speaker Amplifier Output, Negative Phase

27 SPKR_EN Active-Low Speaker Amplifier Enable

28 SPKR_INR Right-Channel Speaker Amplifier Input

— EP Exposed Pad. Connect to GND.

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18 ______________________________________________________________________________________

Detailed DescriptionThe MAX9791 combines a stereo 2W Class D poweramplifier, a stereo 175mW DirectDrive headphoneamplifier, and a 120mA LDO linear regulator in a singledevice. The MAX9792 combines a mono 3W Class Dpower amplifier, a stereo 175mW DirectDrive head-phone amplifier, and a 120mA LDO linear regulator in asingle device.

The MAX9791/MAX9792 feature wake-on-beep detec-tion, comprehensive click-and-pop suppression, low-power shutdown mode, and excellent RF immunity.These devices incorporate an integrated LDO thatserves as a clean power supply for CODEC or other cir-cuits. The MAX9791/MAX9792 are Windows VistaPremium compliant. See Table 1 for a comparison of theWindows Vista Premium specifications and MAX9791/MAX9792 specifications.

The MAX9791/MAX9792 feature spread-spectrum mod-ulation and active emission limiting circuitry that offerssignificant improvements to switch-mode amplifier tech-nology. These devices offer Class AB performance withClass D efficiency in a minimal board-space solution.

The headphone amplifiers use Maxim’s DirectDrivearchitecture to eliminate the bulky output DC-blockingcapacitors required by traditional headphone ampli-fiers. A charge pump inverts the positive supply(HPVDD) to create a negative supply (CPVSS). Theheadphone amplifiers operate from these bipolar sup-plies with their outputs biased about GND. The bene-fit of the GND bias is that the amplifier outputs nolonger have a DC component (typically VDD/2). Thisfeature eliminates the large DC-blocking capacitorsrequired with conventional headphone amplifiers to

MAX9792 Pin Description PIN NAME FUNCTION

1, 5 GND Signal Ground. Star connect to PGND.

2 HP_INR Right-Channel Headphone Amplifier Input

3 HP_INL Left-Channel Headphone Amplifier Input

4 COM Common-Mode Voltage Sense Input

6 LDO_OUT LDO Output. Bypass with two 1µF ceramic low ESR capacitors to GND.

7 AVDD Positive Power Supply and LDO Input. Bypass with a 0.1µF and two 1µF capacitors to GND.

8 LDO_EN LDO Enable. Connect LDO_EN to AVDD to enable the LDO.

9 HPR Right-Channel Headphone Amplifier Output

10 HPL Left-Channel Headphone Amplifier Output

11 SENSE Headphone Ground Sense

12 CPVSS Headphone Amplifier Negative Power Supply. Connect a 1µF capacitor between CPVSS and PGND.

13 C1N Charge-Pump Flying Capacitor Negative Terminal. Connect a 1µF capacitor between C1P and C1N.

14 CPGND Charge-Pump Ground. Connect directly to PGND plane.

15 C1P Charge-Pump Flying Capacitor Positive Terminal. Connect a 1µF capacitor between C1P and C1N.

16 HPVDD H ead p hone Am p l i fi er P osi ti ve P ow er S up p l y. C onnect a 10µF cap aci tor b etw een H P V D D and P GN D .

17, 26 PVDD Speaker Amplifier Power-Supply Input. Bypass with a 0.1µF capacitor to PGND.

18, 25 OUT- Speaker Amplifier Output, Negative Phase

19, 24 OUT+ Speaker Amplifier Output, Positive Phase

20, 23 PGND Power Ground. Star connect to GND.

21 BEEP PC Beep Input. Connect to GND if beep detection function is disabled.

22 HP_EN Active-High Headphone Amplifier Enable

27 SPKR_EN Active-Low Speaker Amplifier Enable

28 SPKR_IN Speaker Amplifier Input

— EP Exposed Pad. Connect to GND.

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______________________________________________________________________________________ 19

conserve board space and system cost, as well asimprove low-frequency response and distortion.

The MAX9791/MAX9792 amplifiers feature an under-voltage lockout that prevents operation from an insuffi-cient power supply and click-and-pop suppression thateliminates audible transients on startup and shutdown.The amplifiers include thermal overload and short-cir-cuit protection.

Class D Speaker AmplifierThe MAX9791/MAX9792 integrate a filterless class Damplifier that offers much higher efficiency than class ABamplifiers. The high efficiency of a Class D amplifier isdue to the switching operation of the output stage tran-sistors. In a Class D amplifier, the output transistors actas current steering switches and consume negligibleadditional power. Any power loss associated with theClass D output stage is mostly due to the I2R loss of theMOSFET on-resistance and quiescent current overhead.

The theoretical best efficiency of a linear amplifier is78%, however, that efficiency is only exhibited at peakoutput power. Under normal operating levels (typicalmusic reproduction levels), efficiency falls below 45%,whereas the MAX9791/MAX9792 exhibit 67% efficiencyunder the same conditions (Figure 1).

Ultra-Low EMI Filterless Output StageIn traditional Class D amplifiers, the high dv/dt of therising and falling edge transitions resulted in increasedelectromagnetic-interference (EMI) emissions, whichrequired the use of external LC filters or shielding tomeet EN55022B EMI regulation standards. Limiting thedv/dt normally results in decreased efficiency. Maxim’sactive emissions limiting circuitry actively limits thedv/dt of the rising and falling edge transitions, providingreduced EMI emissions while maintaining up to 83%efficiency.

0

20

10

50

40

30

80

70

60

90

0 0.500.25 0.75 1.00 1.25 1.50

EFFICIENCY vs. IDEALCLASS AB EFFICIENCY

OUTPUT POWER (W)

EFFI

CIEN

CY (%

)

IDEAL CLASS AB

MAX9791

Figure 1. MAX9791 Efficiency vs. Class AB Efficiency

DEVICE TYPE REQUIREMENTWINDOWS PREMIUM

MOBILE VISTASPECIFICATIONS

MAX9791/MAX9792TYPICAL PERFORMANCE

THD+N ≤ -65dB FS [100Hz, 20kHz] 87dBFS [100Hz, 20kHz]

Dynamic range with signalpresent

≤ -80dBV, A-weighted [20Hz,20kHz]

-98.9dB A-weighted [20Hz, 20kHz]Analog Line-Out Jack(RL = 10kΩ, FS =0.707VRMS)

Line output crosstalk ≤ -50dB [20Hz, 15kHz] 64dB [20Hz, 15kHz]

THD+N ≤ -45dB FS [100Hz, 20kHz] 82dBFS [100Hz, 20kHz]

Dynamic range with signalpresent

≤ -60dBV, A-weighted [20Hz,20kHz]

-91.5dB A-weighted [20Hz, 20kHz]Analog Headphone-OutJack (RL = 32Ω, FS =0.300VRMS) Headphone output

crosstalk≤ -50dB [20Hz, 15kHz] 64dB [20Hz, 15kHz]

Table 1. Windows Premium Mobile Vista Specifications vs. MAX9791/MAX9792Specifications

Note: THD+N, dynamic range with signal present, and crosstalk should be measured in accordance with AES17 audio measure-ments standards.

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20 ______________________________________________________________________________________

In addition to active emission limiting, the MAX9791/MAX9792 feature spread-spectrum modulation that flat-tens the wideband spectral components. Proprietarytechniques ensure that the cycle-to-cycle variation of theswitching period does not degrade audio reproductionor efficiency (see the Typical Operating Characteristics).In spread-spectrum modulation mode, the switching fre-quency varies randomly by ±15kHz around the centerfrequency (530kHz). The effect is to reduce the peakenergy at harmonics of the switching frequency. Above10MHz, the wideband spectrum looks like noise for EMIpurposes (see Figure 2).

Speaker Current LimitWhen the output current of the speaker amplifierexceeds the current limit (2A, typ) the MAX9791/MAX9792 disable the outputs for approximately 100µs.At the end of 100µs, the outputs are re-enabled. If thefault condition still exists, the MAX9791/MAX9792 con-tinue to disable and re-enable the outputs until the faultcondition is removed.

DirectDrive Headphone AmplifierTraditional single-supply headphone amplifiers bias theoutputs at a nominal DC voltage (typically half the sup-ply). Large coupling capacitors are needed to blockthis DC bias from the headphone. Without these capac-itors, a significant amount of DC current flows to theheadphone, resulting in unnecessary power dissipationand possible damage to both headphone and head-phone amplifier.

Maxim’s DirectDrive architecture uses a charge pumpto create an internal negative supply voltage. Thisallows the headphone outputs of the MAX9791/MAX9792 to be biased at GND while operating from asingle supply (Figure 3). Without a DC component,there is no need for the large DC-blocking capacitors.Instead of two large (220µF, typ) capacitors, theMAX9791/MAX9792 charge pump requires two small1µF ceramic capacitors, conserving board space,reducing cost, and improving the frequency responseof the headphone amplifier.

The MAX9791/MAX9792 feature a low-noise chargepump. The nominal switching frequency of 530kHz iswell beyond the audio range, and thus does not inter-fere with audio signals. The switch drivers feature acontrolled switching speed that minimizes noise gener-ated by turn-on and turn-off transients. By limiting theswitching speed of the charge pump, the di/dt noisecaused by the parasitic trace inductance is minimized.

CLASS D EMI PLOT

FREQUENCY (MHz)

AMPL

ITUD

E (d

BµV/

m)

100

10

15

20

25

30

35

40

530 1000

EN55022B LIMIT

Figure 2. EMI with 30cm of Speaker Cable

VDD

VDD/2

GNDCONVENTIONAL AMPLIFIER BIASING SCHEME

DirectDrive AMPLIFIER BIASING SCHEME

+VDD

GND

-VDD

VOUT

VOUT

Figure 3. Traditional Amplifier Output vs. MAX9791/MAX9792DirectDrive Output

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______________________________________________________________________________________ 21

Common-Mode SenseWindows Vista-compliant platforms are restricted to only115mΩ of ground return impedance. If the headphonejack ground is connected close to the audio deviceground using a solid ground plane, the return path resis-tance can be quite low. However, it is often necessary tolocate some jacks far from the audio device. TheMAX9791/MAX9792 COM and SENSE inputs allow theheadphone jack to be placed further away from thedevice without degrading crosstalk performance.

The MAX9791/MAX9792 SENSE and COM inputs senseand correct for the difference between the headphonereturn and device ground. When using common-modesense, connect COM through a resistor to GND of thedevice (Figure 4). For optimum common-mode rejec-tion, use the same value resistors for RIN2 and RCOM.To improve AC CMRR, add a capacitor equal to CIN2between GND and RCOM.

Configuring SENSE and COM in this way improves sys-tem crosstalk performance by reducing the negativeeffects of the headphone jack ground return resistance.

The headphone amplifier output impedance, traceresistance, and contact resistance of the jack aregrouped together to represent the source resistance,RS. The resistance between the load and the sleeve,the sleeve contact resistance, and the system groundreturn resistance are grouped together to represent theground resistance, RG.

Assuming a typical source resistance of 5Ω, the groundreturn impedance would need to be limited to 115mΩto meet Windows Vista’s crosstalk specification of 50dB(Figure 5). This is further complicated by the fact thatthe impedance of the sleeve connection in the 3.5mmstereo jack can make up 30mΩ–90mΩ alone.

The MAX9791/MAX9792 COM and SENSE inputsreduce crosstalk performance by eliminating effects of28.5mΩ of ground return path resistance. If groundsensing is not required, connect COM directly to GNDand leave SENSE unconnected (Figure 6).

Wake-on-BeepThe MAX9791/MAX9792 beep-detection circuit wakesup the device (speaker and headphone amplifiers)once a qualified beep signal is detected at BEEP andthe LDO is enabled. The amplifier wake command fromthe beep-detection circuit overrides the logic signalapplied at HP_EN and SPKR_EN.

Crosstalk in dBR

R RG

L S=

+⎛

⎝⎜⎞

⎠⎟20 log

RIN2

RFHP

RFHP

RFHP

COM

HP_INL

HPL

RCOM

SENSE

RIN2

HP_INR

HPR

CIN2

CCOM

CIN2

Figure 4. Connecting COM for Ground Sense

-80

-75

-70

-65

-60

-55

-50

-45

-40

0 0.0500.025 0.075 0.100 0.125 0.150

CROSSTALKvs. GROUND RESISTANCE (RG)

RG (Ω)

CROS

STAL

K (d

B)

RS = 5ΩRL = 32Ω

Figure 5. Crosstalk vs. Ground Resistance

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A qualified BEEP signal consists of a 3.3V typical,215Hz minimum signal that is present at BEEP for fourconsecutive cycles. Once the first rising edge transitionis detected at BEEP, the beep circuit wakes up andbegins counting the beep cycles. Once four consecu-tive cycles of a qualified beep signal are counted, thedevice (speaker and headphone amplifiers) enableswithin 400µs. If the first rising edge is not followed bythree consecutive rising edges within 16ms, the deviceremains shutdown (i.e., glitch protection).

The device (speaker and headphone amplifiers) returnsto its programmed logic state once 246ms has elapsedfrom the time the last rising edge was detected. This246ms amplifier hold time ensures complete beep pro-files are passed to the amplifier outputs (Figure 7).Ground BEEP when the wake-on-beep feature is notused. Do not leave BEEP unconnected.

Low-Dropout Linear RegulatorThe LDO regulator can be used to provide a cleanpower supply to a CODEC or other circuitry. The LDOcan be enabled independently of the audio amplifiers.Set LDO_EN = AVDD to enable the LDO or set LDO_EN= GND to disable the LDO. The LDO can provide up to120mA of continuous current.

Speaker and Headphone Amplifier EnableThe MAX9791/MAX9792 feature control inputs for theindependent enabling of the speaker and headphoneamplifiers, allowing both to be active simultaneouslyif required. Driving SPKR_EN high disables the speakeramplifiers. Driving HP_EN low independently disablesthe headphone amplifiers. For applications thatrequire only one of the amplifiers to be on at a given

time, connect SPKR_EN and HP_EN together, allowinga single logic voltage to enable either the speaker orthe headphone amplifier as shown in Figure 8.

ShutdownThe MAX9791/MAX9792 feature a low-power shutdownmode, drawing 3.3µA of supply current. By disablingthe speaker, headphone amplifiers, and the LDO, theMAX9791/MAX9792 enter low-power shutdown mode.Set SPKR_EN to AVDD and HP_EN and LDO_EN toGND to disable the speaker amplifiers, headphoneamplifiers, and LDO, respectively.


FREQUENCY (kHz)

CROS

STAL

K (d

B)

1010.1

-90

-80

-70

-60

-50

-40

-30

-20

-1000.01 100

RL = 32ΩFS = 300mVRMSVOUT = -20dBFS



LEFT TO RIGHTCOM AND SENSEDISABLED


Figure 6. MAX9791/MAX9792 COM and SENSE Inputs ReduceCrosstalk

1 2 3 4BEEP

SPKR AND HPAMPS ENABLE

400µs

240ms

16ms

Figure 7. Qualified BEEP Signal Timing

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Click-and-Pop SuppressionThe MAX9791/MAX9792 feature a common-mode biasvoltage of 0V. A 0V BIAS allows the MAX9791/MAX9792to quickly turn on/off with no resulting clicks and pops.With the HDA CODEC outputs biased and theMAX9791/MAX9792 inputs sitting as 0V in shutdownand normal operation, the RIN x CIN time constant iseliminated.

Speaker AmplifierThe MAX9791/MAX9792 speaker amplifiers featureMaxim’s comprehensive, industry leading click-and-pop suppression. During startup and shutdown, theclick-and-pop suppression circuitry eliminates anyaudible transient sources internal to the device.

Headphone AmplifierIn conventional single-supply headphone amplifiers,the output-coupling capacitor is a major contributor ofaudible clicks and pops. Upon startup, the amplifiercharges the coupling capacitor to its bias voltage, typi-cally VDD/2. During shutdown, the capacitor is dis-charged to GND; a DC shift across the capacitorresults, which in turn appears as an audible transient atthe speaker. Because the MAX9791/MAX9792 do notrequire output-coupling capacitors, no audible transientoccurs.

The MAX9791/MAX9792 headphone amplifiers featureextensive click-and-pop suppression that eliminatesany audible transient sources internal to the device.

Applications InformationFilterless Class D Operation

Traditional Class D amplifiers require an output filter torecover the audio signal from the amplifier’s output. Thefilters add cost and size and can decrease efficiencyand THD+N performance. The traditional PWM schemeuses large differential output swings (2 x PVDD peak-to-peak) causing large ripple currents. Any parasiticresistance in the filter components results in a loss ofpower, lowering the efficiency.

The MAX9791/MAX9792 do not require an output filter.The devices rely on the inherent inductance of the speak-er coil and the natural filtering of both the speaker andthe human ear to recover the audio component of thesquare-wave output. Eliminating the output filter results ina smaller, less costly, and more efficient solution.

Because the frequency of the MAX9791/MAX9792 out-put is well beyond the bandwidth of most speakers,voice coil movement due to the square-wave frequencyis very small. For optimum results, use a speaker with aseries inductance > 10µH. Typical 8Ω speakers exhibitseries inductances in the 20µH to 100µH range.

MAX9791MAX9792

SPKR_ENSINGLE

CONTROL

HP_EN

Figure 8. Enabling Either the Speaker or Headphone Amplifierwith a Single Control Pin

MAX9791

SPKR_IN_RIN1OUT_+

OUT_-

MONOCLASS D

AMPLIFIER

RFB20kΩ

CIN1

Figure 9. Setting Speaker Amplifier Gain

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Setting Speaker Amplifier GainExternal input resistors in conjunction with the internalfeedback resistors (RFSPKR) set the speaker amplifiergain of the MAX9791/MAX9792. Set gain by usingresistor RIN1 as follows (Figure 9):

where AVSPKR is the desired voltage gain. An RIN1 of20kΩ yields a gain of 4V/V, or 12dB.

Component SelectionOptional Ferrite Bead Filter

In applications where speaker leads exceed 15cm, usea filter constructed from a ferrite bead and a capacitorto ground (Figure 10) to provide additional EMI sup-pression. Use a ferrite bead with low DC resistance,high frequency (> 1.2MHz) impedance of 100Ω to600Ω, and rated for at least 1A. The capacitor valuevaries based on the ferrite bead chosen and the actualspeaker lead length. Select the capacitor value basedon EMI performance.

Output Power (Headphone Amplifier)The headphone amplifiers are specified for the worst-case scenario when both inputs are in phase. Underthis condition, the drivers simultaneously draw currentfrom the charge pump, leading to a slight loss in head-room of CPVSS. In typical stereo audio applications, theleft and right signals have differences in both magni-tude and phase, subsequently leading to an increase inthe maximum attainable output power. Figure 11 showsthe two extreme cases for in and out of phase. In mostcases, the available power l ies between theseextremes.

Headphone Amplifier GainGain-Setting Resistors

External input resistors in conjunction with the internalfeedback resistors (RFHP) set the headphone amplifiergain of the MAX9791/MAX9792. Set gain by usingresistor RIN2 (Figure 4) as follows:

where AVHP is the desired voltage gain. An RIN2 of40.2kΩ yields a gain of 1V/V, or 0dB.

Power SuppliesThe MAX9791/MAX9792 speaker amplifiers are pow-ered from PVDD with a range from 2.7V to 5.5V. Theheadphone amplifiers are powered from HPVDD andCPVSS. HPVDD is the positive supply of the headphoneamplifiers and charge pump ranging from 2.7V to 5.5V.CPVSS is the negative supply of the headphone ampli-fiers. The charge pump inverts the voltage at HPVDD,and the resulting voltage appears at CPVSS. AVDDpowers the LDO and the remainder of the device.AVDD and PVDD must be tied together. If LDO isenabled, set AVDD and PVDD as specified in the LineRegulation row of the Electrical Characteristics table.

Ak

RV VVHP

IN=

⎛⎝⎜

⎞⎠⎟

-40 2

2

./

Ω

Ak

RV VVSPKR

IN=

⎛⎝⎜

⎞⎠⎟

-420

1

Ω/

MAX9791MAX9792

L1*

L2*330pF 330pF

*L1 = L2 = WÜRTH 742792040

Figure 10. Optional Ferrite Bead Filter


OUTPUT POWER (mW)

THD+

N (%

)

20015010050

0.01

0.1

1

10

100

0.0010 250

RL = 32Ω

OUT OF PHASE

IN PHASE

Figure 11. Output Power vs. Supply Voltage with Inputs In/Outof Phase; 32Ω Load Conditions and 3.5dB Gain

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Component SelectionSpeaker Amplifier Power-Supply Input (PVDD)

PVDD powers the speaker amplifiers. PVDD rangesfrom 2.7V to 5.5V. AVDD and PVDD must be tiedtogether. If LDO is enabled, set AVDD and PVDD asspecified in the Line Regulation row of the ElectricalCharacteristics table. Bypass PVDD with a 0.1µFcapacitor to PGND. Apply additional bulk capacitanceat the device if long input traces between PVDD andthe power source are used.

Headphone Amplifier Power-Supply Input(HPVDD and CPVSS)

The headphone amplifiers are powered from HPVDDand CPVSS. HPVDD is the positive supply of the head-phone amplifiers and ranges from 2.7V to 5.5V. BypassHPVDD with a 10µF capacitor to PGND. CPVSS is thenegative supply of the headphone amplifiers. BypassCPVSS with a 1µF capacitor to PGND. The chargepump inverts the voltage at HPVDD, and the resultingvoltage appears at CPVSS. A 1µF capacitor should beconnected between C1N and C1P.

Positive Power Supply and LDO Input (AVDD)The internal LDO and the remainder of the device arepowered by AVDD. AVDD ranges from 2.7V to 5.5V.AVDD and PVDD must be tied together. If LDO isenabled, set AVDD and PVDD as specified in LDO lineregulation. Bypass AVDD with a 0.1µF capacitor toGND and two 1µF capacitors to GND. Note additionalbulk capacitance is required at the device if long inputtraces between AVDD and the power source are used.

Input FilteringThe input capacitor (CIN_), in conjunction with the ampli-fier input resistance (RIN_), forms a highpass filter thatremoves the DC bias from the incoming signal. The AC-coupling capacitor allows the amplifier to bias the signalto an optimum DC level. Assuming zero source imped-ance, the -3dB point of the highpass filter is given by:

RIN_ is the amplifier’s external input resistance value.Choose CIN_ such that f-3dB is well below the lowestfrequency of interest. Setting f-3dB too high affectsthe amplifier’s low frequency response. Use capaci-tors with adequately low-voltage coefficients (seeFigure 12). Capacitors with higher voltage coeffi-cients, such as ceramics, result in increased distor-tion at low frequencies.

Charge-Pump Capacitor SelectionUse capacitors with an ESR less than 100mΩ for opti-mum performance. Low ESR ceramic capacitors mini-mize the output resistance of the charge pump. Forbest performance over the extended temperaturerange, select capacitors with an X7R dielectric.

Flying Capacitor (C1)The value of the flying capacitor (C1) affects the loadregulation and output resistance of the charge pump. AC1 value that is too small degrades the device’s abilityto provide sufficient current drive, which leads to a lossof output voltage. Connect a 1µF capacitor betweenC1P and C1N.

fR CdB

IN IN-3

12

=π _ _

INPUT COUPLING CAPACITOR-INDUCED THD+Nvs. FREQUENCY (HEADPHONE MODE)

FREQUENCY (kHz)

THD+

N (d

BFS)

100

-90

-80

-70

-60

-50

-10010 1000

0603 10V X5R 10% 1µF

0805 50V X7R 10% 1µF

VOUT - -3dBFSFS = 1VRMSRL =32Ω

0603 10V X7R 10% 1µF

0402 6.3V X5R 10% 1µF

Figure 12. Input Coupling Capacitor-Induced THD+N vs.Frequency

SPEAKER RF IMMUNITYvs. FREQUENCY

FREQUENCY (MHz)

AMPL

ITUD

E (d

BV)

2500200015001000500

-120-110-100-90-80-70-60-50-40-30-20-10

0

-1300 3000

RIGHT

LEFT

Figure 13. Speaker RF Immunity

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26 ______________________________________________________________________________________

Charge-Pump Output Capacitor (C2)Connect a 1µF capacitor between CPVSS and PGND.

LDO Output Capacitor (CLDO)Connect 2 x 1µF capacitors between LDO_OUT andGND for 4.75V and 3.3V LDO options (MAX979_A andMAX979_B, respectively). Connect two parallel 2µFcapacitors between LDO_OUT and GND for the 1.8VLDO option (MAX979_C).

Layout and GroundingProper layout and grounding are essential for optimumperformance. Use large traces for the power-supplyinputs and amplifier outputs to minimize losses due toparasitic trace resistance, as well as route heat awayfrom the device. Good grounding improves audio per-formance, minimizes crosstalk between channels, andprevents switching noise from coupling into the audiosignal. Connect PGND and GND together at a singlepoint on the PCB. Route PGND and all traces that carryswitching transients away from GND, and the tracesand components in the audio signal path.

Connect C2 to the PGND plane. Place the charge-pump capacitors (C1, C2) as close as possible to thedevice. Bypass PVDD with a 0.1µF capacitor to PGND.Place the bypass capacitors as close as possible to thedevice.

The MAX9791/MAX9792 is inherently designed forexcellent RF immunity. For best performance, addground fills around all signal traces on top or bottomPCB planes.

Use large, low-resistance output traces. As load imped-ance decreases, the current drawn from the device out-puts increase. At higher current, the resistance of theoutput traces decrease the power delivered to the load.For example, if 2W is delivered from the speaker outputto a 4Ω load through a 100mΩ trace, 49mW is wastedin the trace. If power is delivered through a 10mΩtrace, only 5mW is wasted in the trace. Large output,supply, and GND traces also improve the power dissi-pation of the device.

The MAX9791/MAX9792 thin QFN package features anexposed thermal pad on its underside. This pad lowersthe package’s thermal resistance by providing a directheat conduction path from the die to the printed circuitboard. Connect the exposed thermal pad to GND byusing a large pad and multiple vias to the GND plane.

Chip InformationPROCESS: BiCMOS

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MAX9792

SPKR_ENHP_EN

LDO_EN

BEEP

SPEAKER AND LDOSUPPLY

2.7V TO 5.5VHEADPHONE SUPPLY

2.7V TO 5.5V

SPKR_IN

HP_INR

HP_INL

CLASS DAMP

AVDD

LDO 1.8V OR 4.75V

Simplified Block Diagrams(continued)

26

27

25

24

10

9

11

HP_I

NR

COM

GND

LDO_

OUT

AVDD

12

SPKR

_INL

PGND

OUTL

-

PVDD

BEEP

HPVD

D

C1P

1 2

OUTR-

4 5 6 7

2021 19 17 16 15

PVDD

SPKR_EN

CPVSS

SENSE

HPL

HPR

MAX9791

HP_I

NLOU

TL+

3

18

28 8SPKR_INR LDO_EN

OUTR+

23 13 C1NPGND

22 14 CPGNDHP_EN

TQFN(4mm x 4mm x 0.75mm)

TOP VIEW

+*EP

*EP = EXPOSED PAD

26

27

25

24

10

9

11

HP_I

NR

COM

GND

LDO_

OUT

AVDD

12

GND

PGND

OUT-

PVDD

BEEP

HPVD

D

C1P

1 2

OUT-

4 5 6 7

2021 19 17 16 15

PVDD

SPKR_EN

CPVSS

SENSE

HPL

HPR

MAX9792

HP_I

NLOU

T+

3

18

28 8SPKR_IN LDO_EN

OUT+

23 13 C1NPGND

22 14 CPGNDHP_EN

TQFN(4mm x 4mm x 0.75mm)

TOP VIEW

+

*EP = EXPOSED PAD

*EP

Pin Configurations

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MAX9791AMAX9791B

LDO_EN 8

HP_INL 3

HP_INR 2

LDO_OUT 6

HP_EN 22

BEEP 21

SPKR_EN 27

STEREOCLASS D

AMPLIFIER

CONTROL

CHARGEPUMP

LDO BLOCK

TO HPVDD

TO CPVSS

1

19 OUTL+

OUTL-

OUTR+

OUTR-

HPL

HPR

HPVDD

C1P

C1N

CPGND

18

24

25

10

9

16

15

14

13

12

CPVSS

C21.0µF

20, 23

PGNDGND

5

SPKR_INL

SPKR_INR 28

1.0µF1.0µF

2.7V TO 5.5V

2.7V TO 5.5V

TO CODEC

NOTE: LOGIC PINS CONFIGURED FOR:LDO_EN = 1, LDO ENABLEDSPKR_EN = 0, SPEAKER AMPLIFIERS ENABLEDHP_EN = 1, HEADPHONE AMPLIFIER ENABLED

C11.0µF

0.1µF

PVDD

17, 26

2.7V TO 5.5V

AVDD

7

0.1µF1.0µF1.0µF 10µF

C310µF

RIN3

RIN1

CIN3

CIN1

RIN1CIN1

RIN3CIN3

RIN2CIN2

RIN2CIN2

11 SENSE

40.2kΩ

40.2kΩ

40.2kΩ

TO HPVDD

20kΩ

20kΩ

4CCOM RCOM

µC BEEP INPUT

COM

MAX9791A/MAX9791B Block Diagram

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MAX9791C

LDO_EN 8

HP_INL 3

HP_INR 2

LDO_OUT 6

HP_EN 22

BEEP 21SPKR_EN 27

STEREOCLASS D

AMPLIFIER

CONTROL

CHARGEPUMP

LDO BLOCK

TO HPVDD

TO CPVSS

1

19 OUTL+

OUTL-

OUTR+

OUTR-

HPL

HPR

HPVDD

C1P

C1N

CPGND

18

24

25

10

9

16

15

14

13

12

CPVSS

C21.0µF

20, 23

PGNDGND

5

SPKR_INL

SPKR_INR 28

2.0µF2.0µF

2.7V TO 5.5V

2.7V TO 5.5V

TO CODEC

NOTE: LOGIC PINS CONFIGURED FOR:LDO_EN = 1, LDO ENABLEDSPKR_EN = 0, SPEAKER AMPLIFIER ENABLEDHP_EN = 1, HEADPHONE AMPLIFIER ENABLED

C11.0µF

0.1µF

PVDD

17, 26

2.7V TO 5.5V

AVDD

7


C310µF

RIN3

RIN1

CIN3

CIN1

RIN1CIN1

RIN3CIN3

RIN2CIN2

RIN2CIN2

11 SENSE

40.2kΩ

40.2kΩ

40.2kΩ

TO HPVDD

20kΩ

20kΩ

4CCOM RCOM

µC BEEP INPUT

COM

MAX9791C Block Diagram

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MAX9792A

LDO_EN 8

HP_INL 3

HP_INR 2

LDO_OUT 6

HP_EN 22

BEEP 21SPKR_EN 27

MONOCLASS D

AMPLIFIER

CONTROL

CHARGEPUMP

LDO BLOCK

TO HPVDD

TO CPVSS

28

19, 24 OUT+

OUT-

HPL

HPR

HPVDD

C1P

C1N

CPGND

18, 25

10

9

16

15

14

13

12

CPVSS

C21.0µF

20, 23

PGNDGND

1, 5

SPKR_IN

1.0µF1.0µF

2.7V TO 5.5V

2.7V TO 5.5V

TO CODEC


C11.0µF

C310µF

RIN1CIN1

RIN2CIN2

RIN2CIN2

11 SENSE

TO HPVDD

4CCOM RCOM

µC BEEP INPUT

RIN3CIN3

20kΩ

40.2kΩ

40.2kΩ

40.2kΩ

COM

0.1µF

PVDD

17, 26

2.7V TO 5.5V

AVDD

7


MAX9792A Block Diagram

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MAX9792C

LDO_EN 8

HP_INL 3

HP_INR 2

LDO_OUT 6

HP_EN 22

BEEP 21

SPKR_EN 27

MONOCLASS D

AMPLIFIER

CONTROL

CHARGEPUMP

LDO BLOCK

TO HPVDD

TO CPVSS

28

19, 24 OUT+

OUT-

HPL

HPR

HPVDD

C1P

C1N

CPGND

18, 25

10

9

16

15

14

13

12

CPVSS

C21.0µF

20, 23

PGNDGND

1, 5

SPKR_IN

2.0µF2.0µF

2.7V TO 5.5V

2.7V TO 5.5V

TO CODEC


C11.0µF

C310µF

RIN1CIN1

RIN2CIN2

RIN2CIN2

11 SENSE

TO HPVDD

4CCOM RCOM

µC BEEP INPUT

RIN3CIN3

20kΩ

40.2kΩ

40.2kΩ

40.2kΩ

COM

0.1µF

PVDD

17, 26

2.7V TO 5.5V

AVDD

7


MAX9792C Block Diagram

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PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO.

28 TQFN-EP T2844-1 21-0139 90-0068

Package InformationFor the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in thepackage code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to thepackage regardless of RoHS status.

http://pdfserv.maxim-ic.com/package_dwgs/21-0139.PDF

http://pdfserv.maxim-ic.com/land_patterns/90-0068.PDF

http://pdfserv.maxim-ic.com/package_dwgs/21-0139.PDF

http://pdfserv.maxim-ic.com/land_patterns/90-0068.PDF

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Package Information (continued)For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a “+”, “#”, or “-” in thepackage code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to thepackage regardless of RoHS status.

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Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses areimplied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

34 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

© 2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.

Revision HistoryREVISION NUMBER

REVISION DATE

DESCRIPTIONPAGES

CHANGED

0 11/08 Initial release —

1 6/10 Adding MAX9791C/MAX9792C versions 1–7, 10, 13–16,

19, 21–30

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