William Stallings Computer Organization and Architecture

38
Rev. by Luciano Gualà (2008) 1 8 - William Stallings Computer Organization and Architecture Chapter 9 Computer Arithmetic

description

William Stallings Computer Organization and Architecture. Chapter 9 Computer Arithmetic. The von Neumann computer. Arithmetic and Logic Unit. Input Output Equipment. Main Memory. Program Control Unit. CPU Components: Top Level View. Registri. PC. Control Lines. Data Lines. - PowerPoint PPT Presentation

Transcript of William Stallings Computer Organization and Architecture

Page 1: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 18 -

William Stallings Computer Organization and Architecture

Chapter 9Computer Arithmetic

Page 2: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 28 -

The von Neumann computer

MainMemory

Arithmetic and Logic Unit

Program Control Unit

InputOutputEquipment

Page 3: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 38 -

CPU Components: Top Level View

Control Unit

ALU

Registri

CP

U I

nte

rna

l Bu

s

Control Signals

PC

MAR

IR

MBRAC

Dat

a Li

nes

Add

ress

Lin

es

Con

trol

Lin

es

Page 4: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 48 -

Arithmetic & Logic Unit

• Does the calculations• Almost everything else in the computer is

there to service this unit• Handles integers• May handle floating point (real) numbers

Page 5: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 58 -

ALU Inputs and Outputs

Page 6: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 68 -

Reminder

• Let A=an-1an-2…a1a0 be a (pure) binary number

• Its (decimal) value is:

1

0

2n

ii

i aA

Example: 10010 = 24 + 21 = 16 + 2 = 18

Page 7: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 78 -

Integer Representation

• Only have 0 & 1 to represent everything• Positive numbers stored in binary

e.g. 41=00101001 Binary digit = Bit

• No minus sign• Negative integer representations:

Sign-Magnitude Two’s complement

Page 8: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 88 -

Sign-Magnitude

• Left most bit is sign bit• 0 means positive• 1 means negative

+18 = 00010010 -18 = 10010010

• Problems Need to consider both sign and magnitude in

arithmetic Two representations of zero (+0 and -0)

Page 9: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 98 -

A better representation:Two’s Complement

• Let A=an-1an-2…a1a0 be a n-length binary string

• It’s value is in Two’s Complement representation is:

2

01

1 22n

ii

in

n aaA

if an-1=0 then A is a non-negative number

if an-1=1 then A is a negative number

Page 10: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 108 -

Two’s Complement: examples

-128 64 32 16 8 4 2 1

0 1 0 0 0 1 1 0

-128 64 32 16 8 4 2 1

1 0 0 0 0 0 1 1

-128 64 32 16 8 4 2 1

1 0 0 0 1 0 0 0

+64 +4 +2 = 70

-128 +2 +1 = -125

-128 +8 = -120

Page 11: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 118 -

Benefits

• Only one representation of zero+0 = 0000 -1 = 1111+1 = 0001 -2 = 1110+2 = 0010 -3 = 1101+3 = 0011 -4 = 1100+4 = 0100 -5 = 1011+5 = 0101 -6 = 1010+6 = 0110 -7 = 1001+7 = 0111 -8 = 1000

• Arithmetic works easily (see later)

Page 12: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 128 -

Geometric Depiction of Two’s Complement Integers

Page 13: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 138 -

Range of Numbers

• 8 bit 2’s complement+127 = 01111111 = 27 -1 -128 = 10000000 = -27

• 16 bit 2’s complement+32767 = 01111111 11111111 = 215 - 1 -32768 = 10000000 00000000 = -215

Page 14: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 148 -

…when you cannot sleep…

…don’t count sheep in two’s complement…

Page 15: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 158 -

2’s Complement representation for negative numbers

• To represent a negative number using the “two’s complement” technique:1. First decide how many bits are used for

representation2. Then write the modulo of the negative

number (in pure binary)3. Then, change each 0 in 1, each 1 in 0

(Boolean Complement or “one’s complement”)

4. Finally, add 1 (as the result of Step 3 was a pure binary number)

Page 16: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 168 -

Examples• E.g.: how to represent -3 with 4 bits:

Start from +3 = 0011 Boolean complement gives 1100 Add 1 to LSB gives -3 1101

• Represent -20 with 8 bits: Start from +20 = 00010100 Bolean complement gives 11101011 Add 1 11101100

• Negation works in the same way, e.g. negation of -3 is obtained by the “two’s complement” of -3: Representation of -3 1101 Boolean complement gives 0010 Add 1 to LSB gives -(-3)=+3 0011

Page 17: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 178 -

Negation Special Case 1

• 0 = 0000• Bitwise NOT 1111 (Boolean

complement)• Add 1 to LSB +1• Result 1 0000• Carry is ignored, so:• - 0 = 0 OK !

Page 18: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 188 -

Negation Special Case 2

• -8 = 1000• Bitwise NOT 0111 (Boolean

complement)• Add 1 to LSB +1• Result 1000• So:• -(-8) = -8 WRONG !• Monitor MSB (sign bit)• If it does not change during negation there

is a mistake (but for 0!)

Page 19: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 198 -

Conversion Between Lengths

• Positive number: pack with leading zeroes+18 = 00010010+18 = 00000000 00010010

• Negative number: pack with leading ones-18 = 11101110-18 = 11111111 11101110

• i.e. pack with MSB (sign bit)

Page 20: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 208 -

Addition and Subtraction

• Addition: standard• Overflow: when the result needs more bits to be

represented• Monitor MSB: if it changes there may be an

overflow When Pos + Pos or Neg + Neg the sign bit should not

change: if it does there is an overflow

• Subtraction: take two’s complement of subtrahend and add to minuend i.e.: a - b = a + (-b)

• So we only need addition and complement circuits

Page 21: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 218 -

Addition: examples

1001 + -70101 = 51110 -2

0011 + 30100 = 40111 7

1100 + -40100 = 40000 01

1100 + -41111 = -11011 -51

1001 + -71010 = -60011 overflow1

0101 + 50100 = 41001 overflow

Page 22: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 228 -

Hardware for Addition and Subtraction

Page 23: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 238 -

Real Numbers

• …very informally, numbers with the fractional point

• Actually, only finite precision real numbers

• we need to code the binary point• we need to code the binary point

position• Solution: floating point numbers

Page 24: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 248 -

Reminder

• Let A=an-1an-2…a1a0 ,a-1,a-2,…,a-m be a binary number

• Its value is:

11

0

22mj

jj

n

ii

i aaA

Example:1001,1011 = 23 + 20 +2-1 + 2-3 + 2-4 =9,6875

2-1 2-2 2-3 2-4 2-5

0,5 0,250 0,125 0,0625 0,03125

Page 25: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 258 -

Real Numbers

• Where is the binary point? Fixed?

• Very limited

Moving?• How do you show where it is?

• Example:

976.000.000.000.000

0,0000000000000976

= 9,76 * 1014

= 9,76 * 10-14

Page 26: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 268 -

Floating Point

• Represents the value+/- .<significand> * <base><exponent>

• “Floating” refers to the fact that the true position of the point “floats” according to the value of the exponent

Sig

n bi

t

BiasedExponent

Significand or Mantissa

Page 27: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 278 -

Normalization

• Floating Point numbers are usually normalized exponent is adjusted so that there is a single bit equal

to 1 before the binary point

• Similar to scientific notation for decimal numbers where numbers are normalized to give a single digit before the decimal point

3123 = 3.123 x 103

(10,0101)2= 10,0101* 20 = 10010,1 * 2-3

= 1001010 * 2-5

= 0,00100101 * 24

Page 28: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 288 -

Normalization

• A normalized number ( 0) has the following form:

• The base (or radix) for the exponent is suppose to be 2 (so it is not represented)

• Since MSB of the mantissa is always 1 there is no need to represent it

+/- 1,bbb…b * 2 +/- E

where b {0,1}

Page 29: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 298 -

Typical Representation of Floating Point with 32 bits

• Mantissa uses 23 bits to store a 24 bits pure binary number in the interval [1,2)

• Sign is stored in the first bit• Exponent value is represented in excess or biased notation with 8 bits

• Excess (bias) 127 means 8 bit exponent field Nominal exponent value has range 0-255 Subtract 127 (= 28-1-1) to get correct exponent value Real range of exponent value is -127 to +128

Page 30: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 308 -

excess (bias) notation

• Two parameters are specified: the number of bits

n the bias value K

(usually, K=2n -1 -1)

• the string consisting of the number i in pure binary represents the value i–K

n = 4 K=7

0000 = -70001 = -60010 = -50011 = -40100 = -30101 = -20110 = -10111 = 0

1000 = 11001 = 21010 = 31011 = 41100 = 51101 = 61110 = 71111 = 8

Page 31: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 318 -

Floating Point Examples

147 = 127+20

107 = 127-20

Page 32: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 328 -

Expressible Numbers

2-127-2-127 (2-2-23)*2128-(2-2-23)*2128

Notice: we are representing232 different numbers in both cases!!

Page 33: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 338 -

density• Precision decreases with the increase of modulo

(representation is denser for smaller numbers)• How many numbers can we represent in the

interval [2,4)?• And in the range [4,8)?• they are the same: 223

Note: Finite precision: (10.0/3.0)*3.0 may be different from 10.0

Page 34: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 348 -

IEEE 754

• Standard for floating point storage• 32 and 64 bit standards• 8 and 11 bit exponent respectively• Extended formats (both mantissa and

exponent) for intermediate results

Page 35: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 358 -

IEEE 754 Formats

Page 36: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 368 -

Special cases (single format)• exponent [-126,127]: normalized numbers• Some strings are interpreted as special strings• Two representations for zero (posit. and negat.)

+/- 0 = 0/1 00000000 00000000000000000000000• Able to represent infinity (posit. and negat.)

+/- = 0/1 11111111 00000000000000000000000• Non-normalized numbers:

0/1 00000000 (string different to all 0s) exponent=-126 form of significand: 0.bbbb..

• NAN = Not A Number Result of an operation which has no solution Propagated as NAN through subsequent operations representation: 0/1 11111111 (string different to all 0s)

Page 37: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 378 -

FP Arithmetic: addition and subtraction

• Check for zero• Align significands (adjusting exponents)• Add or subtract significands• Normalize result

Page 38: William Stallings  Computer Organization  and Architecture

Rev. by Luciano Gualà (2008) 388 -

FP Arithmetic: multiplication and division

• Check for zero• Add/subtract exponents • Multiply/divide significands (watch sign)• Normalize• Round• All intermediate results should be in

double length storage