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COSC 3P92

Cosc 3P92

Week 11 Lecture slides

Violence is the last refuge of the incompetent.

Isaac Asimov, Salvor Hardin in "Foundation"

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COSC 3P92

Input/ Output

• There are two general types of I/O devices:1. physical I/O devices

eg. output port to printer

2. virtual (logical) I/O devices: operating system abstractions eg. spooled print file, files vs. sectors on disk

» Telephony Application Programmed Interface (TAPI)

» Telephony Service Provider Programming Interface (TSPI)

Physical I/O

• To transfer information between CPU and physical I/O devices, one may use the following techniques:

1. programmed I/O

2. interrupt (-driven) I/O

3. direct memory access (DMA)

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COSC 3P92

1. Programmed I/O• I/O ports may be addressed using:

1. standard (isolated) I/O address space

– eg. Intel

– In and OUT instructions

– pin on CPU chip indicates whether IO or memory address space being used. [See next slide]

2. memory-mapped I/O address space

– eg. Motorola

– devices reside at specific memory locations.

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COSC 3P92

8088 i/oport

control

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1. Programmed I/O

• Advantages Memory-mapped I/O:– no special I/O opcodes

– all instns that reference memory can access IO

– # I/O ports is unlimited

– hardware bus simplified

• Disadvantages:– I/O interfaces may need more circuitry to recognize larger

addresses.

– possible slow down in bus performance.

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COSC 3P92

• An I/O operation may be performed:1. unconditionally – CPU sends data to device at any time

2. conditionally – checking the status of the device before the operation (i.e. handshaking).

– CPU may have to poll and wait for device -> inefficient

• The CPU communicates with an I/O devices via one or more registers called I/O ports.

– Bit-serial ports

» Every bit in the port may be configured as either input or output.

0 1 1 0 0 1 1 0

Data-direction register

I/O port

1=output 0=input

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COSC 3P92

– Parallel ports

» Each I/O port (as a whole) may be configured as either input or output.

0 1 1 0 0 1 1 0

Command register

I/O port A (output)

1=output 0=input

I/O port B (input)

ABOther control signals

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COSC 3P92

Interrupt I/O• When an I/O device is ready to send (receive) data

to (from) the CPU, it signals (or interrupts) the CPU for its attention.

– No need to poll device status.

– As soon as the CPU finishes the current instruction, it transfers its execution to an interrupt-service routine which responds to the external interrupt.

• Q. How does the CPU know which one of the ISRs to execute when there is more than one?

– Interrupt Service Vectors: address of interrupt service routines, commonly kept in special jump table.

Current execution path

Interrupt occurs

Interrupted

Resume

Return from interrupt

Interrupt-serviceroutine

perform I/Otransfer

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COSC 3P92

Interrupt I/O

example code:

Setting up interrupt I/O... move.b #$81, DDRA ; data direction

move.b #$00, DDRB ; registers

move.b #$81, PORTA ; start pulse

move.b #$01, PORTA ; to device

...

Device will cause interrupt when ready/done,

and an interrupt routine will complete

transaction... move.b PORTB, D1 ; interrupt service rtn.

rte

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COSC 3P92

Interrupt I/O (continued)• Polled

• Daisy-chain

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COSC 3P92

Direct Memory Access (DMA)

• It is a technique of transferring data between memory and I/O devices without CPU intervention.

– CPU sets up transfer with DMA controller; then transaction occurs without CPU

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Direct Memory Access (DMA)

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DMA3 techniques:

1. Block transfer - whole data block transferred

- CPU can do non-related bus activities in the

meanwhile

2. Cycle stealing - DMA controller freezes the CPU, and then

does a DMA while CPU frozen

- word-by-word transfer

3. Interleaved - DMA controller uses CPU cycles that aren't

using the bus, letting DMA xfers and CPU

alternate use of the bus

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COSC 3P92

I/O Processor (data channel)• Independent dedicated I/O processors (smart

DMA controllers) are used in mainframe computer systems to communicate with I/O devices.

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I/O processo

rs• Each IOP uses DMA to communicate with devices

• Some considerations: – priority system for IOP's sharing system bus

– priority system for devices on one IO bus

– IOP requires software or hardware to manage different devices

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IO example: LED

• Encoder, part of kbd.– Converts key press into ASCII encoded byte.

– Bus Interface communicates data to I/O bus.

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8086 Programmed IO

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8086 Programmed IO

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68000 IO

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68000 IO

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68000 memory

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The end