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USN 10EC63

Sixth Semester B.E. Degree Examination, June/July 2014Microelectronics Circuits

Time: 3 hrs. Max. Marks:lOO

1

/,1/ Note: Answer any FIVE full questions, selecting~ atleast TWO questions from each part. ..'1,;a ,.

o PART-A • ·:tittf~ neat diagram, derive the expression for in in saturation and triod~ region. ~at

happened to io if the channel length modulation is considered? (10 Marks)b. Draw the-large signal equivalent circuit model of NMOS and explain. (04 Marks)c. Determine the voltages at all nodes and the currents through all the branches of following

circuit. Let V. = IV and kn'(W/L) = llnAlV2. Neglect the channel - length modulation

effect. (06 Marks)

a.

2

~oShow the develop ~ ~ the T equivalent - circuit ~d I for the MOSFET from hybrid1T model without channel length modulation. '":/. (06 Marks)

b. Draw the circuit of common-source amplifier with a source resistance. Draw its small signalequivalent circuit with yo neglected. Obtain the expression for Vgs, id, vo, Av, Avo and theoverall voltage gain Gv. (10 Marks)

c. What-is scaling? Differentiate constant field scaling and constant-voltage scaling, (04 Marks)~. 7riefly explain about short channel effect due to scaling.

Compare NMOSFET and BJT in terms ofi) Current voltage characteristic.ii) High frequency model.iii) Output resistance. (06 Marks)

c. Following figure shoes the high frequency equivalent circuit of a common-source MOSFETamplifier. The amplifier is fed with a signal generator Vsig having a resistance Rsig.Resistance R in is due to the biasing network. Resistance R~ is the parallel equivalent of theload resistance RL, the drain bias resistance Ro, and the FET output resistance roo Capacitorscgs and cgd are the MOSFET internal capacitance:

a.

3 (06 Marks)

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~~ I t% ~~~~~. ~ -} ,;-1x ... 71 ~

~...,~. Fig.Q.3(C)~"

4 a. In common-~ e,ramplifier with active load, obtain 3-dB freque Q,""fHusing open circuit timeconstants. Dra': ne"circuit required for determining Rgs an J)d. (08 Marks)

b. Draw the CD- Cs, CJl)- CE and CD- Ca configurationsf \ (06 Marks)c. Draw an Ie source follower circuit. Obtain its sma}l~signal equivalent circuit and obtain its. V

voltage gain Av =_0

VI

5 a.

lOEC63

i)ii)iii)

Draw the equivalent circuit at midband frequencies.Draw the circuit for determining the resistance seen by Cgs.Draw the circuit for determining the resistance seen by Cgd. For Rsig =Rin = 420KQ, Cgs = Cgd = IpF, gm = 4mAN, and R'L = 3.33KQFind the mid band voltage gain AM= Vn/Vsig.Find the upper 3-dB frequency fH.

~5t' .

lOOKQ,

iv)v) (08 Mar s)

b.

(06 Marks)

6

b.

c.

7 a...,)

-: b.

~($) c.

8 a.b.c.

-- -.-... -~---

a. Briefly explain abouti) Voltage amplifieii) Current amplifier 6*/.iii) Trans co ..' etance amplifier ....~iv) !ra!lt: 'e~ist~nce amplifier. ... ~~ . (08 ~arks)Explam alJQ . senes-shunt feedback amplifier WIth diagram and o'e-a n the expression forinput }uWe ance and output impedance. Z (08 Marks)Bri~tt? xplain about stability and pole locations. 57 (04 Marks)~v /~. raw and explain about weighted summer capable of implementing summing coefficients ofoilis~rn. /~6Muk~

Explain about DC imperfections. '(04 Marks)Write short notes on:i) Antilogarithmic amplifiers.ii) Analog multipliers. {10Mark~~

Draw the CMOS realization of AO1 gate and explain with truth table. (08 Marks)Draw and explain the exclusive OR function using PUN and PDN. (08 Marks)What all are the parameters used to characterize the operation and performance of a logiccircuit family. (04 Marks)

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