VNR VJIET: ECE Department A Semi- $QQXDO ... Physical Design flow using Mentor Graphics Tools, SOC,...

5
VNR VJIET: ECE Department A Semi-Annual Digest of the Department’s News Letter Ms Sanjana Vemulapalli (13071A04H0) of IV Year B.Tech ECE student is the topper among the girls students of all branches in the institute with 91.51% upto III year II Sem has hoisted the National Flag at VNRVJIET on the occasion of Republic Day, i.e on 26 th January 2017. ISTE AP & TS Executive committee meeting was held on 22-01-2017 in vice chancellors chamber, JNTUH and finalized the awards. We have received three awards from ISTE AP & TS sections. 1. VRES Best Teacher award to Dr.G.Ramesh Chandra,Prof,CSE. 2. GEC ideal student of excellence award to our student Mr.S.R.Sai Krishna, ECE. 3. AITM Best innovator award to Mr. S.R.Sai Kaustub and team,ME and EEE The 7th IEEE International Advance Computing Conference (IACC 2017) was organised during Jan 0507 by VNRVJIET along with IEEE Computer Society India Council at VNRVJIET. Numerous researchers and other delegates spanning across academia and industry in 15 different countries have attended the conference. IACC 2017 Program Chair Prof. Padma Shayi, Institutes Principal Dr. C.D Naidu, Vice President- Vignana Jyothi, Mr. K. Harishchandra Prasad, and General Secretary-Vignana Jyothi, Mr. B Sarat Gopal were among the other distinguished guests who graced the occasion.

Transcript of VNR VJIET: ECE Department A Semi- $QQXDO ... Physical Design flow using Mentor Graphics Tools, SOC,...

Page 1: VNR VJIET: ECE Department A Semi- $QQXDO ... Physical Design flow using Mentor Graphics Tools, SOC, Low power VLSI and ASIC Design flow using Synopsys Tools. for faculty, M.Tech students,

VNR VJIET: ECE Department

A Semi-Annual Digest of the Department’s News Letter

Ms Sanjana Vemulapalli (13071A04H0) of IV

Year B.Tech ECE student is the topper among the

girls students of all branches in the institute with

91.51% upto III year II Sem has hoisted the

National Flag at VNRVJIET on the occasion of

Republic Day, i.e on 26th January 2017.

ISTE AP & TS Executive committee meeting was

held on 22-01-2017 in vice chancellors chamber,

JNTUH and finalized the awards.

We have received three awards from ISTE AP &

TS sections.

1. VRES Best Teacher award to Dr.G.Ramesh

Chandra,Prof,CSE.

2. GEC ideal student of excellence award to our

student Mr.S.R.Sai Krishna, ECE.

3. AITM Best innovator award to Mr. S.R.Sai

Kaustub and team,ME and EEE

The 7th IEEE International Advance Computing

Conference (IACC 2017) was organised during Jan 05–07 by VNRVJIET along with IEEE Computer Society

India Council at VNRVJIET. Numerous researchers and

other delegates spanning across academia and

industry in 15 different countries have attended the

conference.

IACC 2017 Program Chair Prof. Padma Shayi,

Institute’s Principal Dr. C.D Naidu, Vice President-

Vignana Jyothi, Mr. K. Harishchandra Prasad, and

General Secretary-Vignana Jyothi, Mr. B Sarat Gopal

were among the other distinguished guests who

graced the occasion.

Page 2: VNR VJIET: ECE Department A Semi- $QQXDO ... Physical Design flow using Mentor Graphics Tools, SOC, Low power VLSI and ASIC Design flow using Synopsys Tools. for faculty, M.Tech students,

VNR VJIET: ECE Department

A Semi-Annual Digest of the Department’s News Letter

A MoU was signed between VNRVJIET and FICE

Educational Institute which was mainly aimed at

establishing an Intel lab in VNRVJIET to train students

and faculty for bolstering innovation, employability

and entrepreneurship.

VNRVJIET got ISTE Best Chapter award for

Telangana Section-2016 at 46th

ISTE National Annual

Convention during 10th

- 12th

Feb 2017, Gulzar Group

of Institutes, Ludhiana.

Faculty Development Program on Radio

Frequency Integrated Circuits (RFIC) was held

TCS Remote Internship Project best performer

awards.

1) T.SINDHUJA (13071A0453)

Guide: Ms.Sravani

Project Title: Yang to Java Compiler

2) Keerthana Penmetsa (13071A0491)

Guide: Ms.Ch. Naga Deepa

Project Title: GSM Modem application

with Raspberry PI

Page 3: VNR VJIET: ECE Department A Semi- $QQXDO ... Physical Design flow using Mentor Graphics Tools, SOC, Low power VLSI and ASIC Design flow using Synopsys Tools. for faculty, M.Tech students,

VNR VJIET: ECE Department

A Semi-Annual Digest of the Department’s News Letter

Department of Electronics and Communication

Engineering is organizing a two day workshop for III

B.Tech students on "Ethical Hacking & Cyber

Security" during 03-04-2017 and 04-04-2017 from

9:00 am to 5:00 pm in TEQIP Studio and the resource

persons are Mr. Arjun and Mr. Santosh, Spyry

Technologies, Bangaluru. 160 students and 4 faculty

members from the department attended the sessions.

The workshop mainly focused on Cyber Security and

its importance today. Mr. Prameel Arjun, the CEO of

Spyry Technologies shared his experience and views

about Cyber Security and trained the students. He

was joined by Mr. Santosh Chaluvadi, Mr. Prathap

Reddy and Mr. Achyuth Reddy from Spyry

Technologies. Basics of Cyber Security, Windows

Cracking, Working of Fraudulent Emails & Calls,

Viruses & antiviruses, backdoors, Denial of Service

attacks, data recovery, mobile hacking are some of

the main concepts discussed in the workshop. After

the workshop, students were evaluated through a

written exam & a practical exam.

Guest Lecture is organized for III Year ECE-3

Students on Importance of DSP , by Don Hamilton,

Senior Systems Consultant, EMEA at KEYSIGHT

Technologies, Wokingham, Berks, United Kingdom

(UK). 70 students were attended the lecture.

55 students and 5 staff members from the

department visited M/s. Ananth Technologies,

Madhapur, Hyderabad and the following points

were observed while visit.

Page 4: VNR VJIET: ECE Department A Semi- $QQXDO ... Physical Design flow using Mentor Graphics Tools, SOC, Low power VLSI and ASIC Design flow using Synopsys Tools. for faculty, M.Tech students,

VNR VJIET: ECE Department

A Semi-Annual Digest of the Department’s News Letter

Mr.Rathin Radha Krishna (2007 Batch) and

Mr.Vibhor Arya (2010 Batch) Alumni interacted with

the II & III Year ECE-1, 2 & 3 students on 22nd

April

2017 and discussed the following points.

1) Higher Education and Job opportunities

2) Placements and Interview process and

3) other issues

Chaitanya, Divya, Sucharitha, Suhas, Sanjay, Mano,

III ECE & ME students were shortlisted and converted

as project under Design Clinic Scheme funded by

Ministry of MSME, Govt. of India.

Mr.Praneeth Margam (15071A04G1),III B.Tech ECE

Student was shortlisted in the NIYANTRA -2017 the

Annual Student Design contest conducted by National

Instruments for his project Piezo padded shoe .

IV B.Tech ECE students along with IB hub team

during IoT workshop.

Workshop on Integrated Circuit and System

Design using CAD Tools” was conducted during 12th

-

17th

June 2017 in the department of ECE, VNRVJIET.

Page 5: VNR VJIET: ECE Department A Semi- $QQXDO ... Physical Design flow using Mentor Graphics Tools, SOC, Low power VLSI and ASIC Design flow using Synopsys Tools. for faculty, M.Tech students,

VNR VJIET: ECE Department

A Semi-Annual Digest of the Department’s News Letter

The ECE faculty and students were participated in the

program.

This Programme is meant for training for faculty and

students of various institutions in the domain of VLSI.

The main objective of the workshop is to provide

knowledge to the faculty and students in designing

digital and analog circuits using CAD tools. This is very

useful to the students to bridge the gap between

industry and academia. The faculty and students from various engineering colleges are participating in the

workshop. The lectures scheduled in the workshop

briefly Covered are Verification through System

Verilog, Physical Design flow using Mentor Graphics

Tools, SOC, Low power VLSI and ASIC Design flow

using Synopsys Tools. for faculty, M.Tech students,

B.Tech students. Total of 35 Participants attended the

workshop.

ELECTRONICS & ICT ACADEMY, NIT - WARANGAL

SPONSORED FACULTY DEVELOPMENT

PROGRAMME ON RECENT TRENDS IN SIGNAL

PROCESSING AND ITS APPLICATIONS was

conducted from 22nd

June – 1st

July 2017.