Vlsi Projects
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Transcript of Vlsi Projects
VLSI PROJECTS
ALGEBRAIC INTEGER-BASED EXACT COMPUTATION
AN EFFICIENT VLSI ARCHITECTURE FOR LIFTING-BASED DISCRETE WAVELET TRANSFORM
AREA-EFFICIENT PARALLEL FIR DIGITAL FILTER STRUCTURES FOR SYMMETRIC CONVOLUTIONS BASED ON FAST FIR ALGORITHM
VLSI ARCHITECTURE FOR ARITHMETIC CODER USED IN SPIHT
EFFICIENT MODULO 2n+1 MULTIPLIERS
4-BIT SFQ MULTIPLIER BASED ON BOOTH ENCODER
CONSTRUCTION OF OPTIMUM COMPOSITE FIELD ARCHITECTURE FOR COMPACT HIGH-THROUGHPUT AES S-BOXES
DESIGN OF DISCRETE-VALUED LINEAR PHASEFIR FILTERS IN CASCADE FORM
DESIGN OF FIXED-WIDTH MULTIPLIERS WITH LINEAR COMPENSATION FUNCTION
EFFICIENT AND HIGH-PERFORMANCE PARALLEL HARDWARE ARCHITECTURES FOR THE AES-GCM
HIERARCHICAL DESIGN OF AN APPLICATION-SPECIFIC INSTRUCTION SET PROCESSOR FOR HIGH-THROUGHPUT AND SCALABLE FFT PROCESSING
HIGH-THROUGHPUT INTERPOLATOR ARCHITECTURE FOR LOW-COMPLEXITY CHASE DECODING OF RS CODES
INVESTIGATING THE IMPACT OF LOGIC AND CIRCUIT IMPLEMENTATION ON FULL ADDER PERFORMANCE (MICROWIND)
LOW-POWER AND AREA-EFFICIENT CARRY SELECT ADDER
TOEPLITZ MATRIX APPROACH FOR BINARY FIELD MULTIPLICATION USING QUADRINOMIALS
DESIGN OF AN ERROR DETECTION AND DATA RECOVERY ARCHITECTURE FOR MOTION ESTIMATION TESTING APPLICATIONS
ROBUST SECURE SCAN DESIGN AGAINST SCAN-BASED DIFFERENTIAL CRYPTANALYSIS
EFFICIENT AES IMPLEMENTATIONS FOR ARM BASED PLATFORMS
SOFT-ERROR-RESILIENT FPGAS USING BUILT-IN 2-D HAMMING PRODUCT CODE
HARDWARE ACCELERATION OF OPENSSL CRYPTOGRAPHIC FUNCTIONS FOR HIGH-PERFORMANCE INTERNET SECURITY
PERIOD EXTENSION AND RANDOMNESS ENHANCEMENT USINGHIGH-THROUGHPUT RESEEDING-MIXING PRNG
TESTABLE PATH SELECTION AND GROUPING FOR FASTER THAN AT-SPEED TESTING
VLSI DESIGN OF AN SVM LEARNING CORE ON SEQUENTIAL
MINIMAL OPTIMIZATION ALGORITHM
ANALOG IMPLEMENTATION OF A NOVEL RESISTIVE-TYPE SIGMOIDAL NEURON (MICROWIND)
ADAPTIVE KEEPER DESIGN FOR DYNAMIC LOGIC CIRCUITS USING RATE SENSING TECHNIQUE(MICROWIND)
ACCURATE TIMING AND NOISE ANALYSIS OF COMBINATIONAL AND SEQUENTIAL LOGIC CELLS USING CURRENT SOURCE MODELING VOLTAGE SCALING DEVICES
MEMORY EFFICIENT MODULAR VLSI ARCHITECTURE FOR HIGHTHROUGHPUT AND LOW-LATENCY IMPLEMENTATION OF MULTILEVEL LIFTING 2-D DWT
INPUT-FEATURE CORRELATED ASYNCHRONOUS ANALOG TO INFORMATION CONVERTER FOR ECG MONITORING
HIGH-THROUGHPUT SOFT-OUTPUT MIMO DETECTOR BASED ON PATH-PRESERVING TRELLIS-SEARCH ALGORITHM
LOW-SWING DIFFERENTIAL CONDITIONAL CAPTURING FLIP-FLOP FOR LC RESONANT CLOCK DISTRIBUTION NETWORKS
JITTER ANALYSIS OF POLYPHASE FILTER-BASED MULTIPHASE CLOCK IN FREQUENCY MULTIPLIER
LOW POWER AND LOW COMPLEXITY COMPRESSOR FOR VIDEO CAPSULE ENDOSCOPY
A 4T LOW-POWER LINEAR-OUTPUT CURRENT-MEDIATED CMOS IMAGE SENSOR