VLSI MOS Diode
Transcript of VLSI MOS Diode
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MOS DIODE
By
C. V. Anil Kumar
Dept. of Electronics Engineering
College of Engineering, Chengannur
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� 4 device terminals:
Gate(G), Drain(D),
Source(S) and
Body(B).
� Source and drain
regions form pn
junctions with
substrate.
� v SB, v DS and v GS
always positive
during normal
operation.
NMOS Transistor: Structure
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� First electrode- Gate: Consists
of metal like aluminium or
low-resistivity material such as
polycrystalline silicon� Second electrode- Substrate
or Body: n- or p-type
semiconductor
� Dielectric- Silicon dioxide:
stable high-quality electricalinsulator between gate and
substrate.
MOS Capacitor Structure
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Substrate Conditions for Different
Biases
� Accumulation
± V G<<V TN
� Depletion
± V G<V TN
� Inversion
± V G>V TN
0V
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Band structure of an ideal MOS
capacitor (at zero bias)
�ms = 0
�There are no charges in the oxide
�There is no carrier transport through
the oxide
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dx
dE
E
dx
d
dx
xdV x E ii 1)(
)( !!!
Ideal MOS capacitor (at Vg < 0)
T
s
T
s B
V
p
V
i ps e pen p
] ] J
!!0
For semiconductor the
equilibrium carrier concentration
is exponentially related to thedifference between Ef and Ei
T
B
V
i A p en N p
J
!}0
T
B
V
i Dno enn
J
!}
WhereB= Ei - Ef
)( Ei s Eiq s !]
o xq]
sq]
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Depletion (Vg� 0)
qs
T
s
T
s B
V
p
V
i ps e pen p
] ] J
!!0
T
s
T
B s
V
p
V
i ps enenn
] J ]
0!!
0
2
0
p
i p
p
nn !
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Inversion
QG
Qn
QB
W
QB = -qN AW
A
s s
q N
W ] I 2
!
s s A B qN Q ] I 2!@
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Threshold voltage (VT)
´´ !
vol
d vd s D .. V
o x sG BV ] ] !
Gauss law
Total normal electric flux coming out of a closed surface equals thecharge enclosed by the surface
E D I !Where
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+ + + + + + + + +
- - - - - - - - -
Metal
Oxide
Semiconductor Gauss surface
so xo x E !I
If tox is the oxide thickness, then the oxide drop is
o x
s
o x
o x so x
C
t !!
I ] Where
o x
s s A
B sC
qN QQ
] I 2(!}
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A
B s
MAX
qN
W )2(2 J I
!
At the onset of strong inversion surface potential is 2B
and W approaches WMAX
o x
s s A
sC
qN ] I ]
2!
o x
o x s s
B
t QV
I ] !@
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� The value of VGB that must be applied to just
create a condition of strong inversion is known
as the threshold voltage
Threshold voltage (VT) (continued)
o x
B s A
Bid eal thC
q N V
)2(22)(
J I J !@
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Non idealities ± ms
� 0,Qox=
0
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MOS Diode with ms�0, Qox=0
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With ms � 0, a portion of VGB must be used for achieving
flat band condition. So now
)(id eal th F Bth V V V !
o x
B s A
B F BthC
qN V V
)2(22
J I J !
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K
+
Na
+
Mobile ions
+ + +
- - -+ + + + +
x x x x x x x x x x x
Interface trap charges
Oxide traped
charges
Fixed oxide charges
metal
oxide
silicon
Non idealities ± ms � 0,Qox�0
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� MOS capacitance is non-
linear function of voltage.
� Total capacitance in any
region dictated by theseparation between
capacitor plates.
� Total capacitance modeled
as series combination of fixed oxide capacitance
and voltage-dependent
depletion layer
capacitance.
Low-frequency C-V Characteristics for
MOS Capacitor on P-type Substrate
Low frequency
High frequency
Deep depletion