VLSI Design Testing and...
Transcript of VLSI Design Testing and...
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VLSI Design Testing and Fabrication
Abdulah Alshafi
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Outline
Introduction
Design Structured Design
Design Abstractions
Y-chart of Design partitioning
MIPS Architecture and Micro-architecture
Logic Design
Circuit Design
Physical Design
Design Verification
Fabrication
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Introduction
Companies use hundreds of millions or sometimes billions of transistors which cost tens of millions of dollars or more to design. Talent - materials, devices, hardware designers,
software designers, mechanical engineering, chemical engineering, business (marketing, sales)
Complexity - hardware design, software design, test design, tools for fabrication and test
The greatest challenge in VLSI design is not in designing the individual transistors but rather managing the system complexity
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Design
Structured Design Hierarchy
○ Partitioning a large system into multiple cores for units of functional blocks to cells which are constructed from transistors
Regularity
○ Aids the minimum number of different blocks for better design complexity management
Modularity
○ Defining interfaces between blocks to avoid unanticipated interaction
Locality
○ inputs and outputs are physically and temporally close
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Design
Design Abstractions Architecture design
○ Describes the functions of the system
Microarchitecture design○ Describes how the architecture is partitioned into
registers and functional units
Logic design○ Describes how functional units are constructed
Circuit design○ Describes how transistors are used to implement
the logic
Physical design○ Describes the layout of the chip
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Design Y-chart of Design partitioning
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Y- chart design domains
Behavioral domain
Describes what a particular system does
Structural domain
Describes the interconnection of modules
necessary to achieve a particular behavior
Physical domain
Describes how to physically construct each
level of abstraction
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MIPS Architecture
MIPS (Microprocessor without Interlocked Pipeline Stages) is a reduce instruction set computer (RISC) developed by MIPS Computer Systems (now MIPS Technologies).*
MIPS is a 32-bit architecture with 32 registers Consider 8-bit subset using 8-bit datapath
Only implement 8 registers ($0 - $7)
$0 hardwired to 00000000
8-bit program counter
The MIPS also have later versions were 64-bit. *
*//en.wikipedia.org/wiki/MIPS_architecture
*//www.cs.cornell.edu/courses/cs3410/2008fa/MIPS_Vol1.pdf
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Instruction set
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MIPS32 Architecture templates
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MIPS32 Program C code for Fibonacci program
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MIPS32 Program Translated to assembly language
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MIPS32 Program Translated to machine language
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MIPS32 Microarchitecture
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MIPS32 Controller FSM state
transition diagram
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Logic Design
Top-Level interfaces
Block diagrams
Hierarchy
Hardware Description languages
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Top-Level interfaces
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Block Diagrams Top-level MIPS block diagram
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Block Diagram
8-bit datapath viewed as
Wordslice
Bitslice
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Hierarchy
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Hardware Description Languages (HDL)
Two most popular HDLs
Verilog
VHDL
Structural HDL
Specifies how a cell is composed of other
cells or primitive gates and transistors
Behavioral HDL
Specifies what a cell does
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Circuit Design
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Physical Design
Floorplanning
Standard Cells
Pitch matching
Slice Plans
Illustrates the ordering of wordslice and the
allocation of wiring each bitslice
Arrays
Area Estimation
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Floorplanning
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Actual chip layout
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Standard Cells
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Standard Cells
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Pitch Matching
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Pitch Matching MIPS Datapath
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Slice Plans
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Arrays
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Area Estimation Need area estimates to make floorplan
Compare to another block you already
designed
Or estimate from transistor counts
Budget room for large wiring tracks
Your mileage may vary!
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Design Verification
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Fabrication,
Packaging & Testing