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    Design and Fabrication of CMOS ISFET

    for pH Measurement

    MSc viva voce presentation by:

    Chin Seng Fatt

    Supervised by:

    1. Prof. Dr. Uda bin Hashim

    2. En. Mohd Khairuddin bin Md Arshad

    School of Microelectronic Engineering

    Universiti Malaysia Perlis

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    Presentation Outline

    Introduction TCAD Simulation

    Mask Design

    Device Fabrication Device Packaging

    Device Characterization

    Conclusion Acknowledgments

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    What is pH?

    The pH relation originated from Danish

    Chemist Sorenson in1909. pH is the unit of measurement for

    determining the acidity of alkalinity of a

    solution. The math definition of pH is the negative

    logarithm of the molar H+:

    pH = - log ([H+])

    Source: wwww.emersonprocess.com

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    Importance of pH Measurement

    Control a Chemical Reaction

    Most inorganic reactions are pH neutralizations The rate of many reactions depend on the

    availability of H+ or OH- ions.

    Bacterial growth is pH dependent.

    Corrosion Control

    Water and Wastewater Treatment

    Raw Material and Product Quality Control

    Source: wwww.emersonprocess.com

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    pH Measurement Methods

    Litmus paper Simple Quick measurement

    Color indication

    Glass pH Electrode

    Higher accuracy Better selectivity

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    This research proposed an ISFET that can measuresthe ionic activity in a electrolyte solution and can befabricated using CMOS technology and materialswithout extra processing steps

    The advantages of this proposed ISFET include: Fast and direct in-situ monitoring Robust and sturdier Small size

    This research proposed an ISFET that can measuresthe ionic activity in a electrolyte solution and can befabricated using CMOS technology and materialswithout extra processing steps

    The advantages of this proposed ISFET include: Fast and direct in-situ monitoring Robust and sturdier Small size

    Litmus paper

    Color indication2 pH value limitationPreliminary measurement

    Glass pH electrode

    Bulky, fragileHigh cost of Initial setupRoutine maintenance

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    What is ISFET?

    ISFET is Ion Sensitive Field Effect Transistor

    Known as chemical or ion sensor

    Sensing method based on potentiometric detection

    First developed by Prof. Bergveld in 1970 by usingSiO2 as sensing layer

    Advantages: small size, robust, fast response

    Applications: medical, agriculture, food industry,environment monitoring

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    MOSFET and ISFET

    Basically the structure of the ISFET is

    similar to MOSFET

    The physical difference in the ISFETis the replacement of the gateelectrode of the MOSFET by the

    series combination of referenceelectrode, electrolyte and ion sensinglayer

    MOSFET operation was controlled bythe gate electrode while ISFEToperation was controlled by ionconcentration in the electrolyte

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    Flowchart of How ISFET works

    ISFET

    ISFET

    Gatevoltage

    exceedsthreshold

    Gatevoltage

    exceedsthreshold

    Inversionlayer

    formed atSiO2/Si

    Inversionlayer

    formed atSiO2/Si

    N+ sourcesupply

    electrons

    N+ sourcesupply

    electrons

    N+ drainmake

    electronsflow

    N+ drainmakeelectrons

    flow

    Positivevoltage

    applied ton+ drain

    Positivevoltageapplied ton+ drain

    Electronsflow from S

    to D

    Electronsflow from S

    to D

    Gate voltagecontrols

    electrons and Id

    Gate voltagecontrols

    electrons and Id

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    Objective of Research

    To characterize the

    ISFET

    To design the ISFET

    To fabricate the ISFET

    Research Goals

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    Scope of Research

    Reviewing and understanding the principles of ISFET

    Design and simulate the ISFET with TCAD

    Design and fabricate the ISFET masks

    Fabrication of the ISFET Testing of the ISFET

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    Synopsys TCAD is used to

    perform process and devicesimulation on ISFET.

    Process simulation models the

    fabrication steps of the ISFET.

    Simulation starts with definition

    of structure and finishes with a

    complete device

    The process simulator used is

    TSUPREM4Virtual ISFET simulated by

    TSUPREM4

    TCAD Process Simulation

    N N

    Si3N4 / SiO2 gate

    Source metalcontact

    Drain metalcontact

    Gate metalcontact

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    TCAD Device Simulation

    I-V simulation by Medici

    Device simulation in TCAD is the

    simulation of the device electricalcharacteristics.

    The TUSPREM4 ISFET is simulated

    for its gate and drain characteristics.

    The characteristics of the ISFET are

    simulated by applying a set of

    voltage biases and sweep the biases

    from one point to another.

    Device simulator used is Medici.

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    Mask Design

    Layout of ISFET similar to MOSFET: gate,source, drain, contacts.

    The extended source drain regions separatesthe metal contacts from gate region duringimmersion and for straightforwardencapsulation.

    Mask making process is straightforward: CADdesign and mask printing.

    CAD design of individual dies replicated on awafer to create the wafer layout and then

    transferred to actual mask. A total of 6 masks created. Material used as

    the actual mask is transparency.Schematic design of the ISFET

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    Well Mask

    (b)

    (c)

    (a)

    (a) Schematic design of well

    (b) AutoCAD design of the Well mask(c) Photograph of the actual mask

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    Gate Mask

    (b)

    (c)(a)

    (a) Schematic design of Gate (b) AutoCAD design of the Gate mask

    (b) Photograph of the actual Gate mask

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    Contact Mask

    (b)

    (c)

    (a) Schematic design of Contact (b) AutoCAD design of Contact mask

    (b) Photograph of actual Contact mask

    (a)

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    Metal Mask

    (b)

    (c)

    (a)

    (a) Schematic design of metal contact

    (b) AutoCAD design of the Metal mask(c) Photograph of the actual Metal mask

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    Fabrication of ISFET

    ISFET is fabricated using CMOS technology without any post

    processing steps. All fabrication steps are performed in-house in Microfabrication Lab.

    The starting material is a 4 inch p-type Silicon wafer.

    The gate material of the ISFET is made of SiO2 and Si3N4, both

    CMOS compatible materials.

    Six masking steps: creation of n-well, n and p source drains, gate,

    contact and metal.

    The etching of Si3N4 and SiO2 is done using buffered oxide etch

    (BOE) solution.

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    Equipment modules

    PECVD system PVD system Wet/dry oxidation furnace N/P diffusion furnace Mask aligner/exposure system Wet etch module Wafer spinner

    Hot plate

    Consumables

    Silicon wafer 4 inch Buffered oxide etch(BOE)

    Acetone

    Positive photoresist DI water Aluminum foil Aluminum etchant

    SiH4 gas Purified oxygen gas Purified nitrogen gas

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    Process Flow of ISFET Fabrication

    1. Starting material

    Si, p-type,

    1. Starting material

    Si, p-type,

    2. Field oxidation

    Wet oxidation, 1000C95 min 5598 Wet oxidation furnace

    2. Field oxidation

    Wet oxidation, 1000C95 min 5598 Wet oxidation furnace

    3. Well creationWell Mask, positive photoresistResist development: 30sOxide etch: 30 min

    3. Well creationWell Mask, positive photoresistResist development: 30sOxide etch: 30 min

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    Process Flow of ISFET Fabrication

    4. Well phosphorus diffusion

    Spin-on dopant phosphorusDiffusion drive-in: 6 hours

    N-diffusion furnace

    4. Well phosphorus diffusion

    Spin-on dopant phosphorusDiffusion drive-in: 6 hoursN-diffusion furnace

    6. Boron source drain formationSource Drain Mask, positive photoresistSpin on dopant - boronP-Diffusion furnace: 900C, 30 min

    6. Boron source drain formationSource Drain Mask, positive photoresistSpin on dopant - boronP-Diffusion furnace: 900C, 30 min

    5. Phosphorus source drain formation

    Source Drain Mask, Positive photoresistSpin on dopant - phosphorusN-Diffusion furnace: 850C, 25 min

    5. Phosphorus source drain formation

    Source Drain Mask, Positive photoresist

    Spin on dopant - phosphorusN-Diffusion furnace: 850C, 25 min

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    Process Flow of ISFET Fabrication

    7. Gate oxide formation

    Gate Mask photolithographyGate oxidationDry oxidation furnace

    1000C 60 min 556

    7. Gate oxide formation

    Gate Mask photolithographyGate oxidationDry oxidation furnace

    1000C 60 min 556

    8. Silicon nitride PECVD deposition

    Deposition rate: 24.34nm/minDeposited thickness: 486.7

    8. Silicon nitride PECVD deposition

    Deposition rate: 24.34nm/minDeposited thickness: 486.7

    9. Contact BOE etch formation

    Oxide & nitride etch with BOEEtch time:30 min

    9. Contact BOE etch formation

    Oxide & nitride etch with BOEEtch time:30 min

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    Process Flow of ISFET Fabrication

    10. PVD contact metallization

    PVD moduleAluminum thickness: 1541 Annealing 450 C, 45 min, N2 gas

    Metal Mask, positive photoresistEtch rate Al: 308.2 /minEtch time: 5 min approx.

    10. PVD contact metallization

    PVD moduleAluminum thickness: 1541 Annealing 450 C, 45 min, N2 gas

    Metal Mask, positive photoresistEtch rate Al: 308.2 /minEtch time: 5 min approx.

    Photography ofthe completed ISFET wafer

    Photography ofthe completed ISFET wafer

    ISFET die with metalgate for functionalityevaluation

    ISFET die with metalgate for functionalityevaluation

    ISFET die with Si3N4gate will be packagedand tested in pHsolutions

    ISFET die with Si3N4

    gate will be packagedand tested in pHsolutions

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    Packaging of ISFET

    The packaging process of ISFET: wafer dicing, die mounting,

    wire bonding and encapsulation.

    The ISFET die is separated from the wafer and mounted on a

    PCB as a platform and contacts are wired from die to the PCB.

    Since the ISFET will work in electrolyte solution, an epoxy is

    used to encapsulate the edge of the ISFET die, the wire bonding

    and the PCB.

    The sensing gate is the only area which is exposed to the

    solution will not be covered.

    The type of epoxy used is silicone rubber.

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    1. Diced ISFET from wafer1. Diced ISFET from wafer

    4. ISFET encapsulation4. ISFET encapsulation

    2. Mounting ISFET on PCB3. Wire bonding

    2. Mounting ISFET on PCB3. Wire bonding

    Packaging Flow of ISFET

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    Characterization of ISFET

    The operation of ISFET is analyzed from IdVd and IdVg curves.

    IdVd and IdVg measurements are done using Keithley 4200

    Semiconductor Parameter Analyzer.

    Two tests are performed on ISFET: functionality test at wafer level

    and pH test.

    In functionality test, the ISFET with metal gate is under probes

    connected to the analyzer.

    In pH test, the ISFET is immersed in acidic, neutral and base

    solutions (pH 4, pH 7, pH 10). All solutions obtained from Orion. All measurements were done using Ag/AgCl reference electrode

    from Hanna Instruments.

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    Functionality Test Setup

    Schematic setupSchematic setup

    (a)

    (b)(a) Dark shielded box wafer probestation(b) Keithley 4200 Semiconductor

    Parameter Analyzer

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    pH Test Setup

    (a) Keithley 4200 Semiconductor Parameter Analyzer(b) ISFET(c) Reference Electrode(d) pH buffer solutions

    (a)

    (b)(c)

    (d)

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    Output characteristics of ISFET

    I-V measurements of ISFET performed using Keithley 4200 SPA through wafer probe stationI-V measurements of ISFET performed using Keithley 4200 SPA through wafer probe station

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    IdVd curves at Vg=5.0V for n-ISFET whenmeasured in three levels of pH buffer

    solution

    IdVd curves at Vg=5.0V for n-ISFET when

    measured in three levels of pH buffer

    solution

    Sensitivity, S = Vth / pH= Vg / pH

    = 40.34 mV/pH

    Sensitivity, S = Vth / pH

    = Vg / pH

    = 40.34 mV/pH

    pH Response of n-ISFET

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    IdVd curves at Vg=-5.0V for p-ISFET whenmeasured in three levels of pH buffer

    solution

    IdVd curves at Vg=-5.0V for p-ISFET when

    measured in three levels of pH buffer

    solution

    Sensitivity, S = Vth / pH= Vg / pH

    = 34.83 mV/pH

    Sensitivity, S = Vth / pH

    = Vg / pH

    = 34.83 mV/pH

    pH Response of p-ISFET

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    Conclusions A CMOS ISFET pH sensor has been successfully designed,

    fabricated and characterized.

    Simulation on ISFET is successfully achieved using TCAD.

    Mask layout successfully designed using AutoCAD and

    fabricated on transparency masks.

    Fabrication of ISFET using all in-house CMOS technologyrequired no extra masking or post processing step.

    The ISFET successfully detected buffer solutions of different

    pH. Based on the results obtained, the CMOS ISFET showed a

    fairly good response as a pH sensor and has potential for

    commercialization.

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    Research Achievements

    2

    3

    1

    Bronze Medal

    Silver Medal

    Gold Medal

    5Local Conference

    3Regional Conference

    4International Conference

    1International Journal

    Research Publications Award Medals

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    Recommendation SPICE simulation

    Simulation of pH response of ISFET

    Miniaturization of ISFET

    Sub-micron size device, chrome masks

    Lower cost of fabrication, mass production

    Packaging of the ISFET

    Precise wafer dicing by automation

    Proper encapsulation material and technique Sampling Experiments

    Larger samples of pH on both acidic and basic tests

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    Acknowledgement

    The financial support from UniMAP and Malaysian Ministry of

    Science, Technology and Innovation (MOSTI).

    Guidance and advices from supervisors

    Motivational supports from families, researchers, friends.