VirtualSubmoduleConceptAppliedtotheModularMultilevelConverter · Virtual Submodule Concept Applied...

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Virtual Submodule Concept Applied to the Modular Multilevel Converter

A. Christe and D. Dujic

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POWER ELECTRONICS LABORATORY

ÉCOLE POLYTECHNIQUE FÉDÉRALE DE LAUSANNE

mailto:[email protected]

mailto:[email protected]

Virtual Submodule Concept Applied to the ModularMultilevel Converter

Alexandre Christe, Drazen DujicPower Electronics Laboratory, École Polytechnique Fédérale de Lausanne (EPFL), [email protected], [email protected]

Abstract

The design phase of a modular multilevel converter(MMC) needs to be supported by suitable tools forthe submodule loss evaluation. This paper pro-poses a fast MMC cell loss calculation based onthe virtual submodule (VSM) concept. Comparedto other proposed tools, the impact of the circulat-ing current control is directly taken into account anddifferent modulation schemes can be easily com-pared. To verify the proposed concept, the re-sults are compared with the losses obtained froma switched model with closed-loop control, wherethe analytical MMC key waveforms are approachedin the steady state. The proposed method providesa great flexibility and a significant reduction of thesimulation / computational time otherwise neededto evaluate SM losses under various operating con-ditions.

1. Introduction

While the behavior and control of MMCs have beenthorougly described in the literature since its intro-duction [1], performant design tools are at the mo-ment still missing. This paper focuses on semicon-ductor and capacitor losses for MMC with unipo-lar cells, although the proposed method could bestraight-forwardly extended to other MMCs topolo-gies.

The MMC prototype, currently under development,has the following rating: 10 kV DC bus, 0.5 MVA ap-parent power and uses 96 submodules (SMs) withlow voltage IGBT semiconductors that can be con-figured into unipolar or bipolar submodule (SM) [2],[3]. The targeted application is the interconnectionof the widely deployed 400 V LVAC grid, or corre-sponding microgrid, with the emerging MVDC grids(10 kV is considered in our case). For that reason,

the converter has to deal with a large voltage ra-tio and the use of a transformer for galvanic isola-tion and voltage adaption is mandatory, as shown inFig. 1, or elaborated in [4] for the case of integratedtransformer.

To support system design, this paper proposes asemi-numerical method for loss calculation of theMMC SM using the VSM concept. Authors of [5],[6] have obtained semiconductor losses by simu-lation or numerically considering direct modulationfor HVDC application in mind, with a DC circulat-ing current and without considering the capacitorlosses [7]. In contrast, the proposed method allowsfor a fast estimation of the SM losses under dif-ferent operating conditions, control schemes (e.g.effects of the circulating current injection strategy)and modulation methods under the assumption of astable operation of these schemes in steady-state.To verify the validity of the proposed method, acomparison with a fully switched converter modelhas been carried out.

vga vgb vgc

N

Lg

Ls

VDC /2

VDC /2

IDC

iap ibp icp

icnibnian

eap ebp ecp

ean ebn ecn

vCap1

vCapN

vCan1

vCanN

vCbn1

vCbnN

vCbp1

vCbpN

vCcp1

vCcpN

vCcn1

vCcnN

branch phase-leg

SM

CsmTu Du

Tl Dliga iga iga

LbrVB

Fig. 1: MMC with external line frequency transformer(LFT) for DC/3-AC conversion with large voltage ratio.Each branch comprises Nsm series-connected unipolarSMs.

PCIM Europe 2017, 16 – 18 May 2017, Nuremberg, Germany

ISBN 978-3-8007-4424-4 © VDE VERLAG GMBH · Berlin · Offenbach145

2. Analytical description of theclosed-loop MMC waveforms

The key difference of this method with other alreadyproposed methods is that it is based on closed-loop MMC waveforms. If the circulating current con-trol is assumed to be working, then the measuredwaveforms correspond to their references. Severalscenarios have to be accounted for, depending onwhether or not a second harmonic circulating cur-rent is used, the addition of a common mode volt-age and any combination of the two. The branchvoltage and current equations are presented below.

ep/n =VDC

2

(1∓ kAC cos

(ωt− 2π(k − 1)

3

)∓ vCM

)

−(Rbrip/n + Lbr

d

dtip/n

)(1)

ip/n =IDC

3︸︷︷︸DC term

±1

2ig cos

(ωt+ φ− 2π(k − 1)

3

)︸︷︷︸

fundamental AC term

+icirc,2 cos

(2ωt+ θ2 −

2π(k − 1)

3

)︸︷︷︸

optional 2nd harmonic term

(2)

where VDC is the DC link voltage, kAC = 2vg/VDC

the voltage ratio between the three-phase AC andDC grids, ω the grid frequency, k ∈ 1, 2, 3 thephase number, S the apparent power of the con-

verter and φ the load angle. The grid current (igand φ) is fully determined from the power exchangebetween the DC bus and the AC grid.

ig =2S

3vg=

2S

3kACVDC/2(3)

icirc,2 =vg ig

2VDC=

S

3VDC(4)

The DC current is determined by taking the nega-tive root of a quadratic equation [8]. It is important tostress that for best accuracy the branch impedance(Rbr and Lbr) have to be accounted for in the model[9].

IDC =

[VDC −

√√√√V 2DC − 8Rbr

(vg ig

2cos(φ)

+2Rbr

(i2g8

+i2circ,2

2

))]/ (4Rbr) (5)

The result of the analytical description of the MMCwaveforms in closed-loop is presented in Fig. 2 forthe parameters in Table 1.

3. Virtual submodule concept

Once that the analytic expressions of the MMC keywaveforms are obtained, they need to be appropri-ately distributed to each SM. The modulation can be

0

5

10eap, ean [kV]

−100−50

050

100iap, ian, iga, icirc [A]

−2000

200∆pap, ∆pan [kW]

99.510

10.511

vCΣap, vCΣan [kV]

0 5 10 15 20 25 30 35 400

0.5

1

Time [ms]

mp, mn [-]

(a)

0

5

10eap, ean [kV]

−100−50

050

100iap, ian, iga, icirc [A]

−2000

200∆pap, ∆pan [kW]

99.510

10.511

vCΣap, vCΣan [kV]

0 5 10 15 20 25 30 35 400

0.5

1

Time [ms]

mp, mn [-]

(b)

Fig. 2: Branch representative waveforms with: (a) DC circulating current and (b) DC plus 2nd harmonic circulatingcurrent injection. The branch inductance value is swept from 0 H (light shade) to 50 mH (dark shade) to highlightthe impact of the branch inductance voltage drop. The currents are not impacted by Lbr, as they are set for a givenpower transfer and no ripple is considered.



Tab. 1: System parameters

VDC 10 kV S 0.5 MVA Nsm 16Rbr 0.1 Ω kAC 0.75 Csm 1.9 mFkDC 1 Lbr 10 mH Resr

a 110 mΩaPer individual capacitor

ibr(t)⟨vC⟩(t)

m(t)

Tu Du

Tl Dl

sw

VIRTUAL SMiIGBT

iDiode

uIGBT

swMOD

ANALYTICALMODEL sw

iCap

Fig. 3: Functional VSM concept, where the MOD block isimplemented with a single carrier and a quantizer. It pro-duces an output identical to a collection of all switchingevents from any modulation scheme.

modified in order to capture and direct all switchingevents to only one VSM, as shown in Fig. 3.

In the conventional multilevel PWM principle,for both phase-disposition PWM (PD-PWM) andphase-shifted PWM (PS-PWM), each switchingevent is obtained from a reference/carrier intersec-tion. The transformation to an implementation witha single carrier combined with a quantizer, that isselected for the modulation (MOD) block in Fig. 3,is shown in Fig. 4. The quantizer signal is firstobtained from a threshold comparison with eachcarrier band defined by [1/Nsm : 1/Nsm : 1] andmarked with . Note that the quantizer signals areidentical for both modulation methods, as they onlydepend on the number of carrier bands, i.e. onNsm,but not on the carrier phase. Then a single carrierPWM is created with a modified reference obtainedby substracting the quantizer signal to the refer-ence signal and compressing all carriers into one.As each carrier has the same phase for PD-PWM,there is no phase jump in the compressed car-rier signal, in contrast to alternate phase-oppositiondisposition PWM (APOD-PWM) (identical to PS-PWM), where a 180 phase-shift is present betweeneach neighboring carrier bands, leading to 180

phase jump in the compressed carrier signal eachtime a carrier band is crossed ( ). Finally, the PWMpattern is obtained by summing the quantizer andsingle carrier PWM output. Note that at first sightthe single carrier modulation seems to produce ad-ditional switching events compared to the conven-tional implementation, but this is due to a required

0

0.5

1Bands

0

0.5

1Quant.

0

0.1

0.2Single

carrier

0

0.1

0.2Single

PWM

Time [p.u.]

0 0.2 0.4 0.6 0.8 10

0.5

1PWM

(a)

0

0.5

1Bands

0

0.5

1Quant.

0

0.1

0.2Single

carrier

0

0.1

0.2Single

PWM

Time [p.u.]

0 0.2 0.4 0.6 0.8 10

0.5

1PWM

(b)

Fig. 4: PWM modulator principle with single carrier andquantizer, where the reference/carrier intersections arerepresented by and the reference/carrier band inter-sections by : (a) for PD-PWM with pulse number p =2Nsm + 1 and (b) for APOD-PWM with pulse numberp = 2Nsm. For APOD-PWM the single carrier has afrequency that jumps by 180 each time the quantizerchanges its output. For illustration purpose, a sinusoidalmodulation index with Nsm = 6 is shown.

compensation of changes in the quantizer signalthat doesn’t lead to a switching signal in the result-ing PWM pattern ( in the single carrier plots). Amotivation for such an implementation in the con-text of MMC is that the position of a SM within abranch is not linked with a specific carrier band, inthe case of a branch balancing method based on asorting algorithm.

To evaluate the MMC losses using the VSM con-cept, the analytical model is combined with a PWMmodulator, from which the switching instants arefetched, as shown in Fig. 5. The analytical expres-sions are evaluated over the simulation horizon fora given set of parameters and then loaded into 1Dlook-up tables (LUTs). The modulation block is im-plemented with the single carrier and quantizer asillustrated in Fig. 4. Multiple consecutive turn-ON orturn-OFF events, that happen in a multilevel switch-ing pattern, are correctly handled by the VSM im-plementation, that doesn’t rely on a pair of physicalswitches. Then the VSM constructs the signals thatare routed to the loss tool. As the branch current,capacitor voltage and modulation index are used



iIGBT,u

iDiode,u

1D LUT

ibr

1D LUT

VCΣ

1D LUT

m

Nsm

MOD

== 0== 1

-1

⩾ 0

< 0

-1

⩾ 0

< 0

-1

swu

swl

swON,uswOFF,u

swON,lswOFF,l

iIGBT,l

iDiode,l

uIGBT,u

uIGBT,l

⟨vC⟩

== 0== 1

upper IGBT

lower IGBT

clk

ideal switch

ideal switch

edge det.

iCap

Σ

analyticalexpressions

modulation virtual submodule

Fig. 5: Detailed VSM concept implementation.

as inputs, the VSM concept is insensitive to thecirculating current injection strategy or modulationmethod. The switching instants are collected withthe edge detection block (turn-ON and turn-OFF)and stored for further post-processing and loss cal-culations.

4. MMC switched model

To compare the analytical method based on theVSM concept with realistic waveforms from a fullyswitched MMC model, circuit simulations are per-formed with PLECS / Simulink. The comparison iscarried with two modulation methods: (i) PD-PWMand (ii) PS-PWM. The considered apparent branchswitching frequencies are 3 kHz for PD-PWM and2.95 kHz for PS-PWM. This corresponds to a SMswitching frequency of 187.5 Hz and 184.375 Hz, re-spectively. The presence of a branch balancingmethod is the underlying requirement for the deriva-tion of the macroscopic level control diagram. Thefundamental objective is to ensure an equal en-ergy transfer between all SMs. They are briefly de-scribed hereafter for each modulation method.

4.1. PD-PWM

In order to control the SM switching frequency, thesorting algorithm is not run at every sampling timebut rather at every switching event. It is inspiredfrom the Reduced Switching Frequency methodproposed originally in [10]. This prevents the inser-tion of additional switching events that would be in-duced by a sorting algorithm executed at the appar-

ent branch switching frequency, with group swap-ping between the bypassed and inserted SMs.

4.2. PS-PWM

Equal switching frequency among all SMs of thesame branch is an inherent feature of PS-PWM, asa different carrier is assigned to each SM. On theother hand, it requires a modified branch balancingalgorithm [11], that can be partially circumventedin the case of non-integer frequency ratio betweenthe grid frequency and the SM carrier frequency, asit leads to self balancing [12].

4.3. Control diagram

The state-of-the-art MMC control is selected, ac-cording to [13]. It is implemented in a cascadedmanner, with internal current controllers and ex-ternal capacitor voltage controllers. The completecontrol diagram is shown in Fig. 6. Unlike classicaltopologies, the control of an MMC can be dividedinto two parts: (i) the inner state variables control(circulating current and capacitor voltages) and (ii)the external state variables control (AC grid cur-rent, DC voltage). Under the assumption of a work-ing branch balancing algorithm, that ensures a con-trolled spread among the capacitor voltages withina branch, a macroscopic converter model can beadvantageously used for control purpose. The ca-pacitor voltage control is divided in 2 objectives: (i)the total energy control (TEC), which ensures thatthe total energy in the converter is kept constant as



TEC

DEC

ΣVCΣa⋆

ΔVCΣa⋆CCC

GCC

ωVCΣapVCΣan xΣΔ

xpn

iΣffa

iB

iLiα

iβ

⋆

⋆

VB

xpn

xLBω

ep

en

⋆

⋆ mod.iapian xBL

xpn

cba

cba

icirc⋆

Nsm

switchingsignals

2ω

ω

Fig. 6: Control structure adopted for the simulations assuming MMC connection to a stiff MVDC grid. The relevantcontrol blocks are: total energy controller (TEC), differential energy controller (DEC), circulating current controller(CCC) and grid current controller (GCC).

−100−50

050

100iap, ian, iga, icirc,a [A]

550

600

650

700vCap, vCan [V]

0 5 10 15 20 25 30 35 409

9.510

10.511

Time [ms]

vCΣap, vCΣan [kV]

(a)

−100−50

050


550

600

650

700vCap, vCan [V]

0 5 10 15 20 25 30 35 409

9.510

10.511

Time [ms]

vCΣap, vCΣan [kV]

(a)

−100−50

050


550

600

650

700vCap, vCan [V]

0 5 10 15 20 25 30 35 409

9.510

10.511

Time [ms]

vCΣap, vCΣan [kV]

(b)

−100−50

050


550

600

650

700vCap, vCan [V]

0 5 10 15 20 25 30 35 409

9.510

10.511

Time [ms]

vCΣap, vCΣan [kV]

(b)

−100−50

050


550

600

650

700vCap, vCan [V]

0 5 10 15 20 25 30 35 409

9.510

10.511

Time [ms]

vCΣap, vCΣan [kV]

(c)

−100−50

050


550

600

650

700vCap, vCan [V]

0 5 10 15 20 25 30 35 409

9.510

10.511

Time [ms]

vCΣap, vCΣan [kV]

(c)

−100−50

050


550

600

650

700vCap, vCan [V]

0 5 10 15 20 25 30 35 409

9.510

10.511

Time [ms]

vCΣap, vCΣan [kV]

(d)

−100−50

050


550

600

650

700vCap, vCan [V]

0 5 10 15 20 25 30 35 409

9.510

10.511

Time [ms]

vCΣap, vCΣan [kV]

(d)

Fig. 7: Steady-state closed-loop responses (colored lines) versus analytical waveforms (dashed lines) in phase-lega: (a) PD-PWM with DC circulating current for φ = 0, (b) PD-PWM with DC plus 2nd harmonic circulation currentfor φ = 3π/4, (c) PS-PWM with DC circulating current for φ = π/2 and (d) PS-PWM with DC plus 2nd harmoniccirculating current for φ = π/4.

well as equally distributed between the three phase-legs and (ii) the differential energy control (DEC),which ensures that the energy is equally distributedbetween the upper and lower branch of the samephase-leg. In the literature, TEC is also referredas horizontal balancing and DEC as vertical energybalancing [14].

4.4. MMC waveforms in closed-loop

The relevant waveforms from the analytical modeland from the closed-loop switched model are com-pared for various load angles and the two consid-ered circulating current injection strategies in Fig. 7.Aside from both the branch current ripple and ca-pacitor voltage spread that cannot be captured in



the analytical model, they are in very good agree-ment. This also demonstrates the performance ofthe control algorithm: a perfectly DC circulating cur-rent (Fig. 7a+c) or a DC with superimposed 2nd har-monic circulating current (Fig. 7b+d) are obtained insteady-state.

5. Loss tool

To compare the results, a common loss tool collectsthe waveforms of interest either from the VSM orthe fully switched model. The input waveforms aresampled at 200 kHz. The waveforms of interest are:(i) the voltage across both upper and lower IGBTs,(ii) the current through the IGBTs and the diodesas well as the capacitor current and (iii) the switch-ing instants, which are mandatory in order to deter-mine the switching losses (its functional descriptionis illustrated in Fig. 8). Different semiconductor de-vices can be easily compared, as they are loadedfrom a database - though based on data sheet pa-rameters. Multiple simulation sweeps for each de-vice are not required, as device specific parametersare not required for the simulation. Proper scalingsand interpolations are built into the loss tool, aimingto minimize the errors due to the limited number ofsampled points provided for the switching loss ener-gies. Additional calculated data provided as outputsare also indicated at the bottom of the loss tool.

6. Verification and comparison

To provide a complete analysis of the error betweenthe VSM method and the loss values obtained fromthe detailed switched model, extensive simulations

Ic

E

Ic

E

Ic

Edevicesloss map

LOSSTOOL

iIGBT

iDiode

uIGBT

sw

PIGBT,cond.

PIGBT,ON

PIGBT,OFF

PDiode,rr

PDiode,cond.

Switchedmodel

VirtualSM

iRMSiAVG imax imin

iCap

PCap

capacitorslist

RESR,eq

Fig. 8: Loss calculation tool diagram.

for different operating points are carried. The lossesare computed in the positive branch of phase-lega, but any other branch could have been selected.The waveforms are recorded over ten fundamentalAC grid periods before the loss tool is invoked, inorder to mitigate the instantaneous loss differencebetween the SMs. The average losses per SM areobtained from the VSM (representing a completebranch) by simple division by Nsm.

The conduction losses are accurately estimated bythe VSM method, as based on the branch currentRMS value, which is unaffected by the branch cur-rent ripple. The switching losses are less accuratelyestimated by the proposed method. The reasonbehind is that they depend on the instantaneousswitched branch current and SM capacitor voltages.The accuracy dependency is inversely proportionalto the apparent branch switching frequency. How-ever, as the switching losses are several orders ofmagnitude smaller than the conduction losses, theoverall semiconductor losses are in good agree-ment. The complete results, for each modulationmethod and circulating current injection strategy,are presented in Fig. 9. For each operating point,the left side stacked bars correspond to the VSM

Pc,T,u Pc,T,l Pc,D,u Pc,D,l Pon,T,uPon,T,l Poff,T,u Poff,T,l Prr,D,u Prr,D,l

-π -π/2 0 π/2 π0

20

40

60

φ [rad]

Loss

es[W

]

(a)-π -π/2 0 π/2 π

0

20

40

60

φ [rad]

Loss

es[W

]

(b)

-π -π/2 0 π/2 π0

20

40

60

φ [rad]

Loss

es[W

]

(c)-π -π/2 0 π/2 π

0

20

40

60

φ [rad]

Loss

es[W

]

(d)

Fig. 9: Averaged semiconductor loss comparison be-tween the VSM method (left side stacked bars) and theswitched model (right side stacked bars): (a) PD-PWMwith DC circulating current, (b) PD-PWM with DC plus2nd harmonic injection circulating current, (c) PS-PWMwith DC circulating current and (d) PS-PWM with DCplus 2nd harmonic injection circulating current.



SwitchedVSM

-π -π/2 0 π/2 π0

10

20

30

40

φ [rad]

Loss

es[W

]

(a)-π -π/2 0 π/2 π

0

10

20

30

40

φ [rad]Lo

sses

[W]

(b)

-π -π/2 0 π/2 π0

10

20

30

40

φ [rad]

Loss

es[W

]

(c)-π -π/2 0 π/2 π

0

10

20

30

40

φ [rad]

Loss

es[W

]

(d)

Fig. 10: Averaged SM capacitor bank losses compari-son between the VSM concept (left side bars) and theswitched model (right side bars): (a) PD-PWM with DCcirculating current, (b) PD-PWM with DC plus 2nd har-monic injection circulating current, (c) PS-PWM with DCcirculating current and (d) PS-PWM with DC plus 2nd

harmonic injection circulating current.

method and the right side stacked bars to the aver-aged semiconductor losses of the switched model.The split of different loss contributions in functionof the load angle φ can be easily identified. Atthe same time, the loss split and the overall lossesare almost identical to the results obtained from theVSM concept, demonstrating that the MOD block isable to correctly capture and compress the originalswitching patterns. Similarly, the averaged capaci-tor losses are presented in Fig. 10.

The relative errors plots on the total averaged semi-conductor and capacitor losses are presented inFig. 11 and are computed as:

ε =xswitched − xVSM

xVSM· 100 (6)

Given the assumption required for the VSM con-cept, a very good accuracy is obtained, as the lossestimation error is below 2 % for both semiconduc-tor and capacitor losses. The source of this errorcomes from the branch current ripple and the SMcapacitor voltage spread that are not captured bythe VSM. These could be mitigated by an enhancedanalytical description which goes beyond the objec-tives of this work. It is important to state that the

PD-PWM DC circ PD-PWM DC+2nd circPS-PWM DC circ PS-PWM DC+2nd circ

-π -3π/4 -π/2 -π/4 0 π/4 π/2 3π/4 π−0.5

0

0.5

1

1.5

φ [rad]

ε[%

]

(a)

-π -3π/4 -π/2 -π/4 0 π/4 π/2 3π/4 π

−1

01

2

φ [rad]

ε[%

]

(b)

Fig. 11: Relative error plots for each modulation methodand circulating current injection strategy: (a) semicon-ductor average losses and (b) capacitor average losses.

branch current ripple envelope is not simply depen-dent from the instantaneous branch modulation in-dex, apparent switching frequency and branch in-ductance value. Similarly, the capacitor voltagespread is not linearly proportional to the apparentbranch switching frequency or average capacitorvoltage ripple. The proposed concept could be eas-ily extended to include thermal considerations ofthe MMC design, assuming that the thermal net-work parameters are available. The VSM allows fora very fast evaluation of the MMC SM’s stresses,while considering directly the influence of the cir-culating current control strategy and impact of dif-ferent modulation schemes. The detailed switchedmodels takes 300 s for a single operating point tocollect data for the loss tool over 10 fundamentalcycles, while the VSM takes only 0.5 s.

7. Conclusion

Starting from a set of relatively simple branch cur-rent and voltage equations, with deterministic cir-culating current injection strategy enabled by a cir-culating current controller, the averaged MMC con-verter waveforms have been derived. Those wave-forms have been used as inputs for the semicon-ductor loss tool in combination with the proposedVSM concept. The proposed concept has beencompared with switched models of the MMC un-der two PWM modulation schemes: (i) PD-PWMand (ii) PS-PWM. A compression of a large num-ber of switching pulses is required for the applica-



tion of the VSM concept, which can be easily real-ized with a quantizer and one suitable carrier. Ithas been shown that there is a good agreementbetween the predicted (analytically) and obtained(switched) converter waveforms in steady-state, un-der the conditions of limited voltage spread amongthe capacitor voltages of the same branch and lim-ited branch current ripple (compared to the branchcurrent average value). Moreover, the loss differ-ence is within the usual safety margin that is takenfor any industrial grade product during the designprocess. A simulation time benchmarking revealeda speed gain in the range of 600 between the semi-numerical and switched simulations. This signifi-cant gain is a real advantage for the VSM concept,as a complete converter loss map for any possi-ble operating point can be obtained almost instan-taneously. The necessity to run loss calculation inclosed-loop operation is fully justified by the partic-ular role of the circulating current in an MMC, andwith the aid of the VSM concept, this problem is sig-nificantly simplified without any loss of information.

Acknowledgment

This work is part of the Swiss Competence Cen-ters for Energy Research (SCCER) initiative whichis supported by the Swiss Commission for Tech-nology and Innovation (CTI) with focus on FutureSwiss Electrical Infrastructure (FURIES).

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