Viewsonic e655_tda8172 Tv Vertical Deflection

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TDA9102C/T

H/V PROCESSOR FOR TTL V.D.U

May 1994

DIP20 (0.25)(Plastic package)

ORDER CODES : TDA9102C/T

HORIZONTAL SECTION. SYNCHRONIZATION INPUT : TTL COMPAT-IBLE, NEGATIVE EDGE TRIGGERED. SYNCHRONIZATION INDEPENDENT FROMDUTY CYCLE TIME.OSCILLATOR : FREQUENCY RANGE FROM15kHz to 100kHz.HORIZONTAL OUTPUT PULSE SHAPERAND SHIFTER

. PHASE COMPARATOR BETWEEN SYN-CHRO AND OSCILLATOR (PLL1). PHASE COMPARATOR BETWEEN FLYBACKAND OSCILLATOR (PLL2). INTERNAL VOLTAGE REGULATOR.DC COMPATIBLE CONTROLS FOR PHASEAND FREQUENCY.HORIZONTAL OUTPUT DUTY CYCLE : 41%

VERTICAL SECTION. SYNCHRONIZATION INPUT : TTL COMPAT-IBLE, NEGATIVE EDGE TRIGGERED

. SYNCHRONIZATION INDEPENDENT FROMDUTY CYCLE TIME.OSCILLATOR : FREQUENCY RANGE FROM30Hz to 120Hz.RAMP GENERATOR WITH VARIABLE GAINSTAGE. VERTICAL RAMP VOLTAGE REFERENCE. INTERNAL VOLTAGE REGULATOR.DC COMPATIBLE CONTROLS FOR FRE-QUENCY, AMPLITUDE AND LINEARITY

DESCRIPTION

The TDA9102C/T is a monolithic integrated circuitfor horizontaland vertical sync processing in mono-chrome and color video displays driven by inputTTL compatible signals.

The TDA9102C/T is supplied in a 20 pin dual in linepackage with pin 11 connected to groundand usedfor heatsinking.

10

9

8

7

6

5

4

3

2

1

11

12

13

14

15

16

17

18

19

20

Horizontal Phase Adjust

Phase Comparator 2 Output

Horizontal Flyback Input

Horizontal Output

Horizontal Power Ground

C5

Horizontal TTL Input

Phase Comparator 1 Output

C2

R1

Substrate Ground

Vertical Frequency Preset

C13

Vertical TTL Input

Vertical Ramp Output

Vertical Amplitude Adjust

Vertical Linearity Adjust

Linearity Output

Vertical Reference Voltage

VS

9102T

-01

.EP

S

PIN CONNECTIONS

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9102T

-02

.EP

S

BLOCK DIAGRAM

4

15

5

6

9

8

14

17

18

16

13

12

10

3

1

2

1

1

20

19

HORIZ

ONTAL

FLYBA

CK

INPUT

VERTICAL

SYN

C.

INPUT

DCVERTICAL

LINEARITY

ADJU

STEMENT

DCFRE

QUEN

CY

PRE

SET

DCVERTICAL

AMPLITUDE

ADJU

STEMENT

DCFRE

QUENC

Y

ADJU

STEMENT

DCH

ORIZ

ONTAL

PHA

SE

ADJU

STEMENT

HORIZ

ONTAL

SYN

C.

INPUT

+5V

+5V

VS

VREF

TDA9102C/T

VS

VOLTA

GE

RE

GULATO

R

VERTICAL

OSCILLATO

R

2

PHA

SE

COMPARAT

OR

VERTICAL

TTLINTERFA

CE

LOW

SUPPLY

VOLTA

GE

PR

OTE

CTION

HORIZ

ONTAL

OSCILLAT

OR

1

PHA

SE

COMPARAT

OR

HORIZ

ONTAL

TTLINTERFA

CE

HOR

.

PUL

SE

SHAPER

R3

C3

C1

R2

R1

C2

R12

R18

C18

C13

C9

R8

R14

7

C5

R4

TDA9102C/T

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ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

VS Supply Voltage 18 V

VSYNC Sync Input Peak Voltage + VS V

IOH Output Sinking Peak Current (Pin 7 ; t < 3s) 2 A

I15 Output Current (Pin 15) - 10 mA

I19 Output Current (Pin 19) - 10 mA

Ptot Total power dissipation (Tamb < 70oC) 1 W

Tstg , Tj Storage and Junction Temperature - 40, + 150oC

9102T

-01

.TBL

THERMAL DATA

Symbol Parameter Value Unit

Rth(j-a) Junction-ambient Thermal Resistance 80oC/W

9102T

-02

.TBL

ELECTRICAL CHARACTERISTICS

(Tamb = 25oC, VS = 12V, refer to the test circuits, unless otherwise specified)

Symbol Parameter Test conditions Min. Typ. Max. Unit

HORIZONTAL SECTION

VS Supply Voltage Range 10.5 12 15.5 V

IS Supply Current 40 70 mA

V1 Voltage Reference at Pin 1 I1 = 0.5mA 3.2 3.5 3.8 V

I1 Current at Pin 1 - 1 mA

V2 Voltage Swing at Pin 2 3.7 4 4.3 VPP

K0 Free Running Frequency Constant fo = 1/(K0 x R1 x C2) 2.8 3.04 3.2

V3 - V1 Control Voltage Range (See technical note 1) 1.6 2.5 V

I3 Peak Control Current 3 mAK3

Gain Phase Comparator 1K3 = 2 x I3 / 360

17A

degree

V4 Sync Threshold Input (neg. edge) q Sync highq Sync low

2 80.8

VV

I4 Current at Pin 4 q Input highq Input low - 10

10 AA

T4 Input Pulse Duration T = 1/fH @ fH = 27.64kHz 1 0.9T sV5 Monostable Threshold 5.6 6 6.4 V

t5 Internal Pulse Width (t5 = C5 x V5 /I5) C5 = 220 pF(see technical note 2)

3.6 s

t7 Output Pulse Duration (low) - T = 1/fH fH = 27kHzfH = 70kHz

0.38T0.35T

0.41T0.39T

0.44T0.43T

ss

V7 sat Output Saturation Voltage I7 = 600 mA 1.2 2.5 V

tD Permissible delay between output pulseleading edge and flyback pulse leading edge

(for keeping a constant duty cycle) ; T =1

fH

See technical note 4@ fH = 27kHz

0.41 T - t FLY s

IFLY Flyback Input Current at Pin 8 q Flyback Onq Flyback Off

0.7-1

2 mAmA

V8 Clamp voltage at Pin 8 q I8 = 1mAq I8 = - 1mA

0.6- 0.6

VV

I8 Current for switching low the output pulse 0.7 2 mA

I9 Peak control current 0.9 mA 9102T

-03

.TBL

TDA9102C/T

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ELECTRICAL CHARACTERISTICS (continued)

(Tamb = 25oC, VS = 12V, refer to the test circuits, unless otherwise specified)


HORIZONTAL SECTION

K9 Phase sensitivity at Pin 9 (See technical note 3) 67.5degree

V

V10 Control voltage range 0.5 4.5 V

K10 Phase control sensitivity at Pin 10 20 22.5 25degree

V

HADJ Horizontal phase adjustment for V10 varyingfrom 0.5 to 4.5V (27.64kHz)

Zero degree phase: flybackcentered on the middle of thepulse at Pin 5

- 45 + 45 degree

K1 Phase jitter constant (jitter =K1

106 . fH) 100 150 ppm

K2 Frequency drift versus supply voltage

K2 =dF . 106

dV . fH

VS = 10.5V to 15.5V 400 ppm

V

VERTICAL SECTION

V12 Voltage reference at Pin 12 3.2 3.5 3.8 V

I13

I12Current gain at Pin 13

I12 = 100A(I12 max. = 200A)

0.94 1 1.06

V13 Typical Vertical Sawtooth Amplitude(Pin 13) for Center Frequency

To be adjusted by I12 4 VPP

tFALL Discharge time at Pin 13 C18 = 0.22 F, V13 = 4VPP 10 22 sfVL Maximum Vertical Frequency Vertical Sync Low

CPin 13 = 220nF, RPin 12 = 58k84 Hz

fVH Minimum Vertical F requency Vertical Sync HighCPin 13 = 220nF, RPin 12 = 58k

56 Hz

K14 Synchro window constant ts =K14

fV(See technical note 6) 0.333

V14 Sync input threshold (negative edge) q Sync highq Sync Low

2 80.8

VV

I14 Current at Pin 14 q Input highq Input Low V14 = 0.8V - 10

10 AA

t14 Input pulse duration T =1

fV@ fV = 64.75Hz 10 0.5T s

V15 Average value of voltage on Pin 15 V13 = 4VPP, V16 = 2.5V 4 V

II15I Output current at Pin 15 1 mA

K15 Buffer gain constant at Pin 15V15PP = K15 . V13PP

V16 = 2.5V 0.95

K16 Buffer variable gain constant at Pin 15 :

K16 =V15PP

V16 . V13PP

2.5V< V16 < 4.5V0.5V< V16 < 2.5V

0.10.1

V -1

V-1

I16 Input bias current at Pin 16 V16 = 0.5V - 50 AI17 Input bias current at Pin 17 V17 = 4.5V 50 A

V18 Average voltage at Pin 18 : V18 = 2 +V18PP

2V17 = 3.5V, R18 not connected 3 V

K18 Linearity correction constant : K18 =V18PPV17

V13PP = 4V,1.5V < V17 < 4.5V 1

V19 Voltage reference at Pin 19 (See technical note 5) 7.6 8 8.4 V

I19 Current at Pin 19 2 mA 9102T

-04

.TBL

TDA9102C/T

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ELECTRICAL CHARACTERISTICS (continued)

(Tamb = 25o

C, VS = 12V, refer to the test circuits, unless otherwise specified)


VERTICAL SECTION

K17 Frequency drift versus supply voltage K17 =dF . 106

dV . fVVS = 10.5V to 15.5V 300

ppm

V9102T

-05

.TBL

12

C2

R1

R2

I1

if

C1

C3

R3

3

HOR. SYNC.1HORIZONTAL

OSCILLATOR

V3L

V3H V3H VDC

VDCV3L

9102T

-03

.EP

S

V (V)

t (s)

VL = 5.2V

= 6.8VVH= 6VV

= 2VVLL

1/fv

ts

9102T

-04

.EP

S

Technical note 1

fH (nom) = 26.8 kHz

R1 = 6.8k R2 = 56 kC2 = 1.8 nF

fpull-in = fH (nom) V3 V1 / R2

V1 / R1= fH (nom)

If

Io(A)

where: V1 = 3.5V and V3 - V1 is the controlvoltage range.

The voltage at Pin 3 is limited by two clampingdiodes at the voltage V3H and V3LWhen the PLL1 is synchronized and perfectlytuned, V3 = V1.

Remark: The value of C2 influences the horizontaloscillator free running frequency; it doesnt effectthe relative pull-in range. I f the horizontal fre-quency is changed by using R1, the pull-in rangechanges accordingly with the formula (A).

Technical note 2

The internal pulse t5, is generated by the currentgenerator I5 charging the external capacitorC5, according with the formula (B):

t5 =C 5 . V5

I5(B), t5 =

TH

12is recommended.

Technical note 3

K9 = 67.5 degrees/volt represents the slope of theoscillator charging period of the waveform at

Pin 2:

K9 =360 x 0.75

4

degreeV

Technical note 4

The second PLL can recover the storage of hori-

zontal output stage maintaining a constant dutycycle till the trailing edge of the output pulse getsthe trailing edge of the flyback pulse. From thispoint on, only the leading edge of the output pulsewill be shifted covering a total phase shift of: 0.30T;overcoming this value, it will produce a notch in theoutput pulse (@ fH = 27kHz).

Technical note 5

The voltage reference at Pin 19 can be used topolarize the DC operating point of the verticalbooster. This voltage corresponds to the double ofthe mean value voltage of the vertical sawtooth atPin 13.

Technical note 6

VH VLts

=VH VLL

1/fV

ts =(VH VL)(VH VLL)

1

fV=

K14

fV

TDA9102C/T

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6/7

4

14

17

16

5 8 9

10

20

7

6 19

15

18

12

1

3

2

11

13

Hor.

Sync

.

Vert

.S

ync

.

Fly

.Inpu

t

7

2

6

3

5

4

1

TDA8172

Hor.

Out

Vert.

Yoke

V 14V

S

R1022k

C9

100nF

C8

100F

R11

22k

R1210k

C15

1F

R20150k

R21

62k

R22

220k

C16

220n

F

C17

1.8

nF

C18

15nF

C19

2.2F

R23

3.3

k

R2456k

R2

5

6.8k

P4

47k

P5

47k

C20

22n

F

R27100k

C21

0.2

2nF

R29

2.2

k

R28

2.2

k

R1

3.3

k

R2

3.3

k

R3

51k P

1

47k R

4

22k

P2

47kR

5

39k

C3

15nF

C4

15nF

C5

15nF

R7

39k P

3

47k

C1

100nF

C2

470F

C6

100n

F

C7

1000F

D1

1N4001

C10

220F

C1410F

R181

.2k

R172

.7k

C13

47F

R151

.5k

R14

1.5

R13

120

C12

220n

F

C11

2200F

R161

CCorrection

R9

822

W

IC3

V

V

O

I

GN D

IC1

7812

R6

5.1

k

R8

5.1

k

R2622k

R19

47k*

Note:*ThevalueofR19dependson

CRT

.OnthemockupR19issubstitued

witharesistance+trimmerforgenericapplications.

Hor.P

ower

GND

TDA9102C/T

IC2

9102T

-05

.EP

S

APPLICATION DIAGRAM (with TDA8172)

TDA9102C/T

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20 11

1 10

Ia1

L

B e

D

Z

bZ

e3

F

b1

E

PM

-DIP20

.EP

S

PACKAGE MECHANICAL DATA20 PINS - PLASTIC DIP (0.25)

DimensionsMillimeters Inches

Min. Typ. Max. Min. Typ. Max.

a1 0.254 0.010

B 1.39 1.65 0.055 0.065

b 0.45 0.018

b1 0.25 0.010D 25.4 1.000

E 8.5 0.335

e 2.54 0.100

e3 22.86 0.900

F 7.1 0.280

i 3.93 0.155

L 3.3 0.130

Z 1.34 0.053DIP20

.TBL

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibilityfor the consequences of use of suchinformation nor for any infringement of patents or other rights of third parties which may result

from its use. No licence is granted by implication or otherwiseunder anypatent or patent rights of SGS-THOMSON Microelectronics.Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all

information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in lifesupport devices or systems without express written approval of SGS-THOMSON Microelectronics.

1994 SGS-THOMSON Microelectronics - All Rights Reserved

Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips

I2C Patent. Rights to usethese components in a I

2C system,is granted provided that the system conforms to

the I2C Standard Specificationsas defined by Philips.

SGS-THOMSON Microelectronics GROUP OF COMPANIES

Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - MoroccoThe Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.

TDA9102C/T

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Viewsonic e655_tda8172 Tv Vertical Deflection

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