SIDDHARTH INSTITUTE OF ENGINEERING &TECHNOLOGY: PUTTURELECTRONICS & COMMUNICATON ENGINEERING

LESSON PLAN

Academic Year/Sem: B.Tech III-I Sem. Ref: John D.Carpinelli

Subject: COMPUTER ORGANIZATION ANDARCHITECTURE M. Moris Mano

Subject code: 16EC408

Branch: E.C.E.

Module Topics coveredHours Name of the book Page

NoL TUNIT I

Module 1 Basic Computer Organization – CPU Organization – Memory& I/O Subsystem Organization and Interfacing

6 1John D.Carpinelli

2-18

Module 2 A Simple Computer Levels ofProgramming Languages, Assembly Language Instructions, Instruction Set Architecture Design, A simple Instruction Set Architecture

5 1

John D.Carpinelli

64-74

UNIT II

Module 1 Instruction Cycle – Memory – Reference Instructions – Input/output and Interrupt –Addressing Modes – Data Transfer and Manipulation – Program Control.

8

M. Moris Mano93-134

Module 2 Addition and Subtraction – Multiplication Algorithms – Division Algorithms 5 1

M. Moris Mano134-148

Module 3 Floating-Point Arithmetic Operations – Decimal Arithmetic unit 4 1 M. Moris Mano 148-155

UNIT III

Module 1 Register Transfer Language – Register Transfer – Bus and Memory Transfers,Arithmetic and Logic Micro operations – Shift Micro operations

10

M. Moris Mano255-272280-283

Module 2 Control Memory – Address Sequencing – Micro program Example – Design ofControl Unit

5 1 M. Moris Mano 213-232

UNIT IV:Module 1 Memory Hierarchy - Main Memory –

Auxiliary Memory – AssociativeMemory – Cache Memory – Virtual Memory.

6

M. Moris Mano333-348

Module 2 Input-Output Interface – Asynchronous Data Transfer – Modes ofTransfer

3M. Moris Mano

354-363

Module 3 Priority Interrupt – Direct Memory Access (DMA). 2 M. Moris Mano 363-376

UNIT V

Module 1 Parallel Processing – Pipelining – Arithmetic Pipeline – Instruction Pipeline. 4

M. Moris Mano445-449

Module 2 Characteristics of Multiprocessors – Interconnection Structures – Inter Processor Arbitration.

4M. Moris Mano

462-496,

Module 3 Inter Processor Communication and Synchronization. 3 M. Moris Mano 502-506

TOTAL 64 6

S.No Name of the book Author1. Computer Systems Organization and Architecture John D. Carpinelli, 2. Computer Systems Architecture M. Moris Mano, PEA3. Computer Organization and Architecture William Stallings

SIDDHARTH INSTITUTE OF ENGINEERING &TECHNOLOGY:: PUTTURELECTRONICS & COMMUNICATON ENGINEERING

COMPUTER ORGANIZATION AND ARCHITECTURE

UNIT I

MODULE 1: Basic Computer Organization – CPU Organization – Memory& I/O Subsystem Organization and Interfacing

IMPORTANT QUESTIONS

1. a) Briefly explain about basic computer organization? b) Explain Instruction cycle with the help of necessary timing diagrams? 2. With a neat sketch explain about CPU organization?

3. a) Explain Input subsystem organization and interfacing with necessary block diagram? b) Explain Output subsystem organization and interfacing with necessary block diagram?

4. a) Explain about different types of memories?

b) Construct and explain the linear organization of 8x2 ROM chip?

BITS

1. The Arithmetic & Logic unit in conjunction with the Control unit called___

2. The cells read & written by a CPU in a group of fixed Size called___

3. To perform any operation the operands from Main Memory Brought into the high-speed storage

elements called____

4. ______ is the Register can keep track all the instruction While execution

5. Two representations for Zero is in which___

6. For 4-bit representations the value 8 is represent able only in ____

7. The string of significant digits is also known as _____

8. The Execution time also referred as_________

9. The program execution time is given by _____________

10. As the radix point is fixed the number system is called _______

11. The 32-bit standard representation is also called as _____

12. The 64-bit representation is also called as ______

13. The no. Of bits represent as Exponent in double precision ____

14. In a single Precision if the number requires an exponent less than -126 represent as ___

15. In the Sign magnitude _________bit is used to represent sign

ASSIGNMENTS

1. With a neat sketch explain about CPU organization?

Module 2: A Simple Computer Levels of Programming Languages, Assembly Language Instructions, Instruction Set Architecture Design, A simple Instruction Set Architecture

IMPORTANT QUESTIONS

1. a) What are the different levels of computer programming languages?

b) Explain about compiling process and assembly process?

2. What are the basic computer instruction formats? Explain them briefly with necessary table?

3. a) Explain about assembly language instructions with the help of Instruction Types? b) Explain in detail about Addressing modes?

4. What are the considerations while designing the instruction set architecture?

BITS

1. The circuit generate Parity bit in transmitter is called ______

2. ____used to handle the data transfer between the main memory and processor

3. A bus that connects major computer components modules is called___

4. An interpreter processes higher level language at a time by____

5. The high-level languages are platform_________________

6. In ______________ mode the operand is a part of instruction instead of the contents of a register or

memory location

7. The process of executing a program by allowing each instruction through a cycle in a sequential manner is known as__________

8. _____ instructions are those instructions whose execution requires the access of memory.

9. _______________ is a synchronous event.

10. ___________ occurs when an arithmetic operation produces a result containing an additional bit that cannot be placed in represented range.

11. A ____________ copies the executable file into memory

12. ____Language instructions can load data from memory into a register of a Microprocessor

13. ______instructions move data from one memory location to another

14. In _____________mode the operand provided is an offset but not the actual address

15. The value is set to 1 if a arithmetic or logical instructions generates a output of Zero______

16. ________ is a collection of bus and register that are special types of memory unit

17. The data stored in_________ chips remind valid and need not be refreshed

18. Which of the following is an example of unidirectional buses___

19. RAM is a primary storage unit in which ______and_______ are stored temporarily

20. In______ addressing modes, the address is added to the data present in the base register to get the effective address

21. ___________is the phase of instruction cycle

22. In____ addressing mode, the operand address specifies another memory location

23. ___________causes the transfer of data from source to destination

24. A __________integrates an object code with another required object code

25. The lowest level of programming languages are______________

ASSIGNMENTS

1. a) Explain about different types of memories?

b) Construct and explain the linear organization of 8x2 ROM chip?

UNIT II

MODULE 1: Instruction Cycle – Memory – Reference Instructions – Input/output and Interrupt –Addressing Modes – Data Transfer and Manipulation – Program Control.

IMPORTANT QUESTIONS

1.What is an instruction cycle? Explain in detail with necessary block diagrams?

2. Explain in detail about Memory-Reference instructions with the help of flowchart?

3. a) What is register? Explain in detail about Input-Output configuration?

b) Explain Input-Output Instructions with necessary table?

4. a) Design and Explain flowchart of Interrupt cycle?

b) Explain Demonstration of Interrupt cycle?

5. a) Design hardware for signed magnitude addition and subtraction?

b) Explain the processfor signed magnitude addition and subtraction with flow chart?

BITS

1. The carry will add to the result in its complement subtraction is called______

2. Carry will get discarded in which type of subtraction______

3. Overflow can occur only when adding two numbers that have the______ sign

4. The shift registers with added circuitry can be used to design ______

5. The zero is added While recoding a Multiplier is called ______

6. Bit pair recoding is also called as______

7. _____ Needs Replacing of the contents of accumulator if the subtraction result is negative

8. Non-restoring is ______ algorithm compared to the Restoring algorithm 9. When the positive

exponent exceeds the maximum possible value is called______

10. Performing subtraction by adding the minuend to the 10’s complement of subtrahend & dropping the carry called______

11. -1 times shifted the multiplicand is selected when moving from ______

12. 0 times the shifted multiplicand is selected when moving from______

13. The Remainder which obtained at the Middle of the division is called ______

14. ___________Algorithm doesn’t need any restoring

15. As if sum is greater than 9 then the no. will be added to the result in BCD addition is___

16. For each & every Floating-point arithmetic can requires to do with exponents is

17. When the negative exponent exceeds the minimum possible value called______

18. The Time delay which occurs to produce carry for the further operations is called_____

ASSIGNMENTS

1. a) What is register? Explain in detail about Input-Output configuration?

b) Explain Input-Output Instructions with necessary table?

Module 2: Addition and Subtraction – Multiplication Algorithms – Division Algorithms

IMPORTANT QUESTIONS

1. Explain in detail about booth multiplication algorithm with an example? 2. a) Tabulate data transfer instructions and explain its instructions in detail?

b) Tabulate data manipulation instructions and explain its instructions in detail?

3. a) What is the use of program control? Mention its typical instructions?

b) Explain in detail about status bit conditions with example?

BITS

1. The Method which uses to eliminate the inter stage carry delay called______

2. An algorithm for signed numbers Multiplication called ______

3. The operations stored in the register are called _____

4. The Symbolic notation for a micro operation is called ____

5. A Tri state gate have a digital circuit is called as _____

6. The Transfer of information from Memory card to outside is called ____

7. The transfer of new information to a Memory location is called _____

8. The Memory address of stack is pointed out by ____

9. ______is a list of elements can be removed or added from one end

10. The different ways to Represent the Address _______

11. The RISC processors used Control unit called ______

12. The one big advantage of RISC processor is ______

13. The micro operation that perform bit manipulation is called ____

14. The logic circuit which performs the addition of two Binary digits is

15. In ____shift operation the vacant bit position created by the shift filled with zero input

16. In _____ shift operation the MSB bit replaced with the same bit

17. Machine instructions are in the form of ________

18. _______ Field specifies the operation in an instruction

19. _______ Holds data read or written into memory

20. The status register is also referred as ________

21. Auxiliary carry is also referred as ______

22. AB+ is _____type of representation

ASSIGNMENTS

1.Explain in detail about booth multiplication algorithm with an example?

Module 3: Floating-Point Arithmetic Operations – Decimal Arithmetic unit

IMPORTANT QUESTIONS

1. Explain in detail about decimal arithmetic unit with necessary flowchart?

BITS

1. As if sum is greater than 9 then the no. will be added to the result in BCD addition is___

2. For each & every Floating-point arithmetic can requires to do with exponents is

3. When the negative exponent exceeds the minimum possible value called______

4. The Time delay which occurs to produce carry for the further operations is called_____

ASSIGNMENTS

1.Explain in detail about Floating arithmetic unit with necessary flowchart?

UNIT III

MODULE 1: Register Transfer Language – Register Transfer – Bus and Memory Transfers, Arithmetic and Logic Micro operations – Shift Micro operations

IMPORTANT QUESTIONS

1 a) Explain with the help of diagram the selection of Address for Control Memory?

b) Discuss in brief about the application of Micro Programming?

2. a) Discuss in brief about the functioning of Micro-Programmed Control Unit?

b) List the advantages and disadvantages of Micro-Programmed Control Unit?

3. a) Explain in detail the block diagram for Hardwired Control Unit?

b) What are the design methods of Hardwired Control unit? Explain any two methods?

4. Draw and explain the Micro Instruction sequencing Organization

5. Explain in detail about Binary adder and Binary Incrementor?

6. Explain in detail about Hardware Implementation Shift Micro Operation?

BITS

1. When control signals are generated by Hardware then the system is said to be

2. In __the control functions are specified by sequential steps of Micro Operations

3. A Memory that is a part of control unit is referred as

4. Control Memory is ______ type of memory

5. The Data Register is sometimes called as ______

6. Micro Instructions are specified as into groups each group is called

7. The Transformation from the Instruction code bits to address in Control Memory where the Routineis

located is called

8. The Instruction set size of Hardwired unit is ____

9. The ROM size usually for Micro Programmed Control Unit is___

10. Hardwired uses _____ than Micro Programmed

11. A sequence of one or more Micro operations is designed to control specific operation is called as___

12. Address sequencing can increment ______ register

13. Write operation performs ______ type of Micro operation

14. PC can receive information from _____ register

15. ____ field specifies the type of branch

16. Expand SBR____

17. _____ Control Unit is slower than ____ Control Unit

18. The grouping of control signals can be done by___

ASSIGNMENTS

1. Explain in detail about Binary adder and Binary Incrementer?

2. Explain in detail about Hardware Implementation Shift Micro Operation?

Module 2: Control Memory – Address Sequencing – Micro program Example – Design of Control Unit

IMPORTANT QUESTIONS

1. What is Routine and Explain in detail about Conditional Branching?

2.What is Instruction Format and Explain in detail about Micro Instruction Code Format with necessary symbols and Micro Operation?

BITS

1. In Control Memory the next address generator sometimes called as----

2. In Control Memory the Data Register sometimes called as-----

3. Expand RISC--------------

4. Micro instruction code format consists of ----- bits

5. The Micro Operations are divided into ----fields of ---- bits each.

6. The Control Memory has ----- words

7. The Address Field consists of ----- bits

8. Expand CAR---

9. A Three-State Gates is a ------ circuit that exhibit three states.

10. In Three-State Gate, two of the states are signals equivalent to logic 1 or 0 and another State is--

11. The ---- Impedance state behaves like an open circuit, when output is disconnected and does not have

a Logic Significance

12. Which Micro operations Transfer Binary Information from one register to another-----

13. Which Micro Operations perform Arithmetic Operations on Numeric Data stored in Register-----------

14. Which Micro operations perform Bit manipulation operations on non-numeric data stored in

Register----------------

15. Which Micro operations perform shift operations on data stored in registers----------

16. The ----shift also known as Rotate Operation

17. An ---- shift is a Micro Operation that shifts a signed binary number to the Left or Right

18. Which symbol denotes a Register--------

19. Which symbol denotes a part of a register------------

20. Which symbol denotes transfer of information-------------

21. Which symbol denotes separates two Micro Operations-------------

ASSIGNMENTS

1. a) Explain in detail the block diagram for Hardwired Control Unit?

b) What are the design methods of Hardwired Control unit? Explain any two methods?

2. What is Instruction Format and Explain in detail about Micro Instruction Code Format with necessary symbols and Micro Operation?

UNIT IV

MODULE 1: Memory Hierarchy - Main Memory – Auxiliary Memory – Associative Memory – Cache Memory –

Virtual Memory.IMPORTANT QUESTIONS

1. a) Discuss the Memory Hierarchy in computer system with regard to Speed, Size and Cost?

b) Describe working of any two auxiliary memory devices?

2. What is virtual memory? What is the relation between address space and memory space in a virtual memory system? Explain with the help of an example? 3. What is the need for cache memory? Explain different types of cache organizations?

BITS

1. ---- most common memory types are used today are

2. If Memory can hold the data even if power is turned OFF it is called as---

3. Semiconductor RAM storage type is---

4. Magnetic tape accessing method is---

5. Magnetic disk alterability is---

6. Capacity is expressed in two terms they are---

7. Semiconductor memories are---

8. Mainly magnetic disks & tapes to implement for---- memory spaces

9. Most of the static RAM’s are built using----- Technology

10. ------ mode MOSFET transistors are used to make RAM cell

11. Dynamic RAM stores the data as a charge on----

12. Static RAM contains -----memory cells per area when compared to Dynamic RAM

13. Which technique is used to increase the bit rate of cache----

14. The subdivision of tracks in compact disk is called---

15. A 3.5-inch Floppy disk maximum capacity is---

16. Which material is used as a magnetizing material----- Oxide

17. In 3.5-inch floppy disk, number of tracks is---

18. Which device is used as a secondary storage device in computer systems---

19. Mostly magnetic tapes are used for-----

20. Which disks are used in large size computers----

21. Expand “RAID”---

ASSIGNMENTS

1. Explain in detail about main memory and auxiliary memory

Module 2: Input-Output Interface – Asynchronous Data Transfer – Modes of Transfer

IMPORTANT QUESTIONS

1. a) Explain in detail about strobe control method of asynchronous data transfer?

b) What is the disadvantage of strobe method? Explain how handshake method solves the problem?

2. a) Draw the block diagram of typical daisy-chain priority interrupt scheme and explain its operation?

b) Explain about its modes of transfer?

3. a) Explain in detail about Address space and memory space?

b)Explain in detail about Address mapping using pages?

BITS

1. The I/O processor is some time called a---

2. Asynchronous data transfer between two independent units requires---

3. Handshaking is a -----data transfer process.

4. In---- the interface transfers data into and out of the memory unit through memory bus

5. In Small low-speed computers, the mode of transfer particularly used is------

6. The mode of transfer which uses the interrupt facility is---

7. Which priority interrupt method uses a register whose bits are set separately by interrupt signal from

each device---

8. The priority encoder is a circuit that implements the ----- Function

ASSIGNMENTS

1. Explain in detail about Asynchronous serial transfer?

2. Explain in detail about Interrupt initiated by I/O?

MODULE 3: Priority Interrupt – Direct Memory Access (DMA).

IMPORTANT QUESTIONS

1. What is DMA? Explain with the help of DMA controller large blocks of data can be transferred at high speed between an external device and main memory?

BITS

1. The DMA controller mainly consists of ----registers

2. ------ Register contains an address to specify the desired location in memory

3. ---- Register holds the number of words to be transferred

4. ---- specifies the mode of transfer

5. The method of checking errors in transmission through feedback shift register is

ASSIGNMENTS

1. Explain in detail about main memory and auxiliary memory?

UNIT -V

MODULE 1: Parallel Processing – Pipelining – Arithmetic Pipeline – Instruction Pipeline.

IMPORTANT QUESTIONS

1. a) Give the Flynn s classification of computers? Explain in detail?

b) Explain in detail about parallel processing?

2. What is pipeline and explain space,time diagram for pipeline with an example?

3. Explain the process of arithmetic pipeline with an example?

BITS

1. The amount of hardware increases with---

2. Flynn’s Classification divides computer in to ---- major groups as

3. Flynn’s classification depends up on distinction between performance of the ---and the data processing

unit

4. One type of parallel processing that does not fit Flynn’s classification is----

5. A -----can be visualized as a collection of processing segments through which binary information stores

6. The --- holds the data and the combinational circuit performs the sub-operation in the particular

segment

7. The overlapping of computation is made possible by associating a ---- with each segment in the pipeline

8. In Pipelining ----provides isolation between each segment so that each can operate on a distinct-data

simultaneously

9. The behavior of a pipeline can be illustrated with a----

10. We define a----- as the operation performed going through all the segments in pipeline

11. In a -----horizontal axis displays the time in clock cycles and the vertical axis gives the segment

number

12. The Operands pass through all four segments in a-----

13. An---- divides an arithmetic operation in to sub-operations for execution in the pipeline segments.

14. An instruction pipeline operates on a stream of instructions by overlapping the ---phases of the

instruction cycle------

15. Pipeline arithmetic units are usually found in----- computers

ASSIGNMENTS

1.Explain the process of arithmetic pipeline with an example?

Module 2: Characteristics of Multiprocessors – Interconnection Structures – Inter Processor Arbitration.

IMPORTANT QUESTIONS

1. a) Explain the characteristics of multiprocessors?

b) Differentiate between tightly coupled and loosely coupled multiprocessor?

2. Explain in detail about characteristics of multiprocessors?

3.a) Explain in detail about Crossbar switch

b) Explain in detail about Multiport memory

4. What is Interprocessor Arbitration and explain in detail about serial Arbitration procedure?

5. What is synchronization and explain in detail about mutual exclusion with a semaphore?

BITS

1. A ---- multiprocessor system consists of a number of processors connected through a common path to a

memory unit

2. The advantage of the multiport memory organization is the---

3. A ---memory system employs separate buses between each memory module and each CPU

4. The ---- organization consists of a number of cross points that are placed between process or buses and

memory module

5. Polling technique is also called-----

6. FIFO stands for----

7. LRO stands for---

8. Daisy-chain connection mechanism provides means to achieve--- arbitration

9. The parallel arbitration procedure is also known as----

ASSIGNMENTS

1.Explain the process of arithmetic pipeline with an example?

MODULE 3: Inter Processor Communication and Synchronization.

IMPORTANT QUESTIONS

1. What is synchronization and explain in detail about mutual exclusion with a semaphore?

2. a) Explain in detail aboutMultistage switching Network

b) Explain in detail aboutHypercube Interconnection

BITS

1. Existence of the same copy of data in multiple memory units within a system may read to a given

system may read to a problem refers ----

2. The multiple processor in which single memory unit is shared different processors is called as the -----

3. A -----is a software control flag

4. The advantage of cache is its ability to reduce the average access time in ----

5. Caching cannot be used in --- oriented mode with two or more processors

6. The highest priority unit among those requesting the bus----

7. Omega switching network is also called as the -----

ASSIGNMENTS

1. What is synchronization and explain in detail about mutual exclusion with a semaphore?