VHDL coding in Xilinx

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Following are the steps for writing and simulating VHDL code in Xilinx ISE environment. 1) Create New project from File Menu. Compiled By: Naveen Kumar Email: [email protected] Info-techgeek.blogspot.in

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Basic steps to write a VHDL code in Xilinx ISE environment. Step-by-step picture is also shown to get the clear view of the process.

Transcript of VHDL coding in Xilinx

Page 1: VHDL coding in Xilinx

Following are the steps for writing and simulating VHDL code in Xilinx ISE environment.

1) Create New project from File Menu.

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Page 2: VHDL coding in Xilinx

2) Give the file name

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3) Select options as shown below:

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4) Press ‘Next’ two times in the follow-up windows and then ‘Finish’ at last.

5) Select New Source by clicking on project in sources window as shown below:

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6) Select VHDL Module and name the file. Then click Next

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7) Give port declarations as we do in entity. Then click Next. And then Finish.

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8) VHDL Code is presented on the screen. Now we just have to write the code in architecture.

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9) Select New Source by clicking on project in sources and then select Test Bench Waveform and name the file. Then Click Next two times and then Finish.

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10) A new window appears as shown below. For combinational circuits select combinatorial clock.

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11) Set the input waveforms by clicking on the waveform at different time intervals.

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12) Select Behavioural Simulation from sources window.

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13) Under Processes window simulate the file.

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14) The output simulations is observed at last.

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