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Overview

This generic VGA component generates the necessary signals for the VGA to display an image, bycoordinating the electron beam to be scanned over the viewing screen of the VGA. The actual imageis obtained by a sequence of horizontal lines that are constantly refreshed.

The component can manage both 640x480 and 800x600 resolutions. The screen refresh processbegins in the top left corner and paints one pixel at a time from left to right. At the end of the first row,the row increments and the column address are reset to the first column. Once the entire screen hasbeen painted the refresh process begins again.

The refresh process happens when the video signal redraws the screen 60 times per second (refreshrate) to provide for motion in the image and to reduce flicker. Refresh rates higher than 60 Hz are

used in PC monitors.

Functional Description

The VGA component is structured in three sub-modules: vga_controller_640_60, which manages the640x480 resolution; the vga_controller_800_60, manages the 800x600 resolution; and vga_selector,that is in charge of choosing the right outputs for the resolution selected. The controllers for the tworesolutions work similarly.

Figure 1VGA Component

HS

CLK_25MHz

VSCLK_40MHz

BLANKRESOLUTION

HCOUNTRST

VCOUNT

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The vertical and horizontal sync (VS and HS) are pulse signals that indicate the beginning of a newframe or row.

The vertical sync signal tells the monitor to start displaying a new image or frame, and the monitorstarts in the upper left corner with pixel (0,0). The horizontal sync signal tells the monitor to refresh

another row of 640 pixels. After 480 rows of pixels are refreshed with 480 horizontal sync signals, avertical sync signal resets the monitor to the upper left corner and the process repeats. During thetime when pixel data is not being displayed and the beam is returning to the left column to startanother horizontal scan, the RGB signals are all set to the color black (all zeros).

The vga_controller_640_60 inputs a 25Mhz to generate the video synch pulses for the monitor toenter 640x480 at 60Hz resolution state. It also provides horizontal and vertical counters for thecurrently displayed pixel and a blank signal that is active when the pixel is not inside the visiblescreen. The color outputs should be reset to 0.

The blank signal is delayed one pixel clock period (40ns) from where the pixel leaves the visiblescreen to account for the pixel pipeline delay. This delay happens because the color data does notarrive at the monitor pins at the same time as the counters indicate the current pixel to be displayed(memory read delays, synchronization delays).

Timings for sync pulse width and front and back porch intervals are based on observations taken fromVGA displays. Porch intervals are the pre- and post-sync pulse times during which information cannotbe displayed. See Figure 2 for the signal timings.

Port definitions

rst - global reset signal

pixel_clk - input pin, from dcm_25MHz, the clock signal generated by a DCM that has afrequency of 25MHz

HS - output pin, to monitor, horizontal sync pulse

VS - output pin, to monitor, vertical sync pulse

hcount - output pin, to clients, 11 bits, horizontal count of the currently displayed pixel(even if not in visible area)

vcount - output pin, to clients, 11 bits, vertical count of the currently active video line(even if not in visible area)

blank - output pin, to clients, active when pixel is not in visible area.

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Figure 2Timings for Sync Pulse

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The vga_controller_800_60 inputs a 25Mhz and generates the video synch pulses for the monitor toenter 800x600 at 60Hz resolution state. The functionality is similar to the vga_controller_640_60component.

Figure 3VGA Components Structure

Port definitions

rst - global reset signal

pixel_clk - input pin, from dcm_40MHz, the clock signal generated by a DCM that has afrequency of 40MHz

HS - output pin, to monitor, horizontal synch pulse

VS - output pin, to monitor, vertical synch pulse

hcount - output pin, to clients, 11 bits, horizontal count of the currently displayed pixel(even if not in visible area)

vcount - output pin, 11 bits, to clients, to clients, vertical count of the currently activevideo line (even if not in visible area)

blank - output pin, active when pixel is not in visible area.

The vga_selectorcontains the logic that selects between the output of the vga controllers dependingon the resolution used. Depending on the input signal resolution, the output signals from the vgacontrollers are selected and sent to other logic in the design that needs these outputs, or to themonitor. If the resolution pin is set high the 800x600 resolution is selected and if low, the 640x480resolution is selected.

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Port definitions

resolution - input pin, from resolution_swticher selects active resolution

HS_640_60 - input pin, from vga_controller_640_60, if the horizontal synch signal for640x480

VS_640_60 - input pin, from vga_controller_640_60, vertical synch signal for 640x480

HS_800_60 - input pin, from vga_controller_800_60 - horizontal synch signal for800x600

VS_800_60 - input pin, from vga_controller_800_60, vertical synch signal for 800x600

blank_640_60 - input pin, from vga_controller_640_60, blank signal for 640x480

blank_800_60 - input pin, from vga_controller_800_60, blank signal for 800x600

hcount_640_60 - input pin, 11 bits, from vga_controller_640_60, horizontal pixel counterfor 640x480

hcount_800_60 - input pin, 11 bits, from vga_controller_800_60, horizontal pixel counterfor 800x600

vcount_640_60 - input pin, 11 bits, from vga_controller_640_60, vertical lines counter for640x480

vcount_800_60 - input pin, 11 bits, from vga_controller_800_60, vertical lines counter for800x600

hs - output pin, to monitor, selected horizontal synch signal

vs - output pin, to monitor, selected vertical synch signal

blank - output pin, to clients, selected blank signal

hcount - output pin, 11 bits, to clients, selected horizontal pixel counter

vcount - output pin, 11 bits, to clients, selected vertical lines counter.