Verilog Pli
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Transcript of Verilog Pli
Introduction to Verilog PLIBy : Sibin P.
Thomas
What is the Verilog PLI?
Where is it useful/used?
Fundamentals of Verilog PLI
How to work with Verilog PLI?
Agenda
What is the Verilog PLI?
PLI ≡ Programming Language Interface
The PLI of Verilog HDL is a mechanism to provide an Application Programming Interface (API) to Verilog HDL.
Essentially a mechanism to invoke a C function from Verilog code.
It also provides mechanism to access internal databases of the simulator from the C program.
C function invoked by Verilog through a user provided system call like any other system call $finish, $display etc.
We can over-ride any pre-existing system call through PLI!
Where is it useful/used?
We basically use it to do what is not possible through Verilog constructs –
Reading a register from file Instance name of the parent of the
current module in the design hierarchy. Provide a user interface …
Where is it useful/used?
Writing BFMs Writing Test Benches Co – Verification Getting design information Code Coverage applications …
Where is it useful/used?
Fundamentals of Verilog PLI
Each system call is associated with 4 types of functions
Checktf Encountered during parsing or compiling
Calltf each time the associated user-defined system task is
called in verilog Sizetf
early in the process, prior to a complete instantiation of the design.
Misctf For miscellaneous reasons! Like reason_finish etc
Fundamentals of Verilog PLI
Different PLI librariesDifferent PLI libraries
TF library
ACC library
VPI library
TF libraryTF library
Advantages – Oldest PLI library, hence one can find more
documentation and support for these routines. Fairly simple and easy to understand; i.e. a shorter
learning curve. VCS is often 2x to 5x faster when only the TF library
used.
Limitations – Cannot analyze Verilog's internal simulation data
structures. Non Portable between different simulators. New Verilog-2001 (IEEE 1364-2001) features are not
supported.
ACC libraryACC library
Advantages – Allows software to actually occupy the driving
seat and control the Simulation by allowing access to Verilog constructs.
Useful for a wider range of applications.
Limitations – Cannot access RTL and test bench portions of
Verilog HDL. Cannot access memory arrays Non Portable.
VPI libraryVPI library
Advantages - Consists of just 37 routines compared to over a 100 in
each of TF/ACC libraries. Full access to structural, RTL and test bench constructs. Portable to all Simulators and also 64-bit operating
systems. All the new features in Verilog-2001 are supported by the
VPI library of the PLI.
Limitations – Cannot be optimized as efficiently as TF library. Since it is the latest in the family of PLI libraries the
amount of help and support one would find for deploying this library is relatively lesser.
Integrating the C files with the Verilog files Integrating the C files with the Verilog files
Static linking as in VCS
Dynamic linking as in VerilogXL, ModelSim etc.
VCS styleVCS style
$hello call=hello_calltf misc=hello_misctf
vcs -P pli.tab my_verilog_file.v my_c_file.c
Modelsim/Verilog XLModelsim/Verilog XL
s_tfcell veriusertfs[] = {
/***
Template for an entry:
{ usertask|userfunction, data, checktf(), sizetf(), calltf(), misctf*/
{usertask, 0, 0, 0, hello_calltf, hello_misctf, "$hello"},
{0} /* last entry must be 0 */
};
How to work with Verilog PLI?
Imagination Action
Joy